JPH0412067B2 - - Google Patents

Info

Publication number
JPH0412067B2
JPH0412067B2 JP57044127A JP4412782A JPH0412067B2 JP H0412067 B2 JPH0412067 B2 JP H0412067B2 JP 57044127 A JP57044127 A JP 57044127A JP 4412782 A JP4412782 A JP 4412782A JP H0412067 B2 JPH0412067 B2 JP H0412067B2
Authority
JP
Japan
Prior art keywords
charge transfer
image sensor
charge
barrier electrode
type image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57044127A
Other languages
Japanese (ja)
Other versions
JPS58161580A (en
Inventor
Nobuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57044127A priority Critical patent/JPS58161580A/en
Publication of JPS58161580A publication Critical patent/JPS58161580A/en
Publication of JPH0412067B2 publication Critical patent/JPH0412067B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/30Transforming light or analogous information into electric information

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は電荷転送形イメージセンサの改良に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to improvements in charge transfer type image sensors.

〔発明の技術的背景〕[Technical background of the invention]

最近、電荷転送形イメージセンサ、特にインタ
ライン転送方式のイメージセンサが固体イメージ
センサとして注目されている。従来、かかるイン
タライン転送方式のイメージセンサとしては第1
図〜第5図に示すものが知られている。
Recently, charge transfer type image sensors, particularly interline transfer type image sensors, have been attracting attention as solid-state image sensors. Conventionally, this is the first image sensor using the interline transfer method.
The devices shown in FIGS. 5 to 5 are known.

図中の1は例えばp型の半導体基板である。こ
の基板1表面には、フオトダイオードとしてのn
型の感光画素21,22,…からなる感光部が2次
元的に設けられている。これら感光部の各画素列
間には、前記画素21,22…に蓄積した信号電荷
を垂直方向に転送する垂直レジスタ3が設けられ
ている。この垂直レジスタ3には、その一部を構
成するn型の電荷転送チヤネル4が前記画素列間
に設けられている。また、基板1表面には、垂直
レジスタ3で転送された信号電荷を一走査毎に並
直列変換して水平方向に転送し、外部に信号を読
み出す水平レジスタ(図示せず)が設けられてい
る。前記基板1表面の画素21,22…、電荷転送
チヤネル4及びゲート領域5を除く部分には、p
+型のチヤネル阻止領域6…が設けられている。
前記画素21,22…等を含む基板1上には絶縁膜
7が設けられ、この絶縁膜7間の所定位置に、第
1〜第5の転送電極81〜85が段階的に離間して
設けられている。前記絶縁膜7上には、前記画素
1,22…及び各画素列における画素21,22
間部分に対応する部分を除くように光遮蔽膜9が
設けられている。
1 in the figure is, for example, a p-type semiconductor substrate. On the surface of this substrate 1, an n
A photosensitive section consisting of shaped photosensitive pixels 2 1 , 2 2 , . . . is provided two-dimensionally. A vertical register 3 is provided between each pixel column of these photosensitive sections to vertically transfer signal charges accumulated in the pixels 2 1 , 2 2 . . . . An n-type charge transfer channel 4 forming a part of the vertical register 3 is provided between the pixel columns. Further, on the surface of the substrate 1, a horizontal register (not shown) is provided for converting the signal charges transferred by the vertical register 3 into parallel and serial signals for each scan, transferring them in the horizontal direction, and reading out the signals to the outside. . On the surface of the substrate 1 except for the pixels 2 1 , 2 2 . . . , the charge transfer channel 4 and the gate region 5, p
+-type channel blocking regions 6 are provided.
An insulating film 7 is provided on the substrate 1 including the pixels 2 1 , 2 2 . They are set apart. On the insulating film 7 are the pixels 2 1 , 2 2 . . . and the pixels 2 1 , 2 2 . . . in each pixel column.
A light shielding film 9 is provided so as to exclude a portion corresponding to the intermediate portion.

次に、前述した構造のイメージセンサの動作に
ついて説明する。
Next, the operation of the image sensor having the above-described structure will be explained.

まず、光が例えば画素22に入射すると、電荷
が発生し信号電荷として蓄積する。一定時間後、
転送電極82に大きい正の電圧(V1)を印加する
と、画素22に蓄積した信号電荷は、ゲート領域
5を通つて電荷転送チヤネル4の電位の井戸に転
送される。なお、他の画素21,23,24…にも
信号電荷が発生し同様に電荷転送チヤネル4に転
送される。つづいて、V1より十分小さいクロツ
クパルスを垂直レジスタ3の転送電極(図示せ
ず)に印加することにより、垂直方向に信号電荷
を転送し、さらに水平レジスタを通して信号電荷
が読み出される。なお、この読出し期間に次の画
面の信号電荷が画素21,22…に蓄積されるが、
垂直レジスタ3へ印加されるクロツクパルスの電
圧が小さいため、画素21,22…に新たに蓄積さ
れる信号電荷がただちに垂直レジスタ3へ転送さ
れることはない。さらに一定時間後、新たに蓄積
された信号電荷は、垂直レジスタ3の転送電極に
電圧V1を印加することにより垂直レジスタ3へ
転送される。以下、前述と同様の動作を繰返すこ
とにより次々と新しい画面の信号が読み出され
る。
First, when light enters, for example, the pixel 2 2 , charges are generated and accumulated as signal charges. After a certain period of time,
When a large positive voltage (V 1 ) is applied to the transfer electrode 8 2 , the signal charge accumulated in the pixel 2 2 is transferred to the potential well of the charge transfer channel 4 through the gate region 5 . Note that signal charges are generated in other pixels 2 1 , 2 3 , 2 4 . . . and similarly transferred to the charge transfer channel 4. Subsequently, by applying a clock pulse sufficiently smaller than V 1 to the transfer electrode (not shown) of the vertical register 3, the signal charge is transferred in the vertical direction, and further the signal charge is read out through the horizontal register. Note that during this readout period, signal charges for the next screen are accumulated in pixels 2 1 , 2 2 .
Since the voltage of the clock pulse applied to the vertical register 3 is small, the signal charges newly accumulated in the pixels 2 1 , 2 2 . . . are not immediately transferred to the vertical register 3. Furthermore, after a certain period of time, the newly accumulated signal charge is transferred to the vertical register 3 by applying voltage V 1 to the transfer electrode of the vertical register 3. Thereafter, by repeating the same operation as described above, signals for new screens are successively read out.

〔背景技術の問題点〕[Problems with background technology]

しかしながら、前述した構造のイメージセンサ
においては、チヤネル阻止領域6が電位の井戸と
ならないように、該領域6に電荷転送チヤネル4
…の不純物濃度より高い逆導電型の不純物が含ま
れる。したがつて、チヤネル阻止領域6の不純物
が、画素21,22…等を形成する際の高温熱処理
工程で横方向に拡散し、第2図に示すように電荷
転送チヤネル4がチヤネル阻止領域6,6で両側
から挟まれる場合、電荷転送チヤネル4の幅が設
計値よりも狭くなる。その結果、垂直レジスタ3
で運べる最大電荷量が小さくなり、イメージセン
サのダイナミツクレンジが小さくなるという欠点
があつた。
However, in the image sensor having the above-described structure, a charge transfer channel 4 is formed in the channel blocking region 6 so that the channel blocking region 6 does not become a potential well.
Contains impurities of opposite conductivity type higher than the impurity concentration of... Therefore, the impurities in the channel blocking region 6 are diffused laterally during the high temperature heat treatment process when forming the pixels 2 1 , 2 2 . 6, 6, the width of the charge transfer channel 4 becomes narrower than the designed value. As a result, vertical register 3
The drawback was that the maximum amount of charge that could be carried by the sensor was reduced, and the dynamic range of the image sensor was reduced.

また、第3図に示す如く、画素22と電荷転送
チヤネル4間のゲート領域5にはチヤネル阻止領
域6がないため、この部分の電荷転送チヤネル4
は、第2図に示す如く両側にチヤネル阻止領域6
がある場合と比較して横方向に広くなる。その結
果、第3図における電荷転送チヤネル4部分は、
狭チヤネル効果が小さく、第2図における電荷転
送チヤネル4と比較して電位の井戸が深くなる。
従つて、この深い電位の井戸部分に信号電荷の一
部が残留して垂直レジスタ3の転送効率が低下
し、イメージセンサとしての解像度が劣化すると
いう欠点を有していた。
Further, as shown in FIG. 3, since there is no channel blocking region 6 in the gate region 5 between the pixel 2 2 and the charge transfer channel 4, the charge transfer channel 4 in this portion
has channel blocking regions 6 on both sides as shown in FIG.
It becomes wider in the horizontal direction compared to when there is. As a result, the charge transfer channel 4 portion in FIG.
The narrow channel effect is small and the potential well is deeper compared to the charge transfer channel 4 in FIG.
Therefore, a part of the signal charge remains in this deep potential well portion, resulting in a decrease in the transfer efficiency of the vertical register 3 and a disadvantage in that the resolution as an image sensor is degraded.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情に鑑みてなされたもので、ダ
イナミツクレンジや解像度の向上を図つた電荷転
送形イメージセンサを提供することを目的とする
ものである。
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a charge transfer type image sensor with improved dynamic range and resolution.

〔発明の概要〕[Summary of the invention]

本発明は、第1導電型の半導体基板の片側表面
内に光入力に応答して信号電荷を発生し、蓄積す
る複数の感光画素と、ゲート領域を経由して転送
された前記感光画素の信号電荷を電荷転送チヤネ
ルに沿つて転送し、順次読み出す電荷転送形シフ
トレジスタとを具備した電荷転送形イメージセン
サにおいて、前記ゲート領域を除く前記感光画素
と前記電荷転送チヤネルとの間の領域に絶縁膜を
介して障壁電極を設け、かつ前記障壁電極に直流
電圧を印加して前記障壁電極下の前記半導体基板
表面付近に前記信号電荷に対して電位障壁を形成
することにより、解像度等の特性の向上を図つた
ことを骨子とする。
The present invention includes a plurality of photosensitive pixels that generate and accumulate signal charges in response to optical input in one surface of a semiconductor substrate of a first conductivity type, and a signal of the photosensitive pixels transferred via a gate region. In a charge transfer type image sensor comprising a charge transfer type shift register that transfers charges along a charge transfer channel and sequentially reads out charges, an insulating film is provided in a region between the photosensitive pixel and the charge transfer channel except for the gate region. Improving characteristics such as resolution by providing a barrier electrode through the barrier electrode and applying a DC voltage to the barrier electrode to form a potential barrier against the signal charge near the surface of the semiconductor substrate under the barrier electrode. The main point is to aim for the following.

〔発明の実施例〕[Embodiments of the invention]

本発明の1実施例であるインタライン転送方式
のイメージセンサを、第6図〜第10図に基づい
て説明する。なお、第1図〜第5図に示すイメー
ジセンサと同部材のものは同符号を用い、説明を
省略する。
An interline transfer type image sensor, which is an embodiment of the present invention, will be explained based on FIGS. 6 to 10. Note that the same components as the image sensor shown in FIGS. 1 to 5 are denoted by the same reference numerals, and the description thereof will be omitted.

図中1はp型半導体基板である。この基板1表
面には、第1図〜第5図に示したイメージセンサ
と同様に画素21,22…、垂直レジスタ3、電荷
転送チヤネル4及び水平レジスタ(図示せず)が
設けられている。前記基板1上には絶縁膜7が設
けられている。そして、前記電荷転送チヤネル4
の両側のゲート領域5を除く部分には、障壁電極
21…が前記絶縁膜7の第1層膜を介して設けら
れている。同絶縁膜7内の第2層には、第2、第
4、第5の転送電極82,84,85が互いに離間
して設けられている。同絶縁膜7内の第3層に
は、第1、第3の転送電極81,83が互いに離間
して設けられている。前記絶縁膜7上には、前記
画素21,22…に対応する部分、及び各画素列に
おける画素21,22…間部分に対応する部分を除
くようにAlの光遮蔽膜9が設けられている。
In the figure, 1 is a p-type semiconductor substrate. On the surface of this substrate 1, pixels 2 1 , 2 2 . . . , a vertical register 3, a charge transfer channel 4, and a horizontal register (not shown) are provided, similar to the image sensor shown in FIGS. 1 to 5. There is. An insulating film 7 is provided on the substrate 1. and the charge transfer channel 4
Barrier electrodes 21 are provided on both sides of the insulating film 7, excluding the gate region 5, through the first layer film of the insulating film 7. In the second layer within the insulating film 7, second, fourth, and fifth transfer electrodes 8 2 , 8 4 , and 8 5 are provided spaced apart from each other. In the third layer within the insulating film 7, first and third transfer electrodes 8 1 and 8 3 are provided spaced apart from each other. A light shielding film 9 of Al is formed on the insulating film 7 so as to exclude the portions corresponding to the pixels 2 1 , 2 2 . . . and the portions between the pixels 2 1 , 2 2 . . . in each pixel column. It is provided.

次に、前述した構造のイメージセンサの製造方
法を、第11図a,b〜第14図a,bに基づい
て説明する。
Next, a method of manufacturing the image sensor having the above-described structure will be explained based on FIGS. 11a and 11b to 14a and 14b.

() まず、p型半導体基板1上に第1の絶縁膜
1を形成した。つづいて、この絶縁膜71上に
障壁電極となる導体層を堆積した後、写真蝕刻
法によりパターニングして画素形成予定部及び
電荷転送チヤネル形成予定部に対応する部分が
開孔した導体層パターン22を形成した。次
に、この導体層パターン22をマスクとして基
板1にリンを所定条件下でイオン注入、熱処理
を施こし、画素(21),22,23…及び電荷転
送チヤネル4を形成した(第11図a,b図
示)。次いで、画素22と電荷転送チヤネル4間
のゲート領域5に対応する導体層パターン22
を常法によりエツチング除去し、障壁電極21
を形成した(第12図a,b図示)。
() First, the first insulating film 7 1 was formed on the p-type semiconductor substrate 1 . Subsequently, a conductor layer serving as a barrier electrode is deposited on the insulating film 71 , and then patterned by photolithography to form a conductor layer pattern in which holes are formed in areas corresponding to areas where pixels are to be formed and charge transfer channels are to be formed. 22 was formed. Next, using this conductor layer pattern 22 as a mask, phosphorus was ion-implanted into the substrate 1 under predetermined conditions and heat treatment was performed to form pixels (2 1 ), 2 2 , 2 3 . . . and a charge transfer channel 4 (first (Illustrated in Figures 11a and b). Next, a conductor layer pattern 22 corresponding to the gate region 5 between the pixel 2 2 and the charge transfer channel 4 is formed.
The barrier electrode 21 is removed by etching using a conventional method.
was formed (as shown in FIGS. 12a and 12b).

() 次に、前記障壁電極21をマスクとして第
1の絶縁膜71を選択的にエツチング除去した
後、全面に第2の絶縁膜72を形成した(第1
3図a,b図示)。つづいて、常法により、全
面に導体層(図示せず)の堆積、パターニング
を繰り返して所望の所に第1〜第5の転送電極
(81),82,83,(84),(85)を夫々形成し
た。次に、全面に第3の絶縁膜73を形成した。
この後、全面にAlを蒸着し、パターニングし
て前記画素21,22…及び各画素列における画
素21,22…間部分に対応する部分が開孔した
Alからなる光遮蔽膜9を形成し、所望のイン
タライン転送方式のイメージセンサを製造した
(第14図a,b図示)。なお、前記第1〜第3
の絶縁膜71〜73を一体にしたものが、第7図
〜第10図中の絶縁膜7に対応する。
() Next, after selectively etching and removing the first insulating film 7 1 using the barrier electrode 21 as a mask, a second insulating film 7 2 was formed on the entire surface (the first
(Illustrated in Figures 3a and b). Next, by repeating the deposition and patterning of a conductive layer (not shown) on the entire surface by a conventional method, the first to fifth transfer electrodes (8 1 ), 8 2 , 8 3 , (8 4 ) are formed at desired locations. , (8 5 ) were formed, respectively. Next, a third insulating film 73 was formed over the entire surface.
After this, Al was deposited on the entire surface and patterned to form holes in the areas corresponding to the pixels 2 1 , 2 2 ... and the areas between the pixels 2 1 , 2 2 ... in each pixel column.
A light shielding film 9 made of Al was formed, and a desired interline transfer type image sensor was manufactured (as shown in FIGS. 14a and 14b). In addition, the first to third
An integrated insulating film 7 1 to 7 3 corresponds to the insulating film 7 in FIGS. 7 to 10.

次に、本発明のイメージセンサの動作を説明す
る。画素21,22…への光入射、信号電荷の発生
等の動作は従来例と同様であるから、相違点のみ
説明する。即ち、障壁電極21には、基板1と同
一電圧または一定の直流電圧VBを印加して動作
させる。ここでVBは、電荷転送チヤネル4に対
して障壁電極21下の基板1表面が電位障壁とな
る電圧に選ぶ。
Next, the operation of the image sensor of the present invention will be explained. Since operations such as light incidence on the pixels 2 1 , 2 2 . . . and generation of signal charges are the same as in the conventional example, only the differences will be explained. That is, the barrier electrode 21 is operated by applying the same voltage as the substrate 1 or a constant DC voltage V B. Here, V B is selected to be a voltage at which the surface of the substrate 1 under the barrier electrode 21 becomes a potential barrier with respect to the charge transfer channel 4 .

しかして、前述した構造のイメージセンサによ
れば、電荷転送チヤネル4は、障壁電極21とな
る導体層パターン22をマスクとして基板1にリ
ンを導入した後、熱処理によりリンが横方向に拡
散するため広い電荷転送チヤネル4を形成でき
る。従つて、垂直レジスタ3の運べる最大信号電
荷量が大きくなり、ダイナミツクレンジが大きく
なる。
According to the image sensor having the above-described structure, the charge transfer channel 4 is formed by introducing phosphorus into the substrate 1 using the conductor layer pattern 22 serving as the barrier electrode 21 as a mask, and then diffusing the phosphorus in the lateral direction by heat treatment. A wide charge transfer channel 4 can be formed. Therefore, the maximum amount of signal charge that the vertical register 3 can carry increases, and the dynamic range increases.

また、電荷転送チヤネル4の両側の基板1表面
には、従来の如くチヤネル阻止領域がないため、
電荷転送チヤネル4の電位の井戸は、第1〜第5
の転送電極81〜85に印加する電圧より一義的に
決まり、従来の如く場所によつて井戸が深くなつ
たりすることがない。従つて、垂直レジスタ3に
よる電荷転送が効率的に行われ、イメージセンサ
としての解像度が向上する。
Furthermore, since there is no channel blocking region on the surface of the substrate 1 on both sides of the charge transfer channel 4 as in the conventional case,
The potential wells of the charge transfer channel 4 are the first to fifth wells.
It is uniquely determined by the voltage applied to the transfer electrodes 8 1 to 8 5 , and the wells do not become deeper depending on the location as in the conventional case. Therefore, charge transfer by the vertical register 3 is performed efficiently, and the resolution of the image sensor is improved.

なお、本発明に係る電荷転送形イメージセンサ
としては、前述した構造のものに限らず、次に示
す構造のものでもよい。
Note that the charge transfer type image sensor according to the present invention is not limited to the structure described above, and may have the structure shown below.

第15図に示す如く、障壁電極21下の基板1
表面にp+型の半導体領域23を形成した構造の
もの。かかる構造のイメージセンサにおいて、画
素(21),22,23…及び電荷転送チヤネル4の
形成は、基板1表面にp型の不純物を導入した
後、前述した実施例と同様にして導体層パターン
22を形成し、しかる後、このパターン22をマ
スクとしてn型の不純物を多量導入、熱処理によ
り行なつた。
As shown in FIG. 15, the substrate 1 under the barrier electrode 21
It has a structure in which a p+ type semiconductor region 23 is formed on the surface. In the image sensor having such a structure, the pixels (2 1 ), 2 2 , 2 3 . . . and the charge transfer channel 4 are formed by introducing p-type impurities into the surface of the substrate 1 and then forming conductors in the same manner as in the embodiment described above. A layer pattern 22 was formed, and then, using this pattern 22 as a mask, a large amount of n-type impurity was introduced and heat treatment was performed.

第15図図示のイメージセンサによれば、障壁
電極21下の基板1表面にp+型の半導体領域2
3が形成されているため、第3の転送電極21の
印加パルスの誘導により障壁電極21の電圧が変
化しても、半導体領域23のしきい値電圧が高く
電位障壁が維持される。
According to the image sensor shown in FIG.
3 is formed, even if the voltage of the barrier electrode 21 changes due to the induction of the applied pulse of the third transfer electrode 21, the threshold voltage of the semiconductor region 23 is high and the potential barrier is maintained.

また、第16図に示す如く、所定の障壁電極2
1下の基板1表面にn型不純物を極めて低濃度に
含むn−型の半導体領域24、及びこの半導体領
域24に隣接した基板1表面にn型不純物を高濃
度に含むn+型のドレイン領域25が設けられた
構造のものでもよい。かかる構造のイメージセン
サにおいては、画素23に過剰な電荷が蓄積する
と、電位障壁21の半導体領域24に形成される
電位の井戸を通つてさらに深い井戸を有するドレ
イン領域25に排出される。
Further, as shown in FIG. 16, a predetermined barrier electrode 2
1, an n-type semiconductor region 24 containing an extremely low concentration of n-type impurities on the surface of the substrate 1 below the substrate 1, and an n+-type drain region 25 containing a high concentration of n-type impurities on the surface of the substrate 1 adjacent to this semiconductor region 24. It may also have a structure in which it is provided with. In the image sensor having such a structure, when excessive charge is accumulated in the pixel 2 3 , it is discharged through the potential well formed in the semiconductor region 24 of the potential barrier 21 to the drain region 25 having a deeper well.

第16図図示のイメージセンサによれば、障壁
電極21がドレイン領域25への過剰電荷の排出
を制御する制御ゲートと一体に形成されるため、
製造を簡単化できる。
According to the image sensor shown in FIG. 16, since the barrier electrode 21 is formed integrally with the control gate that controls the discharge of excess charge to the drain region 25,
Manufacturing can be simplified.

なお、上記実施例では基板としてp型の場合に
ついて述べたが、これに限らず、n型の場合でも
よい。
In the above embodiments, the case where the substrate is p-type has been described, but the substrate is not limited to this, and may be n-type.

また、上記実施例では感光画素がフオトダイオ
ードである場合についたが、これに限らず、透明
電極を絶縁膜を介して設けたMCS形ダイオード
あるいは光導電膜を用いた感光画素でも同様に適
用できる。
Further, in the above embodiment, the photosensitive pixel is a photodiode, but the application is not limited to this, and the same can be applied to a photosensitive pixel using an MCS type diode in which a transparent electrode is provided via an insulating film or a photoconductive film. .

〔発明の効果〕〔Effect of the invention〕

以上詳述した如く本発明によれば、従来と比べ
てダイナミツクレンジや解像度を向上させたイン
タライン転送方式のイメージセンサ等の高信頼性
の電荷転送形イメージセンサを提供できるもので
ある。
As described in detail above, according to the present invention, it is possible to provide a highly reliable charge transfer type image sensor such as an interline transfer type image sensor, which has improved dynamic range and resolution compared to the conventional one.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のインタライン転送方式のイメー
ジセンサの平面図、第2図は第1図のA−A線に
沿う断面図、第3図は第1図のB−B線に沿う断
面図、第4図は第1図のC−C線に沿う断面図、
第5図は第1図のD−D線に沿う断面図、第6図
は本発明の1実施例であるインタライン転送方式
のイメージセンサの平面図、第7図は第6図のA
−A線に沿う断面図、第8図は第6図のB−B線
に沿う断面図、第9図は第6図のC−C線に沿う
断面図、第10図は第6図のD−D線に沿う断面
図、第11図a,b〜第14図a,bは、第6図
〜第10図図示のイメージセンサの製造方法を、
第6図のA−A線、B−B線に沿つた工程順に示
す断面図、第15図及び第16図は、夫々本発明
の他の実施例を示すインタライン転送方式のイメ
ージセンサの断面図である。 1……p型半導体基板、21,22,23……感
光画素、3……垂直レジスタ、4……電荷転送チ
ヤネル、5……ゲート領域、6……チヤネル阻止
領域、7……絶縁膜、81〜85……転送電極、9
……光遮蔽膜、21……障壁電極、22……導体
層パターン、23……p+型の半導体領域、24
……n−型の半導体領域、25……n+型のドレ
イン領域。
Fig. 1 is a plan view of a conventional interline transfer type image sensor, Fig. 2 is a cross-sectional view taken along line A-A in Fig. 1, and Fig. 3 is a cross-sectional view taken along line B-B in Fig. 1. , FIG. 4 is a sectional view taken along line C-C in FIG. 1,
5 is a cross-sectional view taken along line D-D in FIG. 1, FIG. 6 is a plan view of an interline transfer type image sensor according to an embodiment of the present invention, and FIG. 7 is a cross-sectional view taken along the line D-D in FIG.
-A sectional view taken along line A, Figure 8 is a sectional view taken along line B-B in Figure 6, Figure 9 is a sectional view taken along line C-C in Figure 6, and Figure 10 is a sectional view taken along line C-C in Figure 6. The cross-sectional views taken along the line D-D, FIGS.
6, and FIGS. 15 and 16 are cross-sectional views of interline transfer type image sensors showing other embodiments of the present invention, respectively. It is a diagram. DESCRIPTION OF SYMBOLS 1...p-type semiconductor substrate, 21 , 22 , 23 ...photosensitive pixel, 3...vertical register, 4...charge transfer channel, 5...gate region, 6...channel blocking region, 7... Insulating film, 8 1 to 8 5 ... Transfer electrode, 9
... Light shielding film, 21 ... Barrier electrode, 22 ... Conductor layer pattern, 23 ... P + type semiconductor region, 24
. . . n − type semiconductor region, 25 . . . n + type drain region.

Claims (1)

【特許請求の範囲】 1 第1導電型の半導体基板の片側表面内に光入
力に応答して信号電荷を発生し、蓄積する複数の
感光画素と、ゲート領域を経由して転送された前
記感光画素の信号電荷を電荷転送チヤネルに沿つ
て転送し、順次読み出す電荷転送形シフトレジス
タとを具備した電荷転送形イメージセンサにおい
て、 前記ゲート領域を除く前記感光画素と前記電荷
転送チヤネルとの間の領域に絶縁膜を介して障壁
電極を設け、かつ前記障壁電極に直流電圧を印加
して前記障壁電極下の前記半導体基板表面付近に
前記信号電荷に対して電位障壁を形成したことを
特徴とする電荷転送形イメージセンサ。 2 電荷転送チヤネルが、障壁電極となる導体パ
ターンをマスクとして半導体基板表面へ第2導電
型の不純物をイオン注入することにより形成され
るものであることを特徴とする特許請求の範囲第
1項記載の電荷転送形イメージセンサ。 3 障壁電極が、感光画素に近接して設けられる
ドレイン領域への過剰電荷の排出を制御する制御
ゲートと一体に形成されるものであることを特徴
とする特許請求の範囲第1項記載の電荷転送形イ
メージセンサ。
[Scope of Claims] 1. A plurality of photosensitive pixels that generate and accumulate signal charges in response to optical input within one surface of a semiconductor substrate of a first conductivity type, and the photosensitive pixels transferred via a gate region. In a charge transfer type image sensor comprising a charge transfer type shift register that transfers pixel signal charges along a charge transfer channel and sequentially reads them out, the area between the photosensitive pixel and the charge transfer channel excluding the gate region. A barrier electrode is provided through an insulating film, and a DC voltage is applied to the barrier electrode to form a potential barrier against the signal charge near the surface of the semiconductor substrate under the barrier electrode. Transfer type image sensor. 2. Claim 1, characterized in that the charge transfer channel is formed by ion-implanting a second conductivity type impurity into the surface of the semiconductor substrate using a conductor pattern serving as a barrier electrode as a mask. charge transfer type image sensor. 3. The charge according to claim 1, wherein the barrier electrode is formed integrally with a control gate that controls discharge of excess charge to a drain region provided in the vicinity of the photosensitive pixel. Transfer type image sensor.
JP57044127A 1982-03-19 1982-03-19 Charge transfer type image sensor Granted JPS58161580A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57044127A JPS58161580A (en) 1982-03-19 1982-03-19 Charge transfer type image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57044127A JPS58161580A (en) 1982-03-19 1982-03-19 Charge transfer type image sensor

Publications (2)

Publication Number Publication Date
JPS58161580A JPS58161580A (en) 1983-09-26
JPH0412067B2 true JPH0412067B2 (en) 1992-03-03

Family

ID=12682940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57044127A Granted JPS58161580A (en) 1982-03-19 1982-03-19 Charge transfer type image sensor

Country Status (1)

Country Link
JP (1) JPS58161580A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0763091B2 (en) * 1986-05-13 1995-07-05 三菱電機株式会社 Solid-state image sensor
JP2633240B2 (en) * 1986-12-26 1997-07-23 松下電子工業株式会社 Solid-state imaging device
GB2413007A (en) * 2004-04-07 2005-10-12 E2V Tech Uk Ltd Multiplication register for amplifying signal charge

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55163958A (en) * 1979-06-08 1980-12-20 Nec Corp Electric charge transfer pickup unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55163958A (en) * 1979-06-08 1980-12-20 Nec Corp Electric charge transfer pickup unit

Also Published As

Publication number Publication date
JPS58161580A (en) 1983-09-26

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