KR100311493B1 - Solid state image sensor and method for manufacturing the same - Google Patents

Abstract

It is an object of the present invention to provide a solid state image pickup device and a method of manufacturing the same which are suitable for increasing the charge transfer efficiency in a horizontal charge transfer device.

A solid state image pickup device for achieving the above object includes a plurality of second alternating buried charge coupling device regions formed in a predetermined depth of a first conductivity type well, and a plurality of second alternating portions formed on the singular buried charge coupling device region in a horizontal charge transfer device. 1, a second conductive charge transfer gate, a first conductivity type first barrier region formed on the right side of the second horizontal charge transfer gate lower channel, and deeper than the first barrier region on the left side of the second horizontal charge transfer gate lower channel; And a second conductivity type second barrier region formed with a high concentration and a second conductivity type third barrier region on the right side of the lower channel of the first horizontal charge transfer gate.

Description

Solid state image pickup device and method of manufacturing the same {SOLID STATE IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid state image pickup device, and more particularly, to a solid state image pickup device capable of increasing horizontal charge transfer efficiency and a method of manufacturing the same.

Referring to the accompanying drawings, a conventional solid state image pickup device will be described below.

FIG. 1 is a cross-sectional view illustrating a structure of a horizontal electron transfer region in a conventional solid state image pickup device, and FIG. 2 is a diagram illustrating a potential of a channel according to a driving clock on line I-I of FIG.

In the conventional solid state imaging device, the barrier region is formed in the lower channel of the second horizontal charge transfer gate of the HCCD. As shown in FIG. 1, the configuration of the solid state image pickup device is an N-type BCCD (Bulk) within a predetermined depth in the P well 1. Charge Coupled Device) region 2 is formed, and a gate oxide film 3 is formed on the BCCD region 2.

A plurality of first horizontal charge transfer gates 4 (GATE1) are formed on the gate oxide film 3 on the BCCD region 2 at regular intervals. An interlayer insulating film 5 is formed to surround the first horizontal charge transfer gate 4. There is also a second horizontal charge transfer gate 7 (GATE2) which overlaps with the first horizontal charge transfer gate 4.

Here, the second and first horizontal charge transfer gates 7 and 4 are alternately formed, and the second and first horizontal charge transfer gates 7 and 4 operate by receiving the same clock signal φ1 or φ2. For reference, a plurality of second and first horizontal charge transfer gates 7 and 4 are paired with? 2,? 1,? 2,? 1,. Is authorized one-to-one.

A P-type barrier region is formed in the BCCD channel under each of the second horizontal charge transfer gates 7.

When the HCCD region of the conventional solid-state imaging device configured as described above describes the charge transfer path due to the potential change of the channel according to the driving clock, φ1 generates a 'high' clock signal as shown in FIG. At the time t1 where the 'low' clock signal is generated, the potential of the barrier region 6 remains unchanged since the 'low' clock signal is applied in the region ① as shown in FIG.

And (2) the area is N-type, so the potential is lower than that of the barrier area (6). When the potential level of the edge region of the region rises slightly, charges are trapped in the region and loss of transmission charges may occur.

In the ③ region, since the 'high' clock signal of φ1 is applied, the potential level is lower than the ② region, and the charge is transferred to the ④ region. As a result, charges accumulate in the region (4).

In the area ⑤, the 'low' clock signal is applied so that the potential of the barrier area 6 remains unchanged. At this time, a small potential change occurs at the edge portion of the region ⑤, and a phenomenon in which charge is reversed to the region ④ may occur.

As described above, the conventional solid state imaging device has the following problems.

First, the charge back may be caused by the slight potential change of the edge portion during the charge transfer.

Second, when the potential edge rises slightly, charges may not be transferred and may be trapped and transfer charges may be lost.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a solid state image pickup device and a method of manufacturing the same, which are particularly suitable for increasing charge transfer efficiency in a horizontal charge transfer device.

1 is a structural cross-sectional view of a horizontal electron transfer region in a conventional solid state imaging device

FIG. 2 is a diagram illustrating the potential of the channel according to the driving clock on the line I-I of FIG.

3 is a structural cross-sectional view of a horizontal charge transfer region in the solid state image pickup device according to the first embodiment of the present invention.

4 shows the potential of the channel according to the driving clock on the II-II line of FIG.

5A and 5B are cross-sectional views illustrating a barrier film forming method of the unit horizontal charge transfer gate of FIG. 3.

6 is a structural cross-sectional view of a horizontal charge transfer region in the solid state image pickup device according to the second embodiment of the present invention.

7 is a diagram illustrating the potential of a channel according to the driving clock on the III-III line of FIG.

Explanation of symbols for the main parts of the drawings

31: P well 32: BC Charge (Bulk Charge Coupled Device) area

33: gate oxide film 34: first horizontal charge transfer gate

35: interlayer insulating film 36: first barrier region

37: photosensitive film 38: second barrier area

39: second horizontal charge transfer gate 40: third barrier area

The solid-state imaging device of the present invention for achieving the above object is a horizontal charge transfer device, alternately formed on the second conductive buried charge coupling device region formed in a predetermined depth of the first conductive well, the upper buried charge coupling device region A plurality of first and second horizontal charge transfer gates, a first conductive type first barrier region formed on a right side of the lower channel of the second horizontal charge transfer gate, and a first barrier on a left side of the lower channel of the second horizontal charge transfer gate; And a first conductive second barrier region formed deeper than the region, and including a second conductive third barrier region on the right side of the lower channel of the first horizontal charge transfer gate.

In the method of manufacturing the solid-state imaging device of the present invention having the above configuration, forming a second conductivity type buried charge coupling device region in a first conductivity type well, and forming a second conductivity type agent in a predetermined region in the buried charge coupling device surface. Forming a barrier region, forming a gate insulating film on the buried charge coupling device region, and first horizontally having a predetermined interval on the gate insulating film so that the second conductive first barrier region is located at a lower right side Forming a charge transfer gate; depositing an insulating film to surround the first horizontal charge transfer gate; and a first conductivity type second in a surface of a channel of the buried charge coupling device region between the first horizontal charge transfer gates; Forming a barrier region, the first channel having a depth deeper and higher than that of the second barrier region in a left channel region of the second barrier region; Third is characterized in that the manufacture, including the step of forming the second, the second horizontal charge transfer gates in the top third barrier region are forming a barrier region, the overlap of the first horizontal charge transfer gate.

Among various conditions for improving image quality in a solid state image pickup device, the charge transfer efficiency of a vertical charge transfer device (Vertical CCD) and a horizontal charge transfer device (Horizontal CCD) should be good.

The VCCD drive clock is relatively low frequency and has very good transmission efficiency due to 3 or 4 phase transmission.

However, since HCCD requires faster transmission than VCCD, two-phase transmission is used because the driving clock frequency requires more than twice the VCCD clock frequency.

As a method of effectively driving the HCCD formed by the two-phase transfer method as described above, a method of artificially injecting P-type ion into the CCD channel can be used. Thus, by forming a barrier film on the CCD channel by implanting P-type ions, the charge transfer efficiency can be improved by utilizing the potential difference due to the difference in concentration of the barrier film.

Hereinafter, a solid state image pickup device and a method of manufacturing the same will be described with reference to the accompanying drawings.

3 is a structural cross-sectional view of a horizontal charge transfer region in the solid state image pickup device according to the first embodiment of the present invention, and FIG. 4 is a view showing the potential of the channel according to the driving clock on the II-II line of FIG. 5B is a cross-sectional view illustrating a method of forming a barrier film of the unit horizontal charge transfer gate of FIG. 3.

FIG. 6 is a cross-sectional view illustrating the structure of the horizontal charge transfer region in the solid state image pickup device according to the second exemplary embodiment of the present invention, and FIG. 7 is a view illustrating the potential of the channel according to the driving clock on the III-III line of FIG. 6.

In the solid state image pickup device according to the first embodiment of the present invention, the first and second barrier films are formed on the lower channel of the second horizontal charge transfer gate of the HCCD. An N type BCCD (Bulk Charge Coupled Device) region 32 is formed within a predetermined depth within the N-type, and a gate oxide film 33 is formed on the BCCD region 32.

A plurality of first horizontal charge transfer gates 34 (GATE1) are formed on the gate oxide film 33 on the BCCD region 32 at regular intervals. An interlayer insulating layer 35 is formed to surround the first horizontal charge transfer gate 34. There is a second horizontal charge transfer gate 39 (GATE2) overlapping the first horizontal charge transfer gate 34.

Here, the second and first horizontal charge transfer gates 39 and 34 are alternately formed, and the second and first horizontal charge transfer gates 39 and 34 operate by receiving the same clock signal φ1 or φ2. For reference, a plurality of second and first horizontal charge transfer gates 39 and 34 are paired by? 2,? 1,? 2,? 1,. Is authorized one-to-one.

A P-type first barrier region 36 is formed on the right side of the BCCD channel under each of the second horizontal charge transfer gates 39, and the BCCD channel under each of the second horizontal charge transfer gates 39 is formed. The P-type first barrier region 38 is formed deeper than the first barrier region 36 on the left side. In this case, the second barrier region 38 has a higher concentration than the first barrier region 36.

In other words, the second barrier region 38 is formed deeper than the first barrier region 36 and about half the width of the first barrier region 36.

Referring to the charge transfer path according to the potential change in the channel by receiving the driving clock of the first embodiment of the present invention configured as described above, as shown in (a) of FIG. 4, φ1 generates a 'high' clock signal, and φ2 is' At the time t1 that generates the low 'clock signal, as shown in (b) of FIG. 4, since the' low 'clock signal is applied in the ① area, the potentials of the first and second barrier areas 36 and 38 remain unchanged. In this case, since the potential of the second barrier region 38 is higher than that of the first barrier region 36, it is possible to prevent backflow of charge.

And the area (2) is N-type, which has a lower potential than the first barrier area (36). This prevents charge from being trapped.

In addition, in the ③ region, the 'high' clock signal of φ1 is applied, so that the potential level is lower than the ② region, and it forms a staircase, whereby the charge is easily moved to the ④ region. As a result, charges accumulate in the region (4). In the ⑤ region, since the 'low' clock signal is applied, the potentials of the first and second barrier regions 36 and 38 remain unchanged, and the second barrier region 38 has a potential higher than that of the first barrier region 36. Since it is high, it is possible to prevent the charge from flowing back into the region.

In the first embodiment of the present invention having the above-described configuration, a method of forming the first and second barrier regions 36 and 38 under the second horizontal charge transfer gate 39 will be described below.

As shown in FIG. 5A, after implanting N-type ions within a predetermined depth of the P well 31, a BCCD region 32 is formed by a diffusion process, and a gate oxide film 33 is formed on the BCCD region 32. Form. Thereafter, after depositing the polysilicon layer, the polysilicon layer is patterned to have a predetermined interval to form the first horizontal charge transfer gate 34. Thereafter, the interlayer insulating layer 35 is formed to surround the first horizontal charge transfer gate 34 and expose the gate oxide layer 33 and the BCCD region 32 between the first horizontal charge transfer gate 34. Thereafter, P-type ions are implanted into the surface of the BCCD region 32 exposing the interlayer insulating layer 35 as a mask to form the first barrier region 36.

Next, as shown in FIG. 5B, a photosensitive film 37 is applied to the entire surface of the resultant, and then exposed and developed to expose a part of the first barrier region 36 between the first horizontal charge transfer gates 34. The photosensitive film 37 is selectively patterned. The exposed part is the left part of the first barrier area 36.

Subsequently, P-type ions are implanted using the patterned photoresist layer 37 as a mask to form a second barrier region 38 to the left of the first barrier region 36 deeper than the first barrier region 36 and the photoresist layer 37 Remove it.

Subsequently, although not shown in the drawing, the polysilicon layer is deposited on the entire surface, and then the polysilicon layer is patterned to overlap the first horizontal charge transfer gate 34 to form a second horizontal charge transfer gate.

Next, the solid state image pickup device according to the second embodiment of the present invention is for the horizontal charge transfer element portion of the solid state image pickup device, and the configuration thereof is as shown in FIG. 6 and the lower channel of each first horizontal charge transfer gate 34 is shown. Except that the N-type third barrier region 40 is formed on the right side, the structure is the same as that of the first embodiment of the present invention.

Referring to the potential change and the charge transfer path according to the operation clock of the second embodiment of the present invention having the configuration as described above, as shown in Figure 7 (a) in Figure 7 generates a 'high' clock signal, At the time t1 when φ2 generates the 'low' clock signal, as shown in (b) of FIG. 7, since the 'low' clock signal is applied in the ① area, the potentials of the first and second barrier regions 36 and 38 change. And because the potential of the second barrier region 38 is higher than that of the first barrier region 36, it is possible to prevent backflow of charge.

In the region ②, since the N-type third barrier region 40 is formed on the right side of the channel, the potential is low. This prevents charge from being trapped.

In addition, in the ③ region, the 'high' clock signal of φ1 is applied, so that the potential level is lower than the ② region and forms a staircase, thereby easily transferring charges to the ④ region. As a result, charges accumulate in the region (4). In the ⑤ region, since the 'low' clock signal is applied, the potentials of the first and second barrier regions 36 and 38 remain unchanged, and the potential of the second barrier region 38 is higher than that of the first barrier region 36. Since it is high, it is possible to prevent the charge from flowing back into the region.

The solid-state imaging device of the present invention as described above and a manufacturing method thereof have the following effects.

First, since the second barrier region is formed on the left side of the lower channel of the second horizontal charge transfer gate, transfer charges can be prevented from flowing back, thereby increasing charge transfer efficiency.

Second, since the third barrier region is formed on the right side of the lower channel of the first horizontal charge transfer gate, the transmission potential is prevented from being trapped by lowering the channel potential of the BCCD region relatively.

Claims (5)

In the horizontal charge transfer device, A second conductive buried charge coupling element region formed at a predetermined depth of the first conductive well, A plurality of first and second horizontal charge transfer gates alternately formed over the region of the submerged charge coupling element; A first conductivity type first barrier region formed on the right side of the lower channel of the second horizontal charge transfer gate; A first conductivity type second barrier region formed at a left side of the lower channel of the second horizontal charge transfer gate and having a higher concentration than the first barrier region; And a second conductivity type third barrier region formed on the right side of the lower channel of the first horizontal charge transfer gate. 2. The solid state image pickup device of claim 1, wherein the second horizontal charge transfer gate overlaps the first horizontal charge transfer gate and is configured to receive and operate the same clock signal as the first horizontal charge transfer gate on the right side. The solid state image pickup device according to claim 1, wherein the first conductivity type is P type and the second conductivity type is N type. Forming a second conductive buried charge coupling device region in the first conductive well, Forming a second conductivity type first barrier region in a predetermined region within the buried charge coupling device; Forming a gate insulating film on the buried charge coupling device region; Forming a first horizontal charge transfer gate having a predetermined interval on the gate insulating layer such that the second conductive first barrier region is located at a lower right side thereof; Depositing an insulating film to surround the first horizontal charge transfer gate; Forming a first conductive type second barrier region in a surface of a channel of the buried charge coupling device region between the first horizontal charge transfer gates; Forming a first conductive type third barrier region having a depth deeper and higher than that of the second barrier region in a left channel region of the second barrier region; And forming a second horizontal charge transfer gate on the second and third barrier regions so as to overlap with the first horizontal charge transfer gate. 5. The method of manufacturing a solid state image pickup device according to claim 4, wherein the first conductivity type is P type and the second conductivity type is manufactured using N type.