JPH04116821A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the generation of a disconnection due to migration of Al in a fine Al wiring by a method wherein an insulating film is formed on a semiconductor substrate, the substrate is heated to form a first thin film and after a second film is laminated and formed in a state that a substrate temperature is maintained in the vicinity of the first thin film, the substrate is made to cool down, this laminated film of the first and second films is patterned en bloc and the electrode wiring is formed. CONSTITUTION:A lower insulating film 2 is formed on a semiconductor substrate 1. A Ti film (a contact metal film) 3 and a TiN film (a barrier metal film) 4 are formed on the film 2. Then, a lower Al alloy film 5 is formed on the film 4 by a high-temperature sputtering method, in which a substrate temperature is heated in the range of 400 to 550 deg.C, and after a Ti film 6, which is thinner than the film 5 and consists of a high-melting point metal, is formed in a state that the substrate temperature is successively maintained, the substrate to be treated is cooled to normal temperatures. Then, a laminated film of the films 5 and 6 and the films 4 and 3 under the lower part of the laminated film are patterned en bloc by reactive ion etching using a resist pattern of a form, which corresponds to the form of a wiring pattern on the laminated film, as a mask and a low layer Al wiring 5L, which is constituted using the film 5 as its main conductive layer, is formed.

Description

[Detailed Description of the Invention] [Summary] A method of manufacturing a semiconductor device, particularly a method of forming a wiring made of AI or an alloy thereof that maintains reliability even when miniaturized. Alternatively, when forming an A1 alloy film by a high temperature sputtering method or a high temperature bias sputtering method with excellent step coverage, there is provided a method for suppressing the growth of AI grains and smoothing the upper surface of the A1 or A1 alloy film. The purpose is to prevent the occurrence of disconnection due to the migration of A1 in fine electrode wiring formed using an alloy film as the main conductive layer, and to prevent the occurrence of disconnection due to the migration of A1 in the inside of a semiconductor device in which the first film made of A1 or its alloy is the main conductive layer. When forming the electrode wiring, the semiconductor substrate is placed on the semiconductor substrate on which the insulating film is formed for 40 minutes.
A first sputtering step in which the first film is formed by a high-temperature sputtering method or a high-temperature bias sputtering method performed by heating to 0 to 550° C., and a continuous sputtering step in which the substrate temperature is at least equal to or near the first sputtering step. a second film made of a high-melting point metal or its silicide, which is thinner than the first film, is laminated on the first film by sputtering or bias sputtering while maintaining the same temperature. After the sputtering process and the second sputtering process are completed, the semiconductor substrate is cooled and set, and then the first
The method includes a step of collectively patterning a laminated film of the film and the second film to form electrode wiring.

[Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming wiring made of aluminum or an alloy thereof that maintains reliability even when miniaturized.

Aluminum (
AI), or 81-1%Si, Al-1%5i-
0,1%Cu, Al-0,15%Ti-0,1%C
Thin films of A1 alloys mainly composed of AI such as u are often used.

On the other hand, in highly integrated semiconductor devices such as LSIs, the width of internal wiring made of the above-mentioned AI or A1 alloy has become extremely fine, and as a result, the number of wiring breaks due to electromigration and stress migration has increased. However, the reliability of semiconductor devices tends to decrease.

Therefore, in order to prevent wire breakage due to stress migration or electromigration of the above-mentioned AI, we used A1 or A1, which has excellent step coverage, does not reduce the film thickness at stepped portions, and has a smooth upper surface to obtain a uniform film thickness. A method of forming internal wiring of A1 alloy is desired.

[Conventional technology]

Conventionally, thin films of A1 or A1 alloy used for AI wiring inside semiconductor devices have been formed by a normal sputtering method in which they are deposited while the substrate temperature is heated to a low temperature of about 250°C. However, as semiconductor devices become more highly integrated, the width and spacing of semiconductor elements and various patterns are reduced, and as a result contact holes, through holes,
As the aspect ratio of uneven steps on the element surface increases, when a normal sputtering method is used to form the A1 or 51 alloy film, the film thickness at the uneven steps increases due to insufficient step coverage. The decrease was significant, and disconnection due to AI migration was likely to occur in the A1 wiring at that portion, resulting in a problem of lowering the reliability of the semiconductor device.

Therefore, recently, the temperature of the substrate is 400-550℃, which is close to the melting point of AI.
A method has been proposed in which the step coverage of the deposited film is improved by depositing an AI or A1 alloy film by high-temperature sputtering or high-temperature bias sputtering in which deposition is performed at elevated temperatures.

However, although step coverage is improved in the high-temperature sputtering and high-temperature bias sputtering methods described above, the growth of AI grains is slowed down after sputtering, when the temperature is cooled from the high temperature during sputtering to room temperature. (for example, the grain size may reach about 10 am) and has grown large as shown schematically in Figure 3, No. 2.
Recesses 52 are formed at the boundaries of 1 grains 51A, 51B, 51C, etc., and unevenness is formed on the surface of the AI or A1 alloy thin film.

(In the figure, 50 is the lower insulating film.) Therefore, in the wiring formed by patterning the thin film of AI or A1 alloy, the cross-sectional area of each part is not uniform due to the unevenness formed on the upper surface, and the semiconductor device As devices become more highly integrated and the width of internal interconnects becomes extremely fine, regions where the cross-sectional area of interconnects locally decreases drastically occur, and electromigration and stress migration occur in these regions. This results in the problem of wire breakage.

[Problem to be solved by the invention]

Therefore, the present invention provides A1 or A1 as the main conductive layer.
Provided is a method for suppressing the growth of AI grains and smoothing the upper surface when forming an alloy thin film using a high temperature sputtering method or a high temperature bias sputtering method with excellent step coverage. The purpose of this invention is to prevent the occurrence of disconnection due to the migration of A1 in fine A1 wiring formed as a main conductive layer.

[Means to solve the problem]

The above-mentioned problem is that when forming electrode wiring inside a semiconductor device having a first film made of aluminum or its alloy as a main conductive layer, the semiconductor substrate is heated at 400 to 550°C on a semiconductor substrate on which an insulating film is formed. a first sputtering step in which the first thin film is formed by a high-temperature sputtering method or a high-temperature bias sputtering method performed by heating the substrate to a temperature of at least the same as or in the vicinity of the first sputtering step; on the first film in the state,
a second sputtering step of laminating a second film made of a high melting point metal or its silicide thinner than the first film by a sputtering method or a bias sputtering method;
According to the present invention, the method includes the step of cooling down the processed semiconductor substrate after the second suba-nota step, and then collectively patterning the laminated film of the first film and the second film to form electrode wiring. The problem is solved by a method for manufacturing a semiconductor device.

[For production]

That is, in the method of the present invention, after forming a thin film of AI or its alloy, which becomes the main conductive layer of the internal wiring, by high-temperature sputtering or high-temperature bias sputtering at 400 to 550°C, which improves step coverage,
While maintaining the substrate temperature at or near the temperature during the sputtering without lowering the substrate temperature, the melting point of the AI or its alloy formed by the sputtering is continuously increased to 6 degrees compared to the sputtering temperature. A thin film of a metal with an extremely high melting point or its silicide is formed by sputtering, and then the substrate is cooled to room temperature.

By doing this, the AI atoms, which are heated to a sputtering temperature close to the melting point and thus tend to migrate, will aggregate and grow into large grains as they cool down, while the melting point is extremely high. It is held down by a thin film of a high melting point metal or its silicide, which maintains its rigidity sufficiently at high temperatures of <400 to 550° C., and the surface of the thin film of AI or its alloy is formed to be substantially smooth.

Therefore, the cross-sectional area of the AI wiring formed by patterning the thin film of AI or its alloy containing the thin film of this high-melting point metal or its silicide is approximately uniform in each part,
A local increase in current density or a local decrease in strength is avoided, and wire breakage due to electromigration or stress migration is prevented.

〔Example〕

Hereinafter, the present invention will be specifically explained by examples with reference to the drawings.

FIGS. 1(a) to 1) are cross-sectional views of an embodiment of the method of the present invention, and FIG. 2 is a schematic diagram of a turret-type high-temperature sputtering apparatus. Identical objects are indicated by the same reference numerals throughout the figures.

Refer to FIG. 1(a) When manufacturing a semiconductor device with a multilayer wiring structure using the method of the present invention, Sing,
A lower insulating film 2 of about 1 μm thick made of PSG, BPSG, etc. is formed, and a contact hole (not shown) is formed in a region (not shown) of the lower insulating film 2 to expose a functional region of a semiconductor element (not shown) of the semiconductor substrate l. ), on the inner surface of the contact hole (not shown) and on the lower insulating film 2, a Ti film 3 with a thickness of about 200 mm becomes a contact metal and a Ti film 3 with a thickness of about 1000 mm becomes a barrier metal.
An iN film 4 is sequentially formed by ordinary Ar sputtering.

Refer to FIG. 1 Φ) Next, for example, Al An A1 alloy film 5 having a thickness of about 0.5 μm having a composition of -1%5i-0.1% Cu is formed, and then a thickness of about 0.5 μm is formed on the A1 alloy film 5 while the substrate temperature is continuously maintained at 500°C. After forming the Ti film 6 of about 300 people,
Cool the substrate to be processed to room temperature.

The continuous high-temperature sputtering of the A1 alloy film 5 and the Ti film 6 is performed in the following manner using, for example, a turret-type high-temperature sputtering apparatus whose schematic configuration is shown in FIG. 2.

That is, a heater 33 in a turret-type chamber 32 of a turret-type high-temperature sputtering apparatus, into which Ar gas is introduced and whose pressure is controlled at, for example, 5 to 10 anTorr.
T, which becomes the barrier metal, is placed on the anode 34 heated by
The substrate to be processed 31 on which the iN film 4 has been formed (Fig. 1(a)
)), and the temperature of the substrate to be processed is raised to 500° C., which is close to the melting point of AI. In this state, the turret type cathode 35, for example, A1-1%5i-0,1%C
The A1 alloy target 36 having the u composition is attached to the substrate 3 to be processed.
For example, a high frequency power of 13.56 MHz is applied between the anode 34 and the A1 alloy target 36 at 1 to 5 W/.
The lower layer A1 alloy film 5 is deposited by 0.5 μm on the TiN film 4 on the substrate 31 to be processed by applying power at a power density of about ci+”.
(see FIG. 1(b)), the Ar gas pressure in the chamber 32 was maintained at 5 to IQ mTorr, and the anode temperature, that is, the temperature of the substrate 31 to be processed, was maintained at 500°C. While maintaining the turret type cathode 3
5 by 90 degrees, the substrate to be processed 31 and the Ti target 3
Al-1%5i-0,1 which is kept at a high sputtering temperature of 500° C. by applying the same high frequency power between the anode 34 and the Ti target 37.
A Ti film 6 having a thickness of about 300 mm is formed on the lower layer A1 alloy film 5 having a composition of % Cu (see first box)), and then the substrate 31 to be processed is removed from above the anode 34 and cooled. In addition,
In FIG. 2, 3rd is an Ar gas inlet, 39 is a vacuum exhaust port, 40 is an RF power source, 41 is a capacitor, and 42 is a grounding point.

In the method of the present invention, the lower layer A1 alloy film 5 (or pure A1 film) formed by high-temperature sputtering as described above is cooled, and a metal or silicide film having a high melting point such as the Ti film 6 is formed thereon. Since this is performed after subsequent high-temperature sputtering, even at the high-temperature sputtering temperature when the upper surface of the lower layer AI alloy M5 (or pure Al film) is formed to cover the upper layer, when the substrate to be processed is cooled to room temperature, It is in a state where it is mechanically held down by a high melting point metal such as the Ti film 6 or its silicide film that maintains its rigidity. Therefore, when the A1 alloy film 5 is cooled from the high sputtering temperature, the large growth of the AI grains in the A1 alloy film 5 is suppressed, and the upper surface of the lower layer 41 alloy M5 becomes a smooth surface without irregularities.

Refer to FIG. 1(C) Next, as usual, a resist pattern (not shown) having a shape corresponding to the shape of the wiring pattern is formed on the laminated film of the A1 alloy film 5 and the Ti film 6, and this resist pattern is used as a mask. The A1 alloy film 5 and the Ti film 6 are formed by reactive ion etching using chlorine-based gas as an etching gas.
A lower layer AI wiring 5L having the A1 alloy film 5 as a main conductive layer is formed by patterning the laminated film of the above-mentioned layer, the TiN film 4 (barrier metal), and the Ti film 3 (contact metal) below it.

1 (see d) Next, on the surface on which the lower layer AI wiring 5L is formed, a glabellar insulating film 7 of about 1 μm thick made of PSC or the like is formed by the usual CVD method, and then this interlayer insulating film 7 is The Ti on the upper surface of the lower AI wiring 5L is removed by photolithography.
A through hole 8 exposing the membrane 6 is formed.

Referring to FIG. 1(e), next is an interlayer insulating film 7 including the inside of the through hole 8.
Similarly to the case where the lower layer A1 wiring 5L is formed above,
Using the turret type high temperature sputtering equipment shown in Figure 3,
1 μm thick with the same Al-1%5i-0.1% Cu composition as the lower layer wiring at a sputtering temperature of 500°C as described above.
Form an upper layer A1 alloy M9 of
While maintaining the temperature at 00° C., a Ti film 10 having a thickness of about 300 mm is formed on the AI alloy 9, and then the substrate to be processed on which the Ti film 10 has been formed is cooled to room temperature.

Note that during this cooling, the upper surface of the upper layer 41 alloy film 9 is
Since it is mechanically suppressed by the Ti film 10 formed to cover the alloy film 9, the A in the 41 alloy film 9
The grains of I are prevented from growing large, and the upper layer 41
The upper surface of the alloy film 9 becomes a smooth surface with no unevenness. At this time, the grain growth of the lower layer AI wiring 5L is also suppressed by the Ti film 6.

Refer to Figure 1) Next, the upper layer 41 alloy film 9 and the Tj film 10 are further patterned by the same method as the patterning of the lower layer wiring to form an upper layer AI wiring with a smooth surface with the upper layer 41 alloy film 9 as the main conductive layer. 9L is formed, and the multilayer wiring is completed.

Note that when the method of the present invention is carried out by high temperature bias sputtering, a voltage of about 20 to 50 V may be applied to the target in the sputtering apparatus shown in FIG. By using this high-temperature bias sputtering method, more smoothing can be achieved than with the high-temperature sputtering method shown in the above embodiment.

Further, according to the method of the above embodiment, sputtering of A1 or its alloy film and a film of a high melting point metal or its silicide formed on the film can be performed successively in the same apparatus without lowering the substrate temperature. The method of the present invention is not limited to the method of the above embodiment, but after high-temperature sputtering or high-temperature bias sputtering of AI or its alloy film is completed using a multi-chamber type sputtering apparatus having a plurality of sputtering chambers, the substrate is sputtered as described above. While maintaining the high temperature state as close as possible to the temperature during high-temperature sputtering, the substrate is moved to another chamber, and a sputtered film of a high melting point metal or its silicide is deposited on the AI or its alloy film while continuing to maintain the substrate temperature. It can also be carried out by forming a substrate and then cooling the substrate to room temperature.

Note that the smoothness of the layer may be improved by laying a thin film of a high-melting point metal such as Ti, for example, on the bottom of the A or 41 alloy film formed by high-temperature sputtering. .

Furthermore, in the method of the present invention, in addition to Ti shown in the examples, Mo, H, Pt, etc. are also used as the high melting point metal, and Ti5iz, Mo5iz, W, etc. are used as the high melting point metal silicide.
Siz, Pt5iz, etc. are used.

〔Effect of the invention〕

As explained above, according to the present invention, when a thin film of A1 or its alloy for forming electrode wiring is formed by high-temperature sputtering or high-temperature bias sputtering in order to improve step coverage, the thin film is AI inside
The coarsening of the dalein is prevented and the surface of the thin film is kept smooth.

Therefore, according to the present invention, step coverage is excellent;
In addition, since it is possible to form AI wiring made of A1 or its alloy with uniform thickness in each part, the cross-sectional area of each part of the AI wiring can be made almost uniform, and even when the wiring is miniaturized, A1 due to local stress concentration can be formed. Disconnection of the Ai wiring due to stress migration of A1 or electromigration of A1 due to local high current density is prevented, and reliability of highly integrated semiconductor devices can be improved.

[Brief explanation of the drawing]

Figures 1(a) to 5) are process cross-sectional views of an embodiment of the method of the present invention, Figure 2 is a schematic diagram of the turret-type high-temperature sputtering apparatus used in the embodiment, and Figure 3 is a conventional problem. FIG. In the figure, l is the semiconductor substrate, 2 is the lower insulating film, 3 is the Ti film (contact metal), 4 is the TiN film (barrier metal), and 5 is the lower layer AI (AI-1%5i-0,1%Cu). Alloy film, 5L is lower layer AI wiring, 6.10 is Ti film, 7 is eyebrow insulating film, 8 is through hole, 9 is upper layer A1 υ■ 1%Si 0.1%Cu) Alloy film 9L is upper layer A1 wiring shows.

Claims (1)

[Claims] 1. When forming electrode wiring inside a semiconductor device in which a first film made of aluminum or its alloy is a main conductive layer, the semiconductor substrate is placed on a semiconductor substrate on which an insulating film is formed. 4
a first sputtering step in which the first film is formed by a high-temperature sputtering method or a high-temperature bias sputtering method performed by heating to 00 to 550° C.; and a continuous sputtering step in which the substrate temperature is at least the same as or near the first sputtering step. a second film made of a high-melting point metal or its silicide, which is thinner than the first film, is laminated on the first film by sputtering or bias sputtering while maintaining the same temperature. A sputtering step, and a step of cooling the semiconductor substrate after completing the second sputtering step, and then collectively patterning the laminated film of the first film and the second film to form electrode wiring. A method for manufacturing a semiconductor device, characterized by: 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first sputtering step and the second sputtering step are performed in the same container. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the first sputtering step and the second sputtering step are performed in different containers that are hermetically connected.