JPH04111615A - Phase locked loop circuit - Google Patents

Phase locked loop circuit

Info

Publication number
JPH04111615A
JPH04111615A JP2229724A JP22972490A JPH04111615A JP H04111615 A JPH04111615 A JP H04111615A JP 2229724 A JP2229724 A JP 2229724A JP 22972490 A JP22972490 A JP 22972490A JP H04111615 A JPH04111615 A JP H04111615A
Authority
JP
Japan
Prior art keywords
oscillator
frequency
sweep
output
controlled oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2229724A
Other languages
Japanese (ja)
Inventor
Takuya Kamakura
鎌倉 拓也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2229724A priority Critical patent/JPH04111615A/en
Publication of JPH04111615A publication Critical patent/JPH04111615A/en
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To attain quick recovery of synchronization by applying an output signal of a sweep oscillator to a differentiating circuit. CONSTITUTION:When the phase locked loop is in the lock state, since an impedance at a point 6 is zero, a sweep oscillator 5 is not oscillated and when out of synchronism takes place, since the impedance at a point 6 is changed, the sweep oscillator 5 starts oscillation and the oscillated output is fed to a differentiating circuit 7, from which a differentiated waveform output is obtained. The output waveform is fed to a voltage controlled oscillator 2 to sweep the oscillating frequency of the oscillator 2 over a wide frequency range and the synchronization recovery is applied to an input signal whose frequency is within the sweep frequency. The frequency change in the oscillating frequency of the oscillator 2 is slow in the vicinity of a reference frequency and the convergence to the reference frequency is facilitated and quick synchronization recovery is realized.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は位相同期回路に関し、特に同期回復時間の短縮
を図った位相同期回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a phase-locked circuit, and more particularly to a phase-locked circuit that reduces synchronization recovery time.

〔従来の技術〕[Conventional technology]

従来の位相同期回路の一例を第3図に示す。同図におい
て、1は信号の入力端子、2は電圧制御発振器、3は入
力信号と電圧制御発振器2の発振出力の間の位相誤差を
検出する位相比較器、4は低域通過ろ波器である。この
位相比較器3、電圧制御発振器2、低域通過ろ波器器4
で構成される位相同期ループ中の点6に掃引発振器5が
接続されている。
An example of a conventional phase locked circuit is shown in FIG. In the figure, 1 is a signal input terminal, 2 is a voltage-controlled oscillator, 3 is a phase comparator that detects the phase error between the input signal and the oscillation output of voltage-controlled oscillator 2, and 4 is a low-pass filter. be. This phase comparator 3, voltage controlled oscillator 2, low pass filter 4
A sweep oscillator 5 is connected to a point 6 in a phase-locked loop consisting of.

この位相同期回路では、位相同期ループが同期状態にあ
る場合には、点6のインピーダンスがほぼ0となるため
、掃引発振器5は発振を停止し、通常の位相同期ループ
として動作する。
In this phase-locked circuit, when the phase-locked loop is in a locked state, the impedance at point 6 becomes approximately 0, so the sweep oscillator 5 stops oscillating and operates as a normal phase-locked loop.

次に、同期外れが起こると、点6のインピーダンスによ
って掃引発振器5は発振を開始する。この掃引発振器5
の発振出力は電圧制御発振器2へ加えられ、電圧制御発
振器2の発振周波数を広い周波数範囲にわたり掃引する
Next, when synchronization occurs, the impedance at point 6 causes the sweep oscillator 5 to start oscillating. This sweep oscillator 5
The oscillation output is applied to the voltage controlled oscillator 2, and sweeps the oscillation frequency of the voltage controlled oscillator 2 over a wide frequency range.

このように、電圧制御発振器2の発振周波数を掃引する
ことにより、その掃引周波数範囲にある入力信号に対し
ては速やかに同期回復を行うことかできる。同期が回復
すると、掃引発振器50発振は停止して通常の位相同期
ループとして働く。
By sweeping the oscillation frequency of the voltage controlled oscillator 2 in this manner, synchronization can be quickly recovered for input signals within the swept frequency range. When synchronization is restored, sweep oscillator 50 oscillates and operates as a normal phase-locked loop.

なお、このような構成の位相同期ループ、および掃引発
振器5の動作内容に関連する事項については、例えば特
公昭49−42268号に詳細に説明されているので、
ここではその説明は省略する。
Note that matters related to the phase-locked loop having such a configuration and the operation contents of the sweep oscillator 5 are explained in detail in, for example, Japanese Patent Publication No. 49-42268.
The explanation thereof will be omitted here.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の位相同期回路では、同期外れ状態のとき
に掃引発振器5が発振し、電圧制御発振器の発振周波数
を掃引するが、掃引発振器5の出力波形は第5図に示す
ように、正弦波もしくは正弦波形のピークをクリップし
た波形となっている。
In the conventional phase-locked circuit described above, the sweep oscillator 5 oscillates when the synchronization is out of order and sweeps the oscillation frequency of the voltage controlled oscillator, but the output waveform of the sweep oscillator 5 is a sine wave as shown in FIG. Alternatively, the waveform is obtained by clipping the peak of the sine waveform.

このため、この波形で制御される電圧制御発振器2の発
振周波数は、基準周波数付近において急激に変化される
特性となり、発振周波数を基準周波数に収束することが
困難になり、入力信号の周波数が基準周波数近傍にある
にもかかわらず、同期回復が遅れるという問題がある。
For this reason, the oscillation frequency of the voltage controlled oscillator 2 controlled by this waveform has a characteristic that changes rapidly near the reference frequency, making it difficult to converge the oscillation frequency to the reference frequency, and the frequency of the input signal changes to the reference frequency. There is a problem in that synchronization recovery is delayed even though the frequencies are close to each other.

本発明の目的は、同期回復を迅速に行うようにした位相
同期回路を提供することにある。
An object of the present invention is to provide a phase-locked circuit that quickly recovers synchronization.

[課題を解決するための手段] 本発明の位相同期回路は、電圧制御発振器と、入力され
る信号とこの電圧制御発振器の出力信号との位相比較を
行う位相比較器と、位相比較器の出力をろ渡して電圧制
御発振器の制御電圧を出力する低域通る波器と、電圧制
御発振器を掃引させる信号を出力する掃引発振器と、こ
の掃引発振器の出力側に接続された微分回路とを備えて
いる。
[Means for Solving the Problems] The phase locked circuit of the present invention includes a voltage controlled oscillator, a phase comparator that performs a phase comparison between an input signal and an output signal of the voltage controlled oscillator, and an output of the phase comparator. A wave generator that outputs a control voltage for a voltage controlled oscillator by filtering the voltage, a sweep oscillator that outputs a signal that sweeps the voltage controlled oscillator, and a differentiation circuit connected to the output side of the sweep oscillator. There is.

微分回路は、例えばCR回路で構成することができる。The differentiating circuit can be configured with a CR circuit, for example.

〔作用〕[Effect]

本発明によれば、微分回路により、基準周波数を与える
電圧の近傍で掃引信号の波形の傾斜を緩やかな特性にし
、基準周波数の近傍での電圧制御発振器の周波数変化を
緩やかにして基準周波数への収束を容易にし、迅速な同
期回復を可能とする。
According to the present invention, the differentiating circuit makes the slope of the waveform of the sweep signal gentle in the vicinity of the voltage that provides the reference frequency, and the frequency change of the voltage controlled oscillator in the vicinity of the reference frequency is made gentle so that the waveform can be adjusted to the reference frequency. Facilitates convergence and enables quick synchronization recovery.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の構成を示すブロック図であ
る。同図において、lは信号の入力端子、2は電圧制御
発振器、3は人力信号と電圧制御発振器2の発振出力の
間の位相誤差を検出する位相比較器、4は低域ろ波器で
あり、第3図に示した従来構成と同じである。この位相
比較器3、電圧制御発振器2、低域ろ波器4で構成され
る位相同期ループの中の点6に、微分回路7が接続され
、さらにこの微分回路7を介して掃引発振器5を接続し
ている。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, l is a signal input terminal, 2 is a voltage controlled oscillator, 3 is a phase comparator that detects the phase error between the human input signal and the oscillation output of the voltage controlled oscillator 2, and 4 is a low-pass filter. , is the same as the conventional configuration shown in FIG. A differentiating circuit 7 is connected to a point 6 in the phase-locked loop composed of the phase comparator 3, the voltage controlled oscillator 2, and the low-pass filter 4. Connected.

この掃引発振器5は従来と同しものが使用できる。また
、微分回路7は、例えば第2図に示すようにコンデンサ
Cと抵抗Rとで構成されるものが使用される。
This sweep oscillator 5 can be the same as the conventional one. Further, as the differentiating circuit 7, for example, one constructed of a capacitor C and a resistor R as shown in FIG. 2 is used.

この位相同期回路では、位相同期ループが同期状態にあ
る場合には、点6のインピーダンスがOであるため掃引
発振器5は発振せず、通常の位相同期ループとして動作
する。
In this phase-locked circuit, when the phase-locked loop is in a locked state, the impedance at point 6 is O, so the sweep oscillator 5 does not oscillate and operates as a normal phase-locked loop.

次に、同期外れが起こると、点6のインピーダンスが変
化されるため、掃引発振器5は発振を開始する。この掃
引発振器5の発振出力は第5図に示したように正弦波あ
るいはクリップされた正弦波であるが、微分回路7を通
されることで、微分回路7の出力波形は第4図に示すよ
うな微分された波形となる。すなわち、基準周波数を与
える電圧の近傍で傾斜が緩やかで、基準周波数電圧より
も離れるに従って傾斜が急になる波形となる。
Next, when desynchronization occurs, the impedance at point 6 is changed, so that sweep oscillator 5 starts oscillating. The oscillation output of the sweep oscillator 5 is a sine wave or a clipped sine wave as shown in FIG. The result is a differentiated waveform like this. That is, the waveform has a gentle slope in the vicinity of the voltage that provides the reference frequency, and the slope becomes steeper as the distance from the reference frequency voltage increases.

そして、この出力波形が電圧制御発振器2へ加えられ、
該電圧制御発振器2の発振周波数を広い周波数範囲にわ
たり掃引し、その掃引周波数範囲にある入力信号に対し
て同期回復を行うことができる。このとき、電圧制御発
振器2を掃引する信号は、前記したように基準周波数電
圧を与える電圧の近傍でその傾斜が緩やかとなるため、
電圧制御発振器2の発振周波数は基準周波数の近傍で周
波数変化が緩やかになって基準周波数への収束が容易と
なり、速やかに同期回復を実現することができる。
This output waveform is then applied to the voltage controlled oscillator 2,
The oscillation frequency of the voltage controlled oscillator 2 can be swept over a wide frequency range, and synchronization recovery can be performed for input signals within the swept frequency range. At this time, the signal that sweeps the voltage controlled oscillator 2 has a gentle slope near the voltage that provides the reference frequency voltage, as described above.
The oscillation frequency of the voltage controlled oscillator 2 has a gradual change in frequency near the reference frequency, and convergence to the reference frequency is facilitated, and synchronization recovery can be quickly achieved.

同期が回復すると点6のインピーダンスは再びOとなり
、掃引発振器5の発振が停止して通常の位相同期ループ
として動作する。
When synchronization is restored, the impedance at point 6 becomes O again, and the sweep oscillator 5 stops oscillating and operates as a normal phase-locked loop.

なお、微分回路7を構成するCとRの定数を選ふことに
より、所望の掃引特性を得ることができる。また、微分
回路は他の構成であっても良いことは言うまでもない。
Note that by selecting the constants of C and R constituting the differentiating circuit 7, desired sweep characteristics can be obtained. Furthermore, it goes without saying that the differentiating circuit may have other configurations.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、掃引発振器の出力信号を
微分回路に通すことにより、基準周波数を与える電圧の
近傍で掃引信号の波形の傾斜を緩やかな特性にでき、こ
れにより電圧制御発振器の基準周波数付近の周波数変換
が緩やかになり、同期回復を速やかに行なうことができ
る効果がある。
As explained above, the present invention allows the waveform of the sweep signal to have a gentle slope in the vicinity of the voltage that provides the reference frequency by passing the output signal of the sweep oscillator through a differentiating circuit. This has the effect that frequency conversion around the frequency becomes gradual, and synchronization can be quickly recovered.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の位相同期回路の一実施例のブロック図
、第2図は微分回路の回路図、第3図は従来の位相同期
回路のブロック図、第4図は微分回路から出力される掃
引信号の波形図、第5図は従来の掃引信号の波形図であ
る。 ■・・・入力端子、2・・・電圧制御発振器、3・・・
位相比較器、4・・・低域通過ろ波器、5・・・掃引発
振器、第3
Figure 1 is a block diagram of an embodiment of the phase-locked circuit of the present invention, Figure 2 is a circuit diagram of a differentiating circuit, Figure 3 is a block diagram of a conventional phase-locked circuit, and Figure 4 shows the output from the differentiating circuit. FIG. 5 is a waveform diagram of a conventional sweep signal. ■...Input terminal, 2...Voltage controlled oscillator, 3...
Phase comparator, 4...Low pass filter, 5...Sweep oscillator, 3rd

Claims (1)

【特許請求の範囲】 1、電圧制御発振器と、入力される信号とこの電圧制御
発振器の出力信号との位相比較を行う位相比較器と、位
相比較器の出力をろ波して前記電圧制御発振器の制御電
圧を出力する低域通ろ波器と、前記電圧制御発振器を掃
引させる信号を出力する掃引発振器と、この掃引発振器
の出力側に接続された微分回路とを備えることを特徴と
する位相同期回路。 2、微分回路はCR回路で構成されてなる特許請求の範
囲第1項記載の位相同期回路。
[Claims] 1. A voltage controlled oscillator, a phase comparator that performs a phase comparison between an input signal and an output signal of the voltage controlled oscillator, and a filter that filters the output of the phase comparator to generate the voltage controlled oscillator. a low-pass filter that outputs a control voltage; a sweep oscillator that outputs a signal for sweeping the voltage-controlled oscillator; and a differential circuit connected to the output side of the sweep oscillator. synchronous circuit. 2. The phase locked circuit according to claim 1, wherein the differentiating circuit is constituted by a CR circuit.
JP2229724A 1990-08-31 1990-08-31 Phase locked loop circuit Pending JPH04111615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2229724A JPH04111615A (en) 1990-08-31 1990-08-31 Phase locked loop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2229724A JPH04111615A (en) 1990-08-31 1990-08-31 Phase locked loop circuit

Publications (1)

Publication Number Publication Date
JPH04111615A true JPH04111615A (en) 1992-04-13

Family

ID=16896705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2229724A Pending JPH04111615A (en) 1990-08-31 1990-08-31 Phase locked loop circuit

Country Status (1)

Country Link
JP (1) JPH04111615A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4942268A (en) * 1972-08-10 1974-04-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4942268A (en) * 1972-08-10 1974-04-20

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