KR19980026106A - Frequency multiplier - Google Patents

Abstract

A frequency multiplier is disclosed. The frequency multiplying device comprises: triangular wave generating means for outputting a first triangular wave signal and a second triangular wave signal inversely opposite to the first triangular wave signal using the input first square wave signal and a predetermined reference voltage; first and second triangular waves DC adjusting means for matching each DC component of the signals to a predetermined DC component, a comparator for comparing the first and second triangular wave signals matched with the DC component, and outputting the second square wave signal as a second square wave signal; And an exclusive logical sum of the square wave signals to output a frequency multiplied signal while matching the phase of the first square wave signal. Therefore, a simpler circuit configuration than a frequency multiplier using a PLL can effectively multiply desired signals and reduce costs.

Description

Frequency multiplier

The present invention relates to a frequency multiplying device, and more particularly, to a frequency multiplying device multiplying a frequency without requiring an adjustment terminal in a simpler configuration than a phase locked loop (PLL).

Hereinafter, with reference to the accompanying drawings a conventional frequency multiplier will be described as follows.

1 is a schematic block diagram of a frequency multiplier using a conventional PLL, which includes a 1 / M divider (2), a programmable divider (4), a phase comparator (6), and a low pass filter (LPF). (8), a voltage controlled oscillator (VCO) 10, and an M multiplier 12.

The 1 / M (M is an integer) divider 2 shown in FIG. 1 inputs a frequency step Δf to output a reference frequency divided by 1 / M, and a programmable divider 4. Inputs an oscillation frequency fo 'from the VCO 10 and outputs a programmed frequency fv. The phase comparator 6 inputs fr and fv to compare phases, and outputs the compared result as an error voltage. The LPF 8 filters the DC component of the error voltage and outputs it to the VCO 10. The VCO 10 adjusts the oscillation frequency in response to the output of the LPF 8. In addition, the oscillation frequency fo 'from the VCO 10 is input to the M multiplier 12 to obtain an M multiplied frequency fo. In order to match the frequency of the original signal with the multiplied frequency, the frequency multiplier must adjust the oscillation frequency of the VCO 10 until the error voltage from the phase comparator 6 becomes zero.

Therefore, it is troublesome to adjust the VCO in order to match the phase, and there is a problem of having a complicated circuit configuration.

The technical problem to be achieved by the present invention is to provide a frequency multiplying device which multiplies the frequency while exactly matching the phase of the original signal without using a conventional PLL.

1 is a schematic block diagram of a frequency multiplier using a conventional PLL.

2 is a block diagram of a frequency multiplying apparatus according to the present invention.

3A to 3E are waveform diagrams of respective terminals of the frequency multiplier of the present invention.

In order to achieve the above object, the frequency multiplying apparatus according to the present invention uses a first square wave signal and a predetermined reference voltage to output triangular wave generating means for outputting a first triangular wave signal and a second triangular wave signal in phase with the first triangular wave signal. A DC adjusting means for matching each DC component of the first and second triangle wave signals to a predetermined DC component, a comparator for comparing the first and second triangle wave signals having matched DC components and outputting the second square wave signal as a second square wave signal; It consists of an exclusive logical sum of the first square wave signal and the second square wave signal and outputting a frequency multiplied signal while matching the phase of the first square wave signal.

Hereinafter, with reference to the accompanying drawings the configuration and operation of the frequency multiplier according to the present invention will be described as follows.

2 is a block diagram of a frequency multiplying apparatus according to the present invention, which is composed of a triangular wave generator 20, a DC adjuster 30, a comparator 40, and an exclusive logical sum (XOR) 50. The triangular wave generator 20 shown in FIG. 2 is composed of an Operational Transconductance Amplifier (OTA) 22, a current buffer 24, and two capacitors C1 and C2.

As the inputs Vin and Vref of the frequency multiplier according to the present invention, the first square wave signal 52 and the predetermined reference voltage 54 as shown in FIG. 3A are input to the triangular wave generator 20. The OTA 22 constituting the triangle wave generator 20 outputs the first and second currents Io ₁ and Io ₂ in two states that are opposite to each other, and the current buffer 24 is generated from the OTA 22. The first and second currents are temporarily stored and transferred to the first and second capacitors C1 and C2, where C1 = C2, respectively. As shown in FIG. 2, since C1 and C2 are connected between the first and second currents Io ₁ and Io ₂ and the input Vref, respectively, the outputs V1 and V2 of the triangular wave generator 20. Can be expressed as follows.

[Equation 1]

V1 = Vc ₁ + Vref = Io ₁ * t / C1 + Vref

V2 = Vc ₂ + Vref = Io ₂ * t / C2 + Vref

Here, Vc ₁ is a voltage across C1, Vc ₁ = Io ₁ * t / C1, Vc ₂ is a voltage across C2, and Vc ₂ = Io ₂ * t / C2, and Vref is an input reference voltage. The first and second currents Io ₁ and Io ₂ from the OTA are Io ₁ = (Vin-Vref) gm and Io ₂ = (Vref-Vin) gm, respectively.

In Equation 1, V1 increases when Vin is greater than Vref and decreases when Vin is less than Vref, so that V1 is output as the first triangle wave signal 56 of FIG. A second triangle wave signal 58 of FIG. 3B which is inverse to the one triangle wave signal 56 is output.

The first and second triangle wave signals 56 and 58 output in this manner are input to the DC controller 30. The DC adjuster 30 matches the DC components of the two triangular waves that are in phase with each other to a predetermined DC component. For example, the DC component of the second or first triangle wave may be adjusted based on the first or second triangle wave, or the DC component of the first and second triangle wave may be adjusted based on an arbitrary DC component. Accordingly, as shown in FIG. 3C, the DC components are matched to output the signals 60 and 62 where the first and second triangle wave signals 56 and 58 are correctly crossed.

The comparator 40 compares the crossed first and second triangular waves 60 and 62 so that when the first triangular wave 60 is larger than the second triangular wave 62, the comparator 40 is in a high state and the second triangular wave 62 is the first triangular wave ( If larger than 60), a second square wave signal as shown in FIG. This signal is consequently a signal that is 90 ° out of phase with respect to the original first square wave signal 52.

Therefore, when the exclusive square sum 50 exclusively combines the first square wave signal 52 and the second square wave signal shifted by 90 ° out of the comparator 40, the output Vout of the frequency multiplier of the present invention is shown in FIG. As shown, a signal multiplied by twice the frequency is obtained. At this time, the multiplied signal is a signal in which the phase exactly matches the original signal intended for the present invention.

It will be apparent to those skilled in the art that the present invention is not limited to the above embodiment, and variations thereof are possible. For example, the triangular wave generator is composed of an OTA, a current buffer, and a capacitor, but any means for generating a triangular wave may be used.

As described above, according to the frequency multiplying apparatus according to the present invention, by using a triangular wave generator, a DC adjusting unit, a comparator, and an exclusive logical sum, a desired signal can be effectively multiplied with a simpler configuration than a frequency multiplying apparatus using a conventional PLL. And save cost.

Claims (4)

The first square wave signal increases when the first square wave signal is greater than the reference voltage and decreases when the first square wave signal is smaller than the reference voltage by using the input first square wave signal and the predetermined reference voltage. The second triangle wave signal is inverse to the first triangle wave signal. Outputting triangle wave generating means; DC adjustment means for matching each DC component of the first and second triangle wave signals to a predetermined DC component; Comparing the first and second triangle wave signals having a matched DC component, the first triangle wave signal is low when the first triangle wave signal is larger than the second triangle wave signal, and the second triangle wave signal is high when the second triangle wave signal is larger than the first triangle wave signal. A comparator for outputting a second square wave signal in a transition state; And And an exclusive logical sum of the inputted first square wave signal and the second square wave signal to output a frequency multiplied signal while coinciding with a phase of the first square wave signal. The method of claim 1, wherein the triangle wave generating means, An OTA for inputting the first square wave signal and the predetermined reference signal to output first and second currents that are in phase with each other; A current buffer to temporarily store the first and second currents; A first capacitor connected between the first current and the reference voltage; And A second capacitor connected between the second current and the reference voltage, And a signal between the first capacitor and the current buffer as the first triangle wave signal, and a signal between the second capacitor and the current buffer as the second triangle wave signal, respectively. The method of claim 1, wherein the DC control means, And adjusting a DC component of at least one triangle wave signal to match the DC component of the first and second triangle wave signals generated from the triangle wave generator. The method of claim 1, wherein the comparator, And comparing the first and second triangular wave signals output from the DC adjusting means to output a second square wave signal shifted by 90 ° out of the first square wave signal.