JPH04105433A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To realize a wide frequency pull-in range in a short time by discriminating a sign of a signal resulting from applying orthogonal demodulation to a biphase modulation signal, detecting the direction of a frequency offset depending on a change in the state of the sign and fetching the result to a phase locked loop as a signal to decrease the offset. CONSTITUTION:An output of a limiter 2 is inputted to a detector 9 on one hand, in which a state of a sign change is discriminated, the output controls a coefficient device 10, a positive or negative proper coefficient is multiplied with an in phase signal (b) and the result is fed to an integration device 6 via an adder 11 to form a frequency control system circuit. Thus, a frequency deviation between an input signal (a) and an output signal (d) of a voltage controlled oscillator 8 is eliminated and when the phase locked loop is locked, an output of a low pass filter 12 is a constant DC voltage, a lock detector 13 discriminates it and its output turns off a switch 14.

Description

[Detailed description of the invention] [Industrial application field] INDUSTRIAL APPLICATION This invention is utilized for a phase locked circuit.

The present invention is particularly applicable to a phase locked circuit for a two-phase phase modulated signal that requires a wide frequency pull-in range.

〔overview〕

The present invention provides a phase synchronization circuit for two-phase phase signals, in which the sign of a signal obtained by orthogonally demodulating a two-phase phase modulation signal is determined,
By detecting the direction of the frequency offset from the change in the sign state and incorporating it into the phase-locked loop as a signal to reduce the offset, it is possible to achieve a wide frequency pull-in range in a short time even at low S/N. This prevents the increase in sinks and enables stable operation.

BACKGROUND ART FIG. 2 is a block diagram showing an example of a conventional phase synchronization circuit for two-phase phase modulation signals.

In FIG. 2, the in-phase signal S and the quadrature signal C output from the quadrature signal demodulation circuit 1 are sent to a delay detection type layer wave number detection circuit composed of a delay circuit 21 and a multiplication circuit 22, and are sent to a voltage controlled oscillator 8. The frequency difference between the output of and the input signal a is detected. The proportional control circuit 23 and the integral control circuit 24 form a secondary loop, the output of which is input to the voltage controlled oscillator 8, forming a secondary phase locked loop.

The frequency difference detection output is added to a loop by an adder 25 to expand the pull-in range of the phase locked circuit.

[Problem to be solved by the invention]

The above-described conventional phase-locked circuit has a drawback in that it is difficult to adjust its characteristics such that when the frequency difference is 0, the demodulated output is 0 when detecting the frequency difference.

In addition, with this frequency difference detection method, it is relatively difficult to suppress the frequency within the demodulation range and to suppress the threshold effect at low S/N.
There was a drawback that the DC demodulated output fluctuated over time, making it difficult to pull in the phase-locked circuit.

The purpose of the present invention is to eliminate the above-mentioned drawbacks, thereby realizing a wide frequency pull-in range in a short period of time even when the S/N is low, and furthermore, the purpose of the present invention is to achieve phase synchronization that prevents an increase in jitter and operates stably. The purpose is to provide circuits.

[Measures to solve problems]

The present invention provides a phase locked circuit including a voltage controlled oscillator and a quadrature signal demodulation circuit that demodulates an input signal using an output signal of the voltage controlled oscillator and outputs an in-phase signal and a quadrature signal. an integral control system circuit that multiplies, integrates and adds a control voltage signal to the voltage controlled oscillator, and a frequency control system that determines the sign of the orthogonal signal and detects the direction of frequency offset based on a change in the state of the output a frequency control integration circuit that integrates the detection output of the frequency control system circuit according to a control signal; and a frequency control integration circuit that performs synchronization of the phase of the demodulated signal using the orthogonal signal;
The present invention is characterized by comprising an integration control circuit that outputs the control signal to stop the integration after the frequency deviation is pulled within a predetermined frequency deviation.

Further, in the present invention, the integral control system circuit includes a first coefficient multiplier for multiplying a positive or negative coefficient according to the sign of the orthogonal signal, and a predetermined coefficient for each output of the first coefficient multiplier. second and third coefficient units for multiplication, an integrator for integrating the output of the third coefficient unit, and a first adder for adding the output of the integrator and the output of the second coefficient unit. including
The frequency control system circuit includes a limiter that inputs the orthogonal signal and determines its sign, a detector that inputs the output of the limiter and determines the state of change in sign, and a limiter that inputs the orthogonal signal and determines the sign of the signal, and a detector that inputs the output of the limiter and determines the state of change in the sign. a fourth coefficient multiplier that multiplies the phase signal by a predetermined coefficient; the frequency control integration circuit includes a switch that turns on or off the output of the fourth coefficient multiplier according to a control signal; The integration control circuit includes a second adder that adds the output of the fourth coefficient multiplier to the output of the third coefficient multiplier, and the integration control circuit includes a low-pass filter that receives the orthogonal signal and cuts off high frequency components. , and a lock detector that detects a change in the output of the low-pass filter and outputs the control signal.

[Function] - The integral control system circuit essentially constitutes a loop filter,
forming a first phase-locked loop; The frequency control system circuit constitutes the first phase-locked loop, and detects the direction of the frequency offset by determining the sign of the orthogonal signal and detecting changes in its output.The frequency control integration circuit reduces the frequency offset. The signal is taken into the first phase-locked loop as a signal. When the integration control circuit confirms phase synchronization of the demodulated signal by monitoring the orthogonal signal, it causes the frequency control integration circuit to stop integration.

Therefore, even when the S/N is low, it is possible to realize a wide frequency pull-in range in a short time, and furthermore, it is possible to prevent an increase in jitter and operate stably.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

This embodiment is a phase synchronized circuit comprising a voltage controlled oscillator 8 and a quadrature signal demodulation circuit 1 which demodulates an input signal a using an output signal d of the voltage controlled oscillator 8 and outputs an in-phase signal and a quadrature signal C. , the present invention is characterized by an integral control system circuit that multiplies an in-phase signal by a predetermined coefficient, performs integration and addition, and inputs a control voltage signal to the voltage controlled oscillator, and determines the sign of the orthogonal signal C. A frequency control system circuit that detects the direction of frequency offset based on a change in the state of the output, a frequency control integration circuit that integrates the detected output of this frequency control system circuit according to the control signal e, and a frequency control integration circuit that integrates the detected output of the frequency control system circuit according to the control signal e, A control signal e that checks synchronization and stops the integration after the frequency deviation is within a predetermined range.
It is equipped with an integration control circuit that outputs .

The integral control system circuit includes a first coefficient multiplier 3 that multiplies a positive or negative coefficient depending on the sign of the orthogonal signal C, and multiplies the output of the first coefficient multiplier 3 by a predetermined coefficient, respectively. second and third coefficient multipliers 4 and 5; an integrator 6 that integrates the output of the third coefficient multiplier 5; and an integrator 6 that integrates the output of the third coefficient multiplier 5; One adder 7
The frequency control system circuit includes: a limiter 2 which inputs the orthogonal signal C and determines its sign; a detector 9 which inputs the output of the limiter 2 and determines the state of change in sign; and the detector 9. and a fourth coefficient multiplier 10 that multiplies the in-phase signal by a predetermined coefficient according to the output of the fourth coefficient multiplier 9, and the frequency control integration circuit multiplies the output of the fourth coefficient multiplier 10 by a predetermined coefficient according to the control signal e. The integration control circuit includes a switch 14 that turns on or off, and a second adder 11 that adds the output of the fourth coefficient multiplier 10 to the output of the third coefficient multiplier 5. It includes a low-pass filter 12 that cuts off input high-frequency components, and a lock detector 13 that detects changes in the output of the low-pass filter 12 and outputs a control signal e.

Next, the operation of this embodiment will be explained.

When a two-phase phase modulation signal is given as the input signal a,
The quadrature signal demodulation circuit 1 obtains two demodulated outputs, an in-phase signal A and a quadrature signal C, from the input signal a and the output signal d of the voltage controlled oscillator 8.

The sign of the quadrature signal C is determined by a limiter 2, and one of its outputs controls a coefficient multiplier 3, which multiplies the in-phase signal by an appropriate positive or negative coefficient. The output of the coefficient unit 3 is the output of the coefficient unit 4
, a coefficient multiplier 5, an integrator 6, and an adder 7, and is fed back to the orthogonal signal demodulation circuit 1 through a voltage controlled oscillator 8, forming a second-order phase-locked loop.

On the other hand, the output of the limiter 2 is input to the detector 9, where the state of change in sign is determined, and the coefficient multiplier 1
0, multiplies the in-phase signal by an appropriate positive or negative coefficient, and adds the multiplied signal to the input of the integrator 6 via the adder 11 to form a frequency control system circuit.

Further, when the phase synchronization of the demodulated signal is confirmed by the low-pass filter 12 and the lock detector 13, the orthogonal signal C turns off the switch 14, and turns on the detector 9 and the coefficient multiplier 10 of the frequency control system circuit. Detach from the loop.

In the frequency control circuit, the frequency offset (
The in-phase signal is multiplied by an appropriate positive or negative coefficient and added to the integrator 6 to reduce the offset, and as a result, the input signal a and the voltage controlled oscillator 8 The control voltage of the voltage controlled oscillator 8 is changed so that the frequency deviation of the pressure signal d is reduced.

Due to the effect of the frequency control system circuit, the frequency deviation between the input signal a and the output signal d of the voltage controlled oscillator 8 is reduced, and when the phase-locked loop is synchronized, the low-pass filter 12
The output becomes a constant DC voltage, and the lock detector 13 determines this and turns the switch 14 "off" using that output.

This prevents the frequency control system circuit from operating even though the synchronization occurs when the S/N decreases, thereby preventing an increase in jitter compared to normal phase-locked loop operation.

Effect of S barking] As explained above, the present invention determines the sign of a signal obtained by orthogonally demodulating a binary phase modulation signal, detects the direction of frequency offset from a change in the state of the sign, and reduces the offset. By inputting the signal into the phase-locked loop as a signal, it is possible to operate at a relatively low S/N and realize a wide frequency scattering range in a short time.

Furthermore, when the frequency offset falls within a desired frequency deviation, by separating the frequency control operation from the phase-locked loop, it is possible to prevent an increase in jitter at low S/N and realize stable phase-locked operation. effective.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a block diagram showing a conventional example. 1... Orthogonal signal demodulation circuit, 2... Limiter, 3.4
．． 5.10...Coefficient unit, 6...Integrator, 7.11.
25... Adder, 8... Voltage controlled oscillator, 9 peak detector, 12... o-lotus filter, 13... Lock detector, 14... Switch, 21... Delay circuit, 2
2...Multiplication circuit, 23...Proportional control circuit, 24...
- Integral control circuit, a...input signal, b...in-phase signal, C...orthogonal signal, d...output signal (of voltage controlled oscillator), e...control signal.

Claims (1)

[Scope of Claims] 1. A phase locked circuit comprising a voltage controlled oscillator and a quadrature signal demodulation circuit that demodulates an input signal using an output signal of the voltage controlled oscillator and outputs an in-phase signal and a quadrature signal, an integral control system circuit that multiplies the phase signal by a predetermined coefficient, integrates and adds it, and inputs a control voltage signal to the voltage controlled oscillator; and an integral control system circuit that determines the sign of the orthogonal signal and detects the direction of frequency offset based on a change in the state of the output. a frequency control system circuit that integrates the detected output of the frequency control system circuit according to a control signal; and a frequency control integration circuit that integrates the detection output of the frequency control system circuit according to a control signal; and a frequency control integration circuit that uses the orthogonal signal to confirm phase synchronization of the demodulated signal and pull it within a predetermined frequency deviation. and an integration control circuit that outputs the control signal for stopping the integration. 2. The integral control system circuit includes a first coefficient multiplier that multiplies a positive or negative coefficient depending on the sign of the orthogonal signal, and a second coefficient multiplier that multiplies the output of the first coefficient multiplier by a predetermined coefficient, respectively. and a third coefficient unit, an integrator that integrates the output of the third coefficient unit, and a first adder that adds the output of the integrator and the output of the second coefficient unit, The frequency control system circuit includes a limiter that inputs the orthogonal signal and determines its sign, a detector that inputs the output of the limiter and determines the state of change in sign, and a limiter that inputs the orthogonal signal and determines the sign of the signal, and a detector that inputs the output of the limiter and determines the state of change in the sign. a fourth coefficient multiplier that multiplies the phase signal by a predetermined coefficient; the frequency control integration circuit includes a switch that turns on or off the output of the fourth coefficient multiplier according to a control signal; The integration control circuit includes a second adder that adds the output of the fourth coefficient multiplier to the output of the third coefficient multiplier; and a lock detector that detects a change in the output of the low-pass filter and outputs the control signal.