JPH04100255A - Semiconductor manufacturing device - Google Patents

Semiconductor manufacturing device

Info

Publication number
JPH04100255A
JPH04100255A JP2217834A JP21783490A JPH04100255A JP H04100255 A JPH04100255 A JP H04100255A JP 2217834 A JP2217834 A JP 2217834A JP 21783490 A JP21783490 A JP 21783490A JP H04100255 A JPH04100255 A JP H04100255A
Authority
JP
Japan
Prior art keywords
thin film
flattened
gas
flattening
flattened surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2217834A
Other languages
Japanese (ja)
Inventor
Masahiko Toki
雅彦 土岐
Junya Nakahira
順也 中平
Yuji Furumura
雄二 古村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2217834A priority Critical patent/JPH04100255A/en
Publication of JPH04100255A publication Critical patent/JPH04100255A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To perform a separation of a flattened thin film with good controllability by a method wherein the thin film is made to separate from a flattened surface by the pressure of gas, which is injected through gas injection holes formed in the flattened surface. CONSTITUTION:A flattened surface 4 is formed on the upper wall part, which is a boundary wall 1a of a device main body 1, of a working chamber 2 and electrodes 5 are provided in a control chamber 3 in close proximity to the surface 4. Gas injection holes 7a and through holes 7b are formed in the wall 1a and the surface 4. A power supply 6 is made to invert and after a flattened thin film 11 is caused an electrostatic induction positively or reversely, negatively, the power supply is cut off and while inert gas is made to inject from gas pipes 9 to the film 11 by controlling gas cocks 8, the thin film 11 is pressed. In such a way, a pressure is applied to the thin film 11 made an electrostatic suction to the surface 4 by gas, which is injected through the holes 7a, and a pressing member 10 projecting in the chamber 2 through the holes 7b and the thin film 11 is made to separate from the surface 4.

Description

【発明の詳細な説明】 〔概要〕 半導体製造装置に関し、 平坦化薄膜の離脱を制御性よく行うことができる静電チ
ャッキングを有する半導体製造装置を提供することを目
的とし、 加工室及び制御室を形成する絶縁部材と、該加工室の上
壁部分の該絶縁部材を平坦化することにより形成される
平坦化面と、該平坦化面に近傍するように該制御室内に
設けられる電極と、を備え、該電極による静電誘導で平
坦化薄膜を該平坦化面に静電吸着させる半導体製造装置
において、該平坦化面に形成されるガス噴出孔と、該ガ
ス噴出孔に連結されるガス管と、を設け、該ガス噴出孔
から噴出するガスの圧力によって該平坦化面から該平坦
化薄膜を離脱させるように構成し、又は、加工室及び制
御室を形成する絶縁部材と、該加工室の上壁部分の該絶
縁部材を平坦化することにより形成される平坦化面と、
該平坦化面に近傍するように該制御室内に設けられる電
極と、を備え、該電極による静電誘導で平坦化薄膜を該
平坦化面に静電吸着させる半導体製造装置において、該
平坦化面に形成される貫通孔と、該貫通孔内を上下方向
に往復する加圧部材と、を設け、該加圧部材の該平坦化
薄膜に対する押圧によって該平坦化面から該平坦化薄膜
を離脱させるように構成し、又は、加工室及び制御室を
形成する絶縁部材と、該加工室の上壁部分の該絶縁部材
を平坦化することにより形成される平坦化面と、該平坦
化面に近傍するように該制御室内に設けられる電極と、
を備え、該電極による静電誘導で平坦化薄膜を該平坦化
面に静電吸着させる半導体製造装置において、該平坦化
面に形成されるガス噴出孔及び貫通孔と、該ガス噴出孔
に連結されるガス管と、該貫通孔内を上下方向に往復す
る加圧部材と、を設け、該ガス噴出孔から噴出するガス
の圧力と、該加圧部材の該平坦化薄膜に対する押圧とに
よって該平坦化面から該平坦化薄膜を離脱させるように
構成する。
[Detailed Description of the Invention] [Summary] An object of the present invention is to provide a semiconductor manufacturing apparatus having electrostatic chucking that can detach a flattened thin film with good controllability, and which includes a processing chamber and a control room. a flattened surface formed by flattening the insulating member on the upper wall portion of the processing chamber; and an electrode provided in the control chamber near the flattened surface; A semiconductor manufacturing apparatus comprising: a gas ejection hole formed in the planarization surface and a gas connected to the gas ejection hole; and an insulating member configured to separate the flattened thin film from the flattened surface by the pressure of the gas jetted from the gas jetting hole, or an insulating member forming a processing chamber and a control chamber; A flattened surface formed by flattening the insulating member on the upper wall portion of the chamber;
an electrode provided in the control chamber in the vicinity of the planarized surface, and a semiconductor manufacturing apparatus that electrostatically attracts a planarized thin film to the planarized surface by electrostatic induction by the electrode, the planarized surface a through hole formed in the through hole, and a pressure member that reciprocates in the vertical direction within the through hole, and the flattened thin film is separated from the flattened surface by the pressure of the pressure member against the flattened thin film. or an insulating member forming a processing chamber and a control chamber, a flattened surface formed by flattening the insulating member on an upper wall portion of the processing chamber, and a portion adjacent to the flattened surface. an electrode provided in the control chamber so as to
in a semiconductor manufacturing apparatus that electrostatically attracts a planarized thin film to the planarized surface by electrostatic induction by the electrode, a gas ejection hole and a through hole formed in the planarized surface, and a gas ejection hole and a through hole connected to the gas ejection hole. and a pressure member that reciprocates in the vertical direction within the through hole, and the pressure of the gas ejected from the gas ejection hole and the pressure of the pressure member against the flattened thin film are provided. The flattening thin film is configured to be separated from the flattened surface.

〔産業上の利用分野〕[Industrial application field]

本発明は、半導体製造装置に関し、詳しくは、平坦化薄
膜の離脱を制御性よく行うことのできる静電チャッキン
グによる半導体製造装置に関する。
The present invention relates to a semiconductor manufacturing apparatus, and more particularly to a semiconductor manufacturing apparatus using electrostatic chucking, which allows detachment of a flattened thin film with good controllability.

一般に、加工物を加工台等に固定するチャッキングの方
法として物理的に加工物を押さえつけ支持するメカニカ
ルチャッキングがあるが、加工物が微小な場合、あるい
は加工物が物理的支持に対して損傷を受けやすい場合等
には真空チャッキング、静電チャッキング等が用いられ
ている。特に、半導体製造の初期工程におけるSiウェ
ハの支持には静電チャフキングが有効であり、近時では
Siウェハの離脱を制御性よく行うことのできる静電チ
ャッキングの方法が要求されている。
Generally, mechanical chucking is used to physically hold down and support the workpiece as a chucking method for fixing the workpiece to a processing table, etc., but if the workpiece is small or the workpiece is damaged by the physical support. Vacuum chucking, electrostatic chucking, etc. are used in cases where it is susceptible to damage. In particular, electrostatic chuffing is effective for supporting Si wafers in the initial process of semiconductor manufacturing, and recently there has been a demand for an electrostatic chucking method that can detach Si wafers with good controllability.

〔従来の技術〕[Conventional technology]

第4図は半導体製造における一従来例の静電チャッキン
グ装置の概略断面図である。
FIG. 4 is a schematic cross-sectional view of a conventional electrostatic chucking device used in semiconductor manufacturing.

第4図において、31は例えばアルミナ等のセラミック
スからなる装置本体であり、装置本体31は低圧加工室
32を有し、低圧加工室32には上部が平坦化されるこ
とにより試料吸着用の平坦化面33が形成される。また
、電極34が平坦化面33に近傍するように設けられ、
さらに電極34に電荷を誘起する電源35が低圧加工室
32の外部に設けられる。36は例えばSiウェハ等の
平坦化薄膜であり、平坦化薄膜36の内部では電源35
の例えばIKVO印加電圧によって電極34に誘起され
た電荷により静電誘導が起こるため、平坦化薄膜36は
電極34に静電吸着される。このときの静電吸着力(F
)は次式%式% ここで、εは絶縁物(平坦化薄膜)の誘電率、■は印加
電圧、dは絶縁物(平坦化薄膜)の厚さ、Sは電極面積
である。
In FIG. 4, reference numeral 31 denotes an apparatus main body made of ceramics such as alumina, and the apparatus main body 31 has a low-pressure processing chamber 32, which has a flat upper part for sample adsorption. A converted surface 33 is formed. Further, the electrode 34 is provided near the flattened surface 33,
Furthermore, a power source 35 for inducing charges in the electrode 34 is provided outside the low-pressure processing chamber 32 . 36 is a flattened thin film such as a Si wafer, and inside the flattened thin film 36, a power supply 35 is connected.
Because electrostatic induction occurs due to charges induced in the electrode 34 by, for example, the IKVO applied voltage, the flattening thin film 36 is electrostatically attracted to the electrode 34. At this time, the electrostatic adsorption force (F
) is the following formula % formula % Here, ε is the dielectric constant of the insulator (flattened thin film), ■ is the applied voltage, d is the thickness of the insulator (flattened thin film), and S is the electrode area.

このような従来の静電チャッキング装置は、比較的容易
に高い静電吸着力を得ることができるとともに、平坦化
薄膜36のアニール等によって装置本体31に伝播した
熱に対する耐熱効果が大きいという利点がある。
Such a conventional electrostatic chucking device has the advantage that it can relatively easily obtain a high electrostatic adsorption force, and has a large heat resistance effect against heat propagated to the device body 31 due to annealing of the flattening thin film 36, etc. There is.

[発明が解決しようとする課題〕 しかしなから、このような従来のセラミック製静電チャ
フキング装置にあっては、平坦化面33に吸着された平
坦化薄膜36の電気抵抗が不純物注入やアニール等によ
って著しく低下するため、電極34に逆の印加電圧を加
えた場合には平坦化薄膜36内部の自由電子の移動によ
って平坦化薄膜36が士、逆に静電誘導し、あるいはこ
の印加電圧を0にした場合には平坦化薄膜36の静電誘
導の電荷が電極34付近の装置本体31のセラミックス
に誘電分極を起こしてしまう。この結果、平坦化面33
と平坦化薄膜36の静電吸着力が弱まらないことがあり
、平坦化薄膜36を電気的に離脱させ難い、即ち、平坦
化薄膜36離脱を制御し難いという問題があった。
[Problems to be Solved by the Invention] However, in such a conventional ceramic electrostatic chaffing device, the electric resistance of the flattening thin film 36 adsorbed to the flattening surface 33 is high due to impurity implantation or annealing. If a reverse applied voltage is applied to the electrode 34, the flattening thin film 36 will be electrostatically induced due to the movement of free electrons inside the flattening thin film 36, or this applied voltage will be If it is set to 0, the electrostatically induced charge of the flattening thin film 36 causes dielectric polarization in the ceramics of the device main body 31 near the electrode 34. As a result, the flattened surface 33
Then, the electrostatic adsorption force of the planarizing thin film 36 may not weaken, and there is a problem that it is difficult to electrically separate the planarizing thin film 36, that is, it is difficult to control the detachment of the planarizing thin film 36.

このため、平坦化薄膜36に物理的な力を加えることに
より離脱させるという方法が考えられるが、平坦化薄膜
36に損傷を与えやすいという問題が生じ、また、例え
ば02プラズマを平坦化薄膜36中に吸収させて電気的
に中性にすることにより離脱させるという方法も考えら
れるが、平坦化薄膜36特性を劣化させやすい等の問題
が生じる。
For this reason, a method of detaching the flattening thin film 36 by applying physical force may be considered, but this poses the problem of easily damaging the flattening thin film 36. Although it is possible to consider a method in which the particles are absorbed by the particles to make them electrically neutral and then released, problems arise such as the characteristics of the flattening thin film 36 tending to deteriorate.

そこで本発明は、平坦化薄膜の離脱を制御性よく行うこ
とができる静電チャフキングを有する半導体製造装置を
提供することを目的としている。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor manufacturing apparatus having electrostatic chaffing that can perform detachment of a flattened thin film with good controllability.

〔課題を解決するための手段〕[Means to solve the problem]

本発明による半導体製造装置は上記目的達成のため、成
膜、エツチング等の加工室及び静電吸着等を制御する制
御室を形成する絶縁部材と、該加工室の上壁部分の該絶
縁部材を平坦化することにより形成される平坦化面と、
該平坦化面に近傍するように該制御室内に設けられる電
極と、を備え、該電極による静電誘導で平坦化薄膜を該
平坦化面に静電吸着させる半導体製造装置において、該
平坦化面に形成されるガス噴出孔と、該ガス噴出孔に連
結されるガス管と、を設け、該ガス噴出孔から噴出する
ガスの圧力によって該平坦化面から該平坦化薄膜を離脱
させ、又は、成膜、エツチング等の加工室及び静電吸着
等を制御する制御室を形成する絶縁部材と、該加工室の
上壁部分の該絶縁部材を平坦化することにより形成され
る平坦化面と、該平坦化面に近傍するように該制御室内
に設けられる電極と、を備え、該電極による静電誘導で
平坦化薄膜を該平坦化面に静電吸着させる半導体製造装
置において、該平坦化面に形成される貫通孔と、該貫通
孔内を上下方向に往復する加圧部材と、を設け、該加圧
部材の該平坦化薄膜に対する押圧によって該平坦化面か
ら該平坦化薄膜を離脱させ、又は、成膜、エツチング等
の加工室及び静電吸着等を制御する制御室を形成する絶
縁部材と、該加工室の上壁部分の該絶縁部材を平坦化す
ることにより形成される平坦化面と、該平坦化面に近傍
するように該制御室内に設けられる電極と、を備え、該
電極による静電誘導で平坦化薄膜を該平坦化面に静電吸
着させる半導体製造装置において、該平坦化面に形成さ
れるガス噴出孔及び貫通孔と、前記ガス噴出孔に連結さ
れるガス管と、該貫通孔内を上下方向に往復する加圧部
材と、を設け、該ガス噴出孔から噴出するガスの圧力と
、該加圧部材の該平坦化薄膜に対する押圧によって該平
坦化面から該平坦化薄膜を離脱させるものである。
In order to achieve the above object, the semiconductor manufacturing apparatus according to the present invention includes an insulating member forming a processing chamber for film formation, etching, etc. and a control chamber for controlling electrostatic adsorption, etc., and the insulating member on the upper wall of the processing chamber. A flattened surface formed by flattening;
an electrode provided in the control chamber in the vicinity of the planarized surface, and a semiconductor manufacturing apparatus that electrostatically attracts a planarized thin film to the planarized surface by electrostatic induction by the electrode, the planarized surface a gas ejection hole formed in the gas ejection hole and a gas pipe connected to the gas ejection hole, and the flattening thin film is detached from the flattened surface by the pressure of the gas ejected from the gas ejection hole; an insulating member forming a processing chamber for film formation, etching, etc. and a control chamber for controlling electrostatic adsorption, etc., and a flattened surface formed by flattening the insulating member on the upper wall portion of the processing chamber; an electrode provided in the control chamber in the vicinity of the planarized surface, and a semiconductor manufacturing apparatus that electrostatically attracts a planarized thin film to the planarized surface by electrostatic induction by the electrode, the planarized surface a through hole formed in the through hole, and a pressure member that reciprocates in the vertical direction within the through hole, and the flattened thin film is separated from the flattened surface by the pressure of the pressure member against the flattened thin film. Or, an insulating member forming a processing chamber for film formation, etching, etc. and a control chamber for controlling electrostatic adsorption, etc., and a flattening formed by flattening the insulating member on the upper wall portion of the processing chamber. and an electrode provided in the control chamber in the vicinity of the planarization surface, in which a planarization thin film is electrostatically attracted to the planarization surface by electrostatic induction by the electrode. A gas ejection hole and a through hole formed in the flattened surface, a gas pipe connected to the gas ejection hole, and a pressure member that reciprocates in the up and down direction within the through hole are provided, and from the gas ejection hole The flattening thin film is separated from the flattening surface by the pressure of the ejected gas and the pressure of the pressure member against the flattening thin film.

〔作用〕[Effect]

本発明では、平坦化面4に形成されたガス噴出ロアaか
ら噴出するガス、あるいは平坦化面4に形成された貫通
型7bから加工室2に突出する加圧部材10により平坦
化面4に静電吸着された平坦化薄膜11に対して圧力が
加えられる。このため、平坦化薄膜11に加わっている
下向きの静電吸着力よりも、ガスあるいは加圧部材10
による上向きの力が大きくなると平坦化薄膜11は平坦
化面4から離脱される。
In the present invention, the flattened surface 4 is heated by the gas jetted from the gas jet lower a formed on the flattened surface 4 or by the pressurizing member 10 protruding into the processing chamber 2 from the through die 7b formed on the flattened surface 4. Pressure is applied to the electrostatically attracted flattened thin film 11. For this reason, the gas or pressure member 1
When the upward force increases, the flattening thin film 11 is separated from the flattening surface 4.

〔実施例〕〔Example〕

以下、本発明を図面に基づいて説明する。第1〜3図は
本発明に係る半導体製造装置の一実施例を示す図であり
、第1図はその概略断面を示す図、第2図はその平坦化
面を示す図、第3図はその電源制御回路を示す図である
。なお、図示例の半導体製造装置は静電チャッキング装
置の主要部を示しており、例えばCVD装置に適用する
ことができる。
Hereinafter, the present invention will be explained based on the drawings. 1 to 3 are diagrams showing one embodiment of the semiconductor manufacturing apparatus according to the present invention, in which FIG. 1 is a diagram showing a schematic cross section thereof, FIG. 2 is a diagram showing a planarized surface thereof, and FIG. It is a diagram showing the power supply control circuit. Note that the illustrated semiconductor manufacturing apparatus shows the main part of an electrostatic chucking apparatus, and can be applied to, for example, a CVD apparatus.

まず、構成を説明する。First, the configuration will be explained.

第1図において、1は例えばアルミナ等のセラミックス
からなる装置本体であり、装置本体1は成膜、エツチン
グ等の低圧加工室2及び静電吸着等を制御する制御室3
をそれぞれ形成する。装置本体1の境界壁1aには加工
室2の上壁部分を平坦化することにより平坦化面4が形
成される。制御室3内には、電極5が境界壁1aと接し
て平坦化面4に近傍するように設けられるとともに、電
極5に電荷を誘起する電源6が設けられる。また、境界
壁1a及び平坦化面4には、ガス噴出孔7a及び貫通孔
7bが形成される。ガス噴出孔7aにはガスコック8を
有するガス管9が連結され、また貫通孔7bには貫通孔
7b内を上下方向に往復し加工室2内へ突出するように
制御される加圧部材10が設けられる(第2図)。この
とき、ガス噴出孔7a及び貫通孔7bを平坦化面4の全
面に一様に配置させるために、ガス管9あるいは加圧部
材10が電極5を挿通するようにガス噴出孔7aあるい
は貫通孔7bを形成してもよい、11は例えばSiウェ
ハ等の平坦化薄膜であり、平坦化薄膜11の内部では電
源6の例えば1000 Vの印加電圧で電極5に誘起さ
れた電荷により静電誘導が起こるため、平坦化薄膜11
は加圧部材10が加工室2に突出しない状態の平坦化面
4に対して上向きに静電吸着される。
In FIG. 1, reference numeral 1 denotes an apparatus main body made of ceramics such as alumina, and the apparatus main body 1 includes a low-pressure processing chamber 2 for film formation, etching, etc., and a control chamber 3 for controlling electrostatic adsorption, etc.
form each. A flattened surface 4 is formed on the boundary wall 1a of the apparatus main body 1 by flattening the upper wall portion of the processing chamber 2. Inside the control chamber 3, an electrode 5 is provided so as to be in contact with the boundary wall 1a and close to the flattened surface 4, and a power source 6 for inducing charges in the electrode 5 is provided. Furthermore, gas ejection holes 7a and through holes 7b are formed in the boundary wall 1a and the flattened surface 4. A gas pipe 9 having a gas cock 8 is connected to the gas ejection hole 7a, and a pressurizing member 10 is connected to the through hole 7b so as to reciprocate in the vertical direction inside the through hole 7b and project into the processing chamber 2. (Figure 2). At this time, in order to uniformly arrange the gas ejection holes 7a and the through holes 7b over the entire surface of the flattened surface 4, the gas ejection holes 7a or the through holes are 7b may be formed, and 11 is a flattened thin film such as a Si wafer, and inside the flattened thin film 11, electrostatic induction occurs due to charges induced in the electrode 5 by an applied voltage of, for example, 1000 V from the power supply 6. Because of this, the flattening thin film 11
is electrostatically attracted upward to the flattened surface 4 in a state where the pressure member 10 does not protrude into the processing chamber 2.

次に、作用を説明する。Next, the effect will be explained.

本実施例では、以下の工程に基づいて平坦化薄膜11の
平坦化面4からの離脱を行う。
In this embodiment, the flattening thin film 11 is removed from the flattened surface 4 based on the following steps.

まず、第3図に示す電源制御回路により電源6を反転さ
せ、平坦化薄膜11を+、−逆に静電誘導させた後、電
源を切る。次いで、例えばN2等の不活性ガスをガスコ
ック8の調節によってガス管9から平坦化薄膜11に対
して例えば760Torrの圧力で噴出させなから、P
kgf/cdの力を加えた時発生する最大応力が平坦化
f!を膜11のせん断破壊力を越えない条件、 で平坦化薄膜11を押圧する。
First, the power supply 6 is reversed by the power supply control circuit shown in FIG. 3 to cause electrostatic induction in the flattening thin film 11 in the positive and negative directions, and then the power is turned off. Next, an inert gas such as N2 is injected from the gas pipe 9 against the flattening thin film 11 at a pressure of, for example, 760 Torr by adjusting the gas cock 8.
The maximum stress that occurs when a force of kgf/cd is applied is the flattening f! The flattening thin film 11 is pressed under conditions such that the shear breaking force of the film 11 is not exceeded.

但し、hは平坦化薄膜11の厚さ、aは平坦化薄膜11
の半径であり、また、σ(平坦化薄膜11のせん断破壊
力) =700kgf/ciil   ν(ポアソン比
)=0.3 とすると、P <0.0425kgf /
 c這(6φの場合)となる。すなわち、平坦化薄膜1
1の損傷や特性劣化を起こさない程度の圧力で加圧部材
10を平坦化薄膜11に対して押圧させる。しかし、こ
の場合では、加圧部材10の圧力を例えばレギュレータ
ー等で調整することが極めて困難であるため、不活性ガ
スの圧力をガスコック8で調整するとともに、加圧部材
10の圧力を極小さくする。以上の工程で平坦化薄膜1
1が平坦化面4から離脱しない場合には、以上の工程を
数回繰り返す。
However, h is the thickness of the flattening thin film 11, and a is the thickness of the flattening thin film 11.
, and if σ (shear breaking force of flattened thin film 11) = 700 kgf/ciil ν (Poisson's ratio) = 0.3, then P < 0.0425 kgf /
c (in the case of 6φ). That is, the flattening thin film 1
The pressing member 10 is pressed against the flattening thin film 11 with a pressure that does not cause damage or characteristic deterioration of the flattening thin film 11. However, in this case, it is extremely difficult to adjust the pressure of the pressurizing member 10 using, for example, a regulator, so the pressure of the inert gas is adjusted using the gas cock 8, and the pressure of the pressurizing member 10 is minimized. . Through the above steps, the planarized thin film 1
If 1 does not separate from the flattened surface 4, the above steps are repeated several times.

以上の工程では、電源の反転後に電源を切ることによっ
て予め静電吸着力がわずかに弱められた後、ガス噴出孔
7aから噴出するガスと貫通孔7bから加工室2に突出
する加圧部材10により平坦化面4に静電吸着された平
坦化薄膜11に対して圧力が加えられる。このため、平
坦化薄膜11に加わっている下向きの静電吸着力よりも
、ガスあるいは加圧部材10による上向きの力が大きく
なると平坦化薄膜11は平坦化面4から離脱される。
In the above process, after the electrostatic adsorption force is slightly weakened by turning off the power after the power is reversed, the gas ejected from the gas ejection hole 7a and the pressurizing member 10 protruding into the processing chamber 2 from the through hole 7b Pressure is applied to the flattening thin film 11 electrostatically attracted to the flattening surface 4. Therefore, when the upward force exerted by the gas or the pressurizing member 10 becomes larger than the downward electrostatic adsorption force applied to the flattening thin film 11, the flattening thin film 11 is separated from the flattening surface 4.

このように本実施例では、境界壁1a及び平坦化面4に
ガス噴出孔7a及び貫通孔7bが設けられ、不活性ガス
及び加圧部材10により平坦化薄膜11に対して下向き
の力が加えられるので、平坦化薄膜11の平坦化面4か
らの離脱を容易にかつ確実に、即ち、制御性よく行うこ
とができる。
In this embodiment, the gas ejection holes 7a and the through holes 7b are provided in the boundary wall 1a and the flattened surface 4, and a downward force is applied to the flattened thin film 11 by the inert gas and the pressurizing member 10. Therefore, the planarizing thin film 11 can be easily and reliably removed from the planarizing surface 4, that is, with good controllability.

なお、本実施例では、平坦化薄W!11の平坦化面4か
らの離脱をガス噴出孔7aからの不活性ガス及び貫通孔
7bからの加圧部材10により行う場合について説明し
たが、ガス噴出孔7aからの不活性ガス、あるいは貫通
孔7bからの加圧部材10のみで行う場合であってもよ
い。
In addition, in this example, the flattening thin W! 11 from the flattened surface 4 using the inert gas from the gas outlet 7a and the pressurizing member 10 from the through hole 7b. The pressing member 10 from 7b may be used alone.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、平坦化薄膜の離脱を制御性よく行うこ
とができるという効果がある。
According to the present invention, there is an effect that detachment of the planarizing thin film can be performed with good controllability.

第2図は一実施例の平坦化面を示す図、第3図は一実施
例の電源制御回路を示す図、第4図は静電チャッキング
装置の一従来例の概略断面を示す図である。
Fig. 2 is a diagram showing a flattened surface of one embodiment, Fig. 3 is a diagram showing a power supply control circuit of one embodiment, and Fig. 4 is a diagram showing a schematic cross section of a conventional example of an electrostatic chucking device. be.

1・・・・・・装置本体、 2・・・・・・低圧加工室、 3・・・・・・制御室、 4・・・・・・平坦化面、 5・・・・・・電極、 7a・・・・・・ガス噴出孔、 7b・・・・・・貫通孔、 10・・・・・・加圧部材、 11・・・・・・平坦化薄膜。1... Device main body, 2...Low pressure processing room, 3... Control room, 4... Flattened surface, 5... Electrode, 7a... Gas outlet, 7b...through hole, 10...pressure member, 11... Flattening thin film.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る半導体製造装置の一実施例の概略
断面を示す図、 一実施例の平坦化面を示す図
FIG. 1 is a diagram showing a schematic cross section of one embodiment of a semiconductor manufacturing apparatus according to the present invention, and a diagram showing a planarized surface of one embodiment.

Claims (3)

【特許請求の範囲】[Claims] (1)加工室(2)及び制御室(3)を形成する絶縁部
材(1)と、該加工室(2)の上壁部分の該絶縁部材(
1)を平坦化することにより形成される平坦化面(4)
と、該平坦化面(4)に近傍するように該制御室(3)
内に設けられる電極(5)と、を備え、該電極(5)に
よる静電誘導で平坦化薄膜(11)を該平坦化面(4)
に静電吸着させる半導体製造装置において、該平坦化面
(4)に形成されるガス噴出孔 (7a)と、該ガス噴出孔(7a)に連結されるガス管
(9)と、を設け、該ガス噴出孔(7a)から噴出する
ガスの圧力によって該平坦化面(4)から該平坦化薄膜
(11)を離脱させることを特徴とする半導体製造装置
(1) An insulating member (1) forming a processing chamber (2) and a control room (3), and an insulating member (1) on the upper wall of the processing chamber (2).
Flattened surface (4) formed by flattening 1)
and the control chamber (3) in the vicinity of the flattened surface (4).
an electrode (5) provided within the flattened surface (4), and the flattened thin film (11) is moved by electrostatic induction by the electrode (5) to the flattened surface (4).
In a semiconductor manufacturing apparatus for electrostatic adsorption, a gas ejection hole (7a) formed in the flattened surface (4) and a gas pipe (9) connected to the gas ejection hole (7a) are provided, A semiconductor manufacturing apparatus characterized in that the flattening thin film (11) is separated from the flattening surface (4) by the pressure of gas jetted from the gas jetting hole (7a).
(2)加工室(2)及び制御室(3)を形成する絶縁部
材(1)と、該加工室(2)の上壁部分の該絶縁部材(
1)を平坦化することにより形成される平坦化面(4)
と、該平坦化面(4)に近傍するように該制御室(3)
内に設けられる電極(5)と、を備え、該電極(5)に
よる静電誘導で平坦化薄膜(11)を該平坦化面(4)
に静電吸着させる半導体製造装置において、該平坦化面
(4)に形成される貫通孔(7b)と、該貫通孔(7b
)内を上下方向に往復する加圧部材(10)と、を設け
、該加圧部材(10)の該平坦化薄膜(11)に対する
押圧によって該平坦化面(4)から該平坦化薄膜(11
)を離脱させることを特徴とする半導体製造装置。
(2) An insulating member (1) forming the processing chamber (2) and a control room (3), and the insulating member (1) on the upper wall of the processing chamber (2).
Flattened surface (4) formed by flattening 1)
and the control chamber (3) in the vicinity of the flattened surface (4).
an electrode (5) provided within the flattened surface (4), and the flattened thin film (11) is moved by electrostatic induction by the electrode (5) to the flattened surface (4).
In a semiconductor manufacturing apparatus in which a through hole (7b) is formed in the planarized surface (4) and a through hole (7b)
) is provided, and the pressure member (10) reciprocates in the vertical direction within the flattened thin film (11) by pressing the flattened thin film (11) from the flattened surface (4). 11
) is removed from the semiconductor manufacturing equipment.
(3)加工室(2)及び制御室(3)を形成する絶縁部
材(1)と、該加工室(2)の上壁部分の該絶縁部材(
1)を平坦化することにより形成される平坦化面(4)
と、該平坦化面(4)に近傍するように該制御室(3)
内に設けられる電極(5)と、を備え、該電極(5)に
よる静電誘導で平坦化薄膜(11)を該平坦化面(4)
に静電吸着させる半導体製造装置において、該平坦化面
(4)に形成されるガス噴出孔 (7a)及び貫通孔(7b)と、該ガス噴出孔(7a)
に連結される該ガス管(9)と、該貫通孔(7b)内を
上下方向に往復する該加圧部材(10)と、を設け、該
ガス噴出孔(7a)から噴出するガスの圧力と、該加圧
部材(10)の該平坦化薄膜(11)に対する押圧とに
よって該平坦化面(4)から該平坦化薄膜(11)を離
脱させることを特徴とする半導体製造装置。
(3) An insulating member (1) forming the processing chamber (2) and a control room (3), and the insulating member (1) on the upper wall of the processing chamber (2).
Flattened surface (4) formed by flattening 1)
and the control chamber (3) in the vicinity of the flattened surface (4).
an electrode (5) provided within the flattened surface (4), and the flattened thin film (11) is moved by electrostatic induction by the electrode (5) to the flattened surface (4).
In a semiconductor manufacturing apparatus that electrostatically attracts the gas to the flattened surface (4), a gas jet hole (7a) and a through hole (7b) formed in the flattened surface (4), and a gas jet hole (7a) formed in the flattened surface (4).
The gas pipe (9) connected to the through hole (7b) and the pressurizing member (10) reciprocating in the vertical direction are provided, and the pressure of the gas ejected from the gas ejection hole (7a) is provided. A semiconductor manufacturing apparatus characterized in that the flattening thin film (11) is separated from the flattening surface (4) by pressing the flattening thin film (11) with the pressure member (10).
JP2217834A 1990-08-18 1990-08-18 Semiconductor manufacturing device Pending JPH04100255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2217834A JPH04100255A (en) 1990-08-18 1990-08-18 Semiconductor manufacturing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2217834A JPH04100255A (en) 1990-08-18 1990-08-18 Semiconductor manufacturing device

Publications (1)

Publication Number Publication Date
JPH04100255A true JPH04100255A (en) 1992-04-02

Family

ID=16710482

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2217834A Pending JPH04100255A (en) 1990-08-18 1990-08-18 Semiconductor manufacturing device

Country Status (1)

Country Link
JP (1) JPH04100255A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0846019A (en) * 1994-02-28 1996-02-16 Applied Materials Inc Electrostatic chuck
JP2000200825A (en) * 1999-01-07 2000-07-18 Matsushita Electric Ind Co Ltd Substrate removal control method of vacuum treatment apparatus and vacuum treatment apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5920634B2 (en) * 1980-06-09 1984-05-14 日立化成工業株式会社 Manufacturing method of silicon carbide coated carbon material
JPS62277234A (en) * 1986-05-23 1987-12-02 Canon Inc Electrostatic chuck device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5920634B2 (en) * 1980-06-09 1984-05-14 日立化成工業株式会社 Manufacturing method of silicon carbide coated carbon material
JPS62277234A (en) * 1986-05-23 1987-12-02 Canon Inc Electrostatic chuck device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0846019A (en) * 1994-02-28 1996-02-16 Applied Materials Inc Electrostatic chuck
JP2000200825A (en) * 1999-01-07 2000-07-18 Matsushita Electric Ind Co Ltd Substrate removal control method of vacuum treatment apparatus and vacuum treatment apparatus

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