JP3182615B2 - Plasma processing method and apparatus - Google Patents

Plasma processing method and apparatus

Info

Publication number
JP3182615B2
JP3182615B2 JP10981391A JP10981391A JP3182615B2 JP 3182615 B2 JP3182615 B2 JP 3182615B2 JP 10981391 A JP10981391 A JP 10981391A JP 10981391 A JP10981391 A JP 10981391A JP 3182615 B2 JP3182615 B2 JP 3182615B2
Authority
JP
Japan
Prior art keywords
substrate
electrode
push
frequency
mounting table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP10981391A
Other languages
Japanese (ja)
Other versions
JPH05291194A (en
Inventor
勉 塚田
浩志 土井
Original Assignee
アネルバ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アネルバ株式会社 filed Critical アネルバ株式会社
Priority to JP10981391A priority Critical patent/JP3182615B2/en
Publication of JPH05291194A publication Critical patent/JPH05291194A/en
Application granted granted Critical
Publication of JP3182615B2 publication Critical patent/JP3182615B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】この発明は、高周波グロー放電に
よって発生するガスプラズマを利用して、半導体集積回
路基板等の基板にエッチング、CVD、スパッタ等のプ
ラズマ処理を行う、プラズマ処理方法および装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing method and apparatus for performing plasma processing such as etching, CVD, and sputtering on a substrate such as a semiconductor integrated circuit substrate using gas plasma generated by high-frequency glow discharge. .

【0002】[0002]

【従来の技術】従来、高周波グロー放電を利用して基板
(被処理基板をいう。)をプラズマ処理するプラズマ処
理装置が半導体集積回路の製造で盛んに使用されてい
る。中でも、高周波印加電極上に基板を置いてエッチン
グする反応性イオンエッチング(RIE)装置は、異方
性エッチングが可能で且つ量産性に優れているため、半
導体デバイス製造の各プロセス工程で多用されるように
なってきた。
2. Description of the Related Art Conventionally, a plasma processing apparatus for plasma processing a substrate (substrate to be processed) using high-frequency glow discharge has been actively used in the manufacture of semiconductor integrated circuits. Above all, a reactive ion etching (RIE) apparatus for etching by placing a substrate on a high-frequency application electrode is capable of performing anisotropic etching and excellent in mass productivity, and is therefore frequently used in each process of semiconductor device manufacturing. It has become.

【0003】ところが、当初この種の装置は、基板を高
周波印加電極上(高周波電圧が印加される基板載置台を
含む)に、ただ載置するだけの構成をとっていたため
に、基板はプラズマによって容易に加熱され、基板温度
が上昇してエッチングマスクのフォトレジストが熱損傷
を受けたり、エッチング形状が悪化したりし、エッチン
グ速度の向上をはかることやエッチング形状を思い通り
に制御するのが難しいという欠点があった。
[0003] However, at first, this type of apparatus had a configuration in which a substrate was simply placed on a high-frequency application electrode (including a substrate mounting table to which a high-frequency voltage was applied). It is easily heated, the substrate temperature rises, the photoresist of the etching mask is thermally damaged, the etching shape deteriorates, and it is difficult to improve the etching rate and control the etching shape as desired. There were drawbacks.

【0004】このため、エッチング中に基板を熱損傷を
受けない温度に冷却する目的で、基板を電極(またはそ
の上に置かれた基板載置台)に機械的にクランプして両
者間の熱接触を向上させたり、基板の裏面にHe等のガ
スを流して基板と基板載置面との間の熱伝達効果を増大
させて冷却をはかったり、基板載置部の下方に、誘電体
を介して直流電極を埋め込んで、基板を静電力によって
基板載置面に密着(静電チャック)させ、熱伝達を向上
させる等の方法が考案された。特に、前記静電チャック
の方法は、構造が比較的簡単で冷却効果が大きいため種
々の方法が考案されている。
[0004] Therefore, in order to cool the substrate to a temperature at which the substrate is not thermally damaged during the etching, the substrate is mechanically clamped to an electrode (or a substrate mounting table placed thereon), and thermal contact between the two is performed. Or by flowing a gas such as He on the back surface of the substrate to increase the heat transfer effect between the substrate and the substrate mounting surface, thereby cooling the substrate, or through a dielectric below the substrate mounting portion. For example, a method has been devised in which a DC electrode is embedded and the substrate is brought into close contact with the substrate mounting surface by electrostatic force (electrostatic chuck) to improve heat transfer. In particular, various methods have been devised for the electrostatic chuck method because the structure is relatively simple and the cooling effect is large.

【0005】例えば、特公昭55−53853号公報
(特開昭55−9228号公報)「ドライエッチング装
置」に示される、ガスプラズマの電気伝導性を利用する
静電チャック方法は、高周波印加電極とガスプラズマと
が誘電体膜をはさむ電極として働くため、簡便で且つ基
板に与えるダメージが少なく、ガスプラズマが存在する
期間だけ静電チャック力が働くため基板の着脱が容易
で、非常に有効な方法であった。
[0005] For example, an electrostatic chucking method utilizing the electrical conductivity of gas plasma, which is disclosed in Japanese Patent Publication No. 55-53853 (Japanese Patent Application Laid-Open No. 55-9228) "Dry Etching Apparatus", employs a high frequency applying electrode. The gas plasma works as an electrode sandwiching the dielectric film, so it is simple and has little damage to the substrate. The electrostatic chucking force works only while the gas plasma exists. Met.

【0006】更に、特開平1−312087号公報「ド
ライエッチング装置」に示されるように、高周波印加電
極に重畳する静電チャックのための直流電圧を基板に誘
起されるセルフバイアス電圧より絶対値の大きな負の電
圧とすることにより、高周波印加電極に大きな電子電流
が流れることがなくなったため、誘電体膜の絶縁破壊は
殆ど無くなり、静電チャックは機構的に信頼性の高いも
のとなった。
Further, as disclosed in Japanese Patent Application Laid-Open No. 1-312087, "Dry Etching Apparatus", a DC voltage for an electrostatic chuck superimposed on a high-frequency application electrode is set to an absolute value smaller than a self-bias voltage induced on a substrate. By setting a large negative voltage, a large electron current did not flow through the high-frequency application electrode, so that dielectric breakdown of the dielectric film was almost eliminated, and the electrostatic chuck became mechanically highly reliable.

【0007】[0007]

【発明が解決しようとする課題】しかし、静電チャック
の吸着の信頼性を高め、吸着効率を増すためには、誘電
体膜の被誘電率を増すか、誘電体膜として用いるアルミ
ナ膜に酸化チタンを混ぜたりすることにより電荷を誘電
体膜表面近傍に蓄積させる必要があった。これらの誘電
体膜を用いることにより、強い吸着力が得られ基板は効
率よく冷却できたが、エッチング終了後、基板を基板載
置面より脱着し搬送しようとすると、誘電体膜に残留す
る電荷のため、基板に残留吸着力が働き、基板が搬送出
来なかったり、ひどい場合は基板が破損することもしば
しばあった。この残留吸着力を軽減するために、例え
ば、脱着時に逆電圧を印加するなどの方法がとられた。
しかしこの方法では、静電チャックのための電源が出力
を正負に切替え得る回路とする必要があり、電源の費用
がかさむものとなった。更に脱着時の電源のON/OF
Fのシーケンスを複雑なものにしなければならなかっ
た。又、逆電圧の値と印加時間を適切な値としなけれ
ば、再び逆電圧による残留吸着力のために、基板が試料
台に吸着されてしまう場合もあった。
However, in order to increase the chucking reliability of the electrostatic chuck and increase the chucking efficiency, the dielectric constant of the dielectric film must be increased or the alumina film used as the dielectric film must be oxidized. It has been necessary to accumulate charges near the surface of the dielectric film by mixing titanium. By using these dielectric films, a strong adsorption force was obtained and the substrate could be efficiently cooled.However, after the etching was completed, if the substrate was detached from the substrate mounting surface and transported, the charge remaining on the dielectric film was lost. As a result, a residual suction force acts on the substrate, and the substrate cannot be transported, and in severe cases, the substrate is often damaged. In order to reduce the residual attraction force, for example, a method of applying a reverse voltage at the time of desorption is employed.
However, in this method, a power supply for the electrostatic chuck needs to be a circuit capable of switching the output between positive and negative, which increases the cost of the power supply. Power ON / OF at the time of desorption
The sequence of F had to be complicated. If the value of the reverse voltage and the application time are not set to appropriate values, the substrate may be attracted to the sample stage again due to the residual attracting force due to the reverse voltage.

【0008】この発明は、上記の問題点を解決すること
を基本的な目的としてなされたものであって、非常に吸
着力の強い静電チャックであって、また静電チャックO
FF時に残留電荷が誘電体膜に残っていても、基板を基
板載置台より簡単、容易に脱着することの出来るプラズ
マ処理方法および装置を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made for the purpose of solving the above problems, and is an electrostatic chuck having a very strong attraction force.
It is an object of the present invention to provide a plasma processing method and apparatus capable of easily and easily detaching a substrate from a substrate mounting table even when residual charges remain on a dielectric film during FF.

【0009】[0009]

【課題を解決する為の手段】上記の目的を達成するこの
発明のプラズマ処理方法は、反応性ガス等のガス導入手
段を設けた真空容器内に高周波印加電極を備え、該高周
波印加電極上に、高周波印加電極と同電位の金属電極を
埋め込んだ誘電体でなる基板載置台を設け、該高周波印
加電極にプラズマにより発生する負のセルフバイアス電
圧より絶対値で大きい負の直流電圧を重畳することによ
り、前記基板載置台上の基板を静電チャックし、前記反
応性ガス等のガスプラズマにより前記基板をプラズマ処
理する方法において、プラズマ処理終了時に、前記直流
電圧を遮断した後、所定の時間経過後に、前記高周波電
圧を遮断することを特徴としている。
According to the plasma processing method of the present invention for achieving the above object, a high-frequency applying electrode is provided in a vacuum vessel provided with a gas introducing means such as a reactive gas, and the high-frequency applying electrode is provided on the high-frequency applying electrode. Providing a substrate mounting table made of a dielectric in which a metal electrode having the same potential as the high-frequency application electrode is embedded, and superimposing a negative DC voltage having an absolute value larger than a negative self-bias voltage generated by plasma on the high-frequency application electrode. In the method of electrostatically chucking a substrate on the substrate mounting table and performing plasma processing on the substrate with a gas plasma such as the reactive gas, a predetermined time passes after the DC voltage is cut off at the end of the plasma processing. Later, the high frequency voltage is cut off.

【0010】前記高周波電圧の遮断は、直流電圧を遮断
した後、3〜15秒経過後とするのが望ましい。3秒以
下では、残留吸着力の消滅が不十分であり、又、15秒
を越えると、高周波電圧印加によるプラズマ処理が進行
し、かつ基板温度が上昇するなどの不都合を招く為であ
る。
It is desirable that the high-frequency voltage be cut off after a lapse of 3 to 15 seconds after the DC voltage is cut off. When the time is less than 3 seconds, the disappearance of the residual attraction force is insufficient. On the other hand, when the time exceeds 15 seconds, inconveniences such as plasma treatment by application of a high-frequency voltage and progress of the substrate temperature are caused.

【0011】又、上記の目的を達成するこの発明のプラ
ズマ処理装置は、反応性ガス等のガス導入手段を設けた
真空容器内に高周波印加電極を備え、該高周波印加電極
上に、誘電体膜と、該誘電体膜で覆われて前記高周波印
加電極と同電位となる金属電極を埋め込んだ基板載置台
を設け、プラズマ処理時には、高周波印加電極に、プラ
ズマにより発生する負のセルフバイアス電圧より絶対値
の大きな負の直流電圧を高周波に重畳して印加すること
により、基板載置台上に基板を静電チャックする構成と
したプラズマ処理装置において、前記基板載置台の下側
に、前記高周波印加電極と電気的に絶縁された導電性を
有する基板押し上げピンが、基板載置台を貫通して出没
可能に設置してあり、かつ該基板押し上げピンがスプリ
ングにより没入方向に付勢されていると共に、前記基板
押し上げピンの下側には、該基板押し上げピンを突出さ
せる為の、導電性を有する押し上げ部材が空隙を介して
対向設置してあり、該押し上げ部材は前記高周波印加電
極と電気的に導通していることを特徴としている。
According to another aspect of the present invention, there is provided a plasma processing apparatus including a high-frequency applying electrode in a vacuum vessel provided with a gas introducing means such as a reactive gas, and a dielectric film formed on the high-frequency applying electrode. And a substrate mounting table in which a metal electrode covered with the dielectric film and having the same potential as that of the high-frequency application electrode is embedded, and during the plasma processing, the high-frequency application electrode has an absolute value higher than a negative self-bias voltage generated by plasma. In a plasma processing apparatus configured to electrostatically chuck a substrate on a substrate mounting table by superimposing and applying a large negative DC voltage to a high frequency, the high-frequency application electrode is provided below the substrate mounting table. A substrate push-up pin having conductivity and electrically insulated from the substrate mounting base is provided so as to be able to protrude and retract through the substrate mounting table, and the substrate push-up pin is retracted by a spring. Along with the substrate push-up pins, a conductive push-up member for projecting the substrate push-up pins is provided opposite to each other via a gap, and the push-up member is It is characterized by being electrically connected to the high frequency applying electrode.

【0012】前記高周波印加電極には高周波電源と、直
流電圧を重畳する為の直流電源が接続されるが、これら
の電源は直流電源が遮断した後に、引き続き高周波電源
が遮断する構成とするのが望ましい。
A high-frequency power supply and a DC power supply for superimposing a DC voltage are connected to the high-frequency application electrode, and these power supplies are preferably configured so that the high-frequency power supply is cut off after the DC power supply is cut off. desirable.

【0013】[0013]

【作用】この発明のプラズマ処理方法においては、高周
波放電が遮断される前に、静電チャックのための直流電
圧を遮断するので、基板にはプラズマによって生じたセ
ルフバイアス電圧が印加された状態で高周波電極側の電
位が、セルフバイアス電圧に比較し負の電位の状態か
ら、接地電位、すなわち、セルフバイアス電圧より正の
電位に変化し、丁度誘電体膜の間に逆電圧が印加された
状態となり、又、その逆電圧の値が前記セルフバイアス
電圧となり、脱着に必要とする電圧に近いため、誘電体
膜に残留する電荷を中和する。この結果、短時間で容易
に基板を基板載置台より脱着させることができるように
なる。
In the plasma processing method according to the present invention, the DC voltage for the electrostatic chuck is cut off before the high-frequency discharge is cut off, so that the self-bias voltage generated by the plasma is applied to the substrate. The state in which the potential on the high-frequency electrode side changes from a negative potential state compared to the self-bias voltage to a ground potential, that is, a positive potential from the self-bias voltage, and a reverse voltage is applied just between the dielectric films. The value of the reverse voltage is the self-bias voltage, which is close to the voltage required for desorption, and neutralizes the charge remaining on the dielectric film. As a result, the substrate can be easily detached from the substrate mounting table in a short time.

【0014】又、この発明のプラズマ処理装置によれ
ば、押し上げ部材を上側の基板押し上げピン側に移動さ
せることにより、基板押し上げピンをスプリングに抗し
て、基板載置台の上面に突出させることができる。この
時、前記押し上げ部材と基板押し上げピンは、空隙を介
して電気的に絶縁された状態から、電気的に導通した状
態に変化するので、基板から基板押し上げピン、押し上
げ部材および高周波印加電極が電気的に導通し、基板と
基板載置台の間に残留する可能性のある吸着電荷を接地
電位側に放出させることができる。
Further, according to the plasma processing apparatus of the present invention, by moving the push-up member to the upper substrate push-up pin side, the substrate push-up pin can be projected from the upper surface of the substrate mounting table against the spring. it can. At this time, the push-up member and the substrate push-up pin change from a state of being electrically insulated through the gap to a state of being electrically conductive, so that the substrate push-up pin, the push-up member, and the high-frequency application electrode are electrically disconnected from the substrate. Thus, it is possible to discharge the adsorbed charges that may be left between the substrate and the substrate mounting table to the ground potential side.

【0015】高周波印加電極に接続した高周波電源およ
び直流電源のうち直流電源を遮断するようにすれば、高
周波印加電極は冷却水の抵抗を通して接地電位となり、
プラズマのセルフバイアス電圧に対して正の電位に変化
するので、前記のプラズマ処理方法と同様で、直流電源
の投入時の負の電位と逆の状態にすることができ、誘電
体膜に残留する電荷を中和することができる。
If the DC power supply is cut off among the high-frequency power supply and the DC power supply connected to the high-frequency application electrode, the high-frequency application electrode becomes the ground potential through the resistance of the cooling water,
Since the potential changes to a positive potential with respect to the self-bias voltage of the plasma, the potential can be reversed from the negative potential when the DC power is turned on, as in the above-described plasma processing method, and remains in the dielectric film. The charge can be neutralized.

【0016】[0016]

【実施例】図1はこの発明のプラズマ処理方法を枚葉処
理式の平行平板リアクティブイオンエッチング装置で実
施した例における装置の概略の断面図であって、接地さ
れた真空容器1内に、絶縁材15で絶縁された高周波印
加電極2と、接地された対向電極3が、電極面を互いに
平行に対向させて設置されている。
FIG. 1 is a schematic sectional view of an apparatus in which a plasma processing method according to the present invention is implemented by a single-wafer processing type parallel plate reactive ion etching apparatus. The high-frequency application electrode 2 insulated by the insulating material 15 and the grounded counter electrode 3 are installed with their electrode surfaces facing each other in parallel.

【0017】高周波印加電極2の上部には酸化チタンを
含有したアルミナで構成された基板載置台4が設置され
ている。基板載置台4の内部にはプラズマから絶縁され
るように金属電極5が埋め込まれており、高周波印加電
極2と直流的に接続されている。基板載置台4に埋め込
まれた金属電極5と基板載置台4の表面との間は、おお
よそ300μmの厚さの、基板載置台4の一部である酸
化チタンを含有したアルミナを主成分とする誘電体膜で
構成されている。基板載置台4の基板14を載置する面
以外は、合成樹脂製の電極カバー6で覆われている。対
向電極3の基板14に対向する側は、反応性ガスを吹出
す小孔を格子状に開けたガス吹出板7が取り付けられて
いる。
A substrate mounting table 4 made of alumina containing titanium oxide is provided above the high frequency application electrode 2. A metal electrode 5 is embedded inside the substrate mounting table 4 so as to be insulated from plasma, and is connected to the high frequency application electrode 2 in a DC manner. Between the metal electrode 5 embedded in the substrate mounting table 4 and the surface of the substrate mounting table 4, the main component is alumina having a thickness of approximately 300 μm and containing titanium oxide which is a part of the substrate mounting table 4. It is composed of a dielectric film. The surface of the substrate mounting table 4 other than the surface on which the substrate 14 is mounted is covered with an electrode cover 6 made of synthetic resin. On the side of the counter electrode 3 facing the substrate 14, a gas blowout plate 7 having small holes for blowing out a reactive gas in a lattice shape is attached.

【0018】高周波印加電極2にはブロキングコンデン
サ9を介し高周波電源8が接続されており、更に高周波
フィルタ10を介して静電チャック用として直流電源1
1が接続されている。高周波印加電極2及び対向電極3
は、それぞれ独立に温度を制御された冷却水を矢示1
6、17のように流通することにより一定温度に保たれ
るようになっている。実施例で用いた冷却水を流すと、
高周波印加電極2と接地電位である真空容器1との間の
直流抵抗は、概ね2MΩとなる。
A high frequency power supply 8 is connected to the high frequency application electrode 2 via a blocking capacitor 9, and a DC power supply 1 for an electrostatic chuck is further provided via a high frequency filter 10.
1 is connected. High frequency application electrode 2 and counter electrode 3
Indicates cooling water whose temperature is controlled independently.
The temperature is maintained at a constant value by flowing as shown in FIGS. When flowing the cooling water used in the examples,
The DC resistance between the high-frequency application electrode 2 and the vacuum vessel 1, which is a ground potential, is approximately 2 MΩ.

【0019】上記のような構成の装置を使用して、例え
ば、シリコン基板上に成長させたシリコンの酸化膜をフ
ォトレジストでパターニングし、これをエッチングする
場合について以下に説明する。
A case will be described below in which, for example, a silicon oxide film grown on a silicon substrate is patterned with a photoresist and etched using the apparatus having the above configuration.

【0020】排気口12に接続された排気系(図示して
いない)によって真空容器1内を真空に排気する。次
に、基板14をロードロック機構(図示していない)を
介し、ロボット等で真空容器1内へ搬送し、基板載置台
4上に載置し、ガス導入口13よりCHF3 とC2 6
の混合ガスを、圧力1Torrになるまで導入する。
The vacuum system 1 is evacuated to a vacuum by an exhaust system (not shown) connected to the exhaust port 12. Next, the substrate 14 is transferred into the vacuum vessel 1 by a robot or the like via a load lock mechanism (not shown), placed on the substrate placing table 4, and CHF 3 and C 2 F are supplied from the gas inlet 13. 6
Is introduced until the pressure becomes 1 Torr.

【0021】次に、高周波印加電極2を冷却水で冷却し
ながら、高周波電源8よりブロキングコンデンサ9を通
して13.56MHz 、600Wの高周波電力を高周波印
加電極2に印加する。これと同時に、静電チャック用の
直流電源11より高周波フィルタ10を介して負の直流
電圧500Vを高周波印加電極2に重畳する。
Next, while cooling the high frequency applying electrode 2 with cooling water, a high frequency power of 13.56 MHz and 600 W is applied to the high frequency applying electrode 2 from the high frequency power supply 8 through the blocking capacitor 9. At the same time, a negative DC voltage of 500 V is superimposed on the high frequency application electrode 2 from the DC power supply for electrostatic chuck 11 via the high frequency filter 10.

【0022】高周波電力の投入によって、高周波印加電
極2とガス吹出板7との間で構成される空間にプラズマ
が発生し、基板14に負のセルフバイアス電圧(約10
0V)が生じて、プラズマ中よりイオンが引き寄せら
れ、このイオンとプラズマで作られた活性ラジカルの相
互作用により基板14がいわゆる反応性イオンエッチン
グ(RIE)される。
When the high-frequency power is applied, plasma is generated in a space formed between the high-frequency application electrode 2 and the gas blowing plate 7, and a negative self-bias voltage (about 10
0V), ions are drawn from the plasma, and the substrate 14 is subjected to so-called reactive ion etching (RIE) by the interaction between the ions and active radicals generated by the plasma.

【0023】この時高周波印加電極2及びこれと同電位
の基板載置台に埋め込まれた金属電極5には、500V
の負の直流電圧が静電チャック用の直流電源11により
印加されているため、厚さ300μmの酸化チタンを含
有したアルミナを主成分とする誘電体膜を挟んで、基板
14と金属電極5の間には電位差が生じている。このた
め、基板14は基板載置台に静電チャックされ、基板1
4は、基板載置台4に密着し、冷却水により冷却されて
いる高周波印加電極2により強制冷却される。これによ
り、基板14はエッチング中、温度上昇を低く抑えら
れ、シリコンに対して高い選択比を得ながら、シリコン
酸化膜を高速にエッチングすることができる。さらに、
エッチングプロファイルは、垂直から順テーパ形状のも
のが得られる。
At this time, the high-frequency application electrode 2 and the metal electrode 5 embedded in the
Is applied by the DC power source 11 for the electrostatic chuck, the substrate 14 and the metal electrode 5 are sandwiched between the dielectric film mainly composed of alumina containing titanium oxide having a thickness of 300 μm. There is a potential difference between them. Therefore, the substrate 14 is electrostatically chucked to the substrate mounting table, and the substrate 1
4 is forcibly cooled by the high frequency application electrode 2 which is in close contact with the substrate mounting table 4 and is cooled by cooling water. Thereby, the temperature rise of the substrate 14 during the etching is suppressed low, and the silicon oxide film can be etched at a high speed while obtaining a high selectivity to silicon. further,
An etching profile having a forward tapered shape from a vertical direction is obtained.

【0024】エッチングの終了時に、終点検出器等でエ
ッチングの終点を判定すると、まず、静電チャック用の
直流電源11をOFFし、3秒以上の時間を置いて高周
波電源8をOFFにする。静電チャック用の直流電源1
1をOFFにした直後は、3秒以上プラズマの発生が継
続しているため、基板14にはセルフバイアス電圧が誘
起されている一方、金属電極5の電位は冷却水の電気抵
抗を通して接地電位と等しくなるので、厚さ300μm
の酸化チタンを含有したアルミナを主成分とする誘電体
膜の基板載置面近傍に誘起している電荷を逆電圧によ
り、消滅させることができる。このため、高周波電源8
をOFFにした後には、基板14の脱着は静電吸着力が
働かないので、非常に容易になり、次にエッチングする
未処理の基板をロボット等で搬送し、基板載置台上の処
理が終了した基板と入れ換えるときに、搬送ミスや、基
板の破損などを回避することができ、しかも信頼性の非
常に高い静電チャック冷却が実現できる。
When the end point of the etching is determined by an end point detector or the like at the end of the etching, first, the DC power supply 11 for the electrostatic chuck is turned off, and the high frequency power supply 8 is turned off after a lapse of 3 seconds or more. DC power supply for electrostatic chuck 1
Immediately after turning OFF 1, the self-bias voltage is induced on the substrate 14 because the plasma continues to be generated for 3 seconds or more, while the potential of the metal electrode 5 is set to the ground potential through the electric resistance of the cooling water. 300 μm thick
The electric charge induced in the vicinity of the substrate mounting surface of the dielectric film containing alumina as a main component containing titanium oxide can be eliminated by the reverse voltage. Therefore, the high frequency power supply 8
After turning OFF, the substrate 14 is very easily detached because the electrostatic attraction force does not work, and the unprocessed substrate to be etched next is transported by a robot or the like, and the processing on the substrate mounting table is completed. When replacing the substrate, a transfer error, breakage of the substrate, and the like can be avoided, and very reliable electrostatic chuck cooling can be realized.

【0025】静電チャック用の直流電源11をOFFに
してから高周波電源8をOFFにするまでの時間は3秒
以上何秒であっても良いが、余り長いと過度のオーバー
エッチングとなり、デバイス特性上好ましくないことも
起こる。又、この時間が3秒以下であると、誘電体膜に
誘起された電荷を充分に消滅できないため、この発明の
効果は充分に現れない。従って、実用的には、この時間
を3乃至15秒程度に設定することが望ましい。
The time from when the DC power supply 11 for the electrostatic chuck is turned off to when the high-frequency power supply 8 is turned off may be 3 seconds or more, but if it is too long, excessive over-etching will occur, resulting in device characteristics. Some unfavorable things also happen. If the time is less than 3 seconds, the charge induced in the dielectric film cannot be sufficiently eliminated, and the effect of the present invention will not be sufficiently exhibited. Therefore, practically, it is desirable to set this time to about 3 to 15 seconds.

【0026】又、過度のオーバーエッチングを防ぐた
め、上記時間のあいだ高周波電源8のパワーを連続的又
は段階的に下げることも効果のある方法である。
In order to prevent excessive over-etching, it is also effective to reduce the power of the high-frequency power source 8 continuously or stepwise during the above time.

【0027】さて、実施例においては、誘電体膜とし
て、厚さ300μmの酸化チタンを含有したアルミナを
主成分とする誘電体膜を用いたが、この材質は、他のセ
ラミック、例えばチタン酸バリウムやチタン酸鉛のよう
な強誘電体であっても良いし、ポリイミドのような樹脂
であっても良い。又、その厚みも300μmに限定され
ることもない。
In this embodiment, a dielectric film having a thickness of 300 μm and containing titanium oxide as a main component is used as the dielectric film. This material is made of other ceramics such as barium titanate. Or a ferroelectric substance such as lead titanate, or a resin such as polyimide. Further, its thickness is not limited to 300 μm.

【0028】又、実施例に用いた、静電チャックの電
圧、ガスの種類、高周波パワー、エッチングの圧力等
は、特にこの値に限定されるものではない。
The voltage of the electrostatic chuck, the kind of gas, the high frequency power, the etching pressure, and the like used in the embodiment are not particularly limited to these values.

【0029】さらにこの発明の方法は、他のエッチング
装置、例えばバッチ式の装置や、ECR装置等にも適用
し、その威力を発揮することができる。又、プラズマC
VD装置やスパッタ装置等の他のプラズマ処理装置にも
充分適用できるものである。
Further, the method of the present invention can be applied to other etching apparatuses, for example, a batch type apparatus, an ECR apparatus, and the like, and can exert its power. Plasma C
The present invention can be sufficiently applied to other plasma processing apparatuses such as a VD apparatus and a sputtering apparatus.

【0030】次にこの発明のプラズマ処理装置の実施例
について図2を参照して説明する。
Next, an embodiment of the plasma processing apparatus of the present invention will be described with reference to FIG.

【0031】図2は前記高周波印加電極2および基板載
置台4の部分を拡大して示しており、高周波印加電極2
の中心部分には空間18が形成してあり、該空間18の
頂壁および基板載置台4を貫通するように透孔19、1
9(例えば6本)が同一の円周に沿って一定の間隔で形
成してあり、これらの透孔19、19を通して基板載置
台4の上側面に突出又は没入する基板押し上げピン2
0、20が空間18内に収容してある。基板押し上げピ
ン20、20はアルミニウム製として導電性を有するも
のとしてあり、下端部をアルミニウム製のピンホルダ2
1に植設して支持されていると共に、ピンホルダ21と
空間18の頂壁間に設置したスプリング22によって、
常時没入方向に付勢されて、先端が基板載置台4の上面
より突出しないようになっている。前記スプリング22
のピンホルダ21と当接する部分および頂壁と当接する
部分には絶縁材23、23を介設してあると共に、ピン
ホルダ21の側面および下面周縁部が絶縁材23で覆わ
れており、前記基板押し上げピン20、20が透孔1
9、19に遊嵌状態とすることと相俟って、基板押し上
げピン20、20は、電気的に浮いた状態としてある。
FIG. 2 is an enlarged view of the high-frequency application electrode 2 and the substrate mounting table 4.
A space 18 is formed at the center of the space 18, and the through holes 19, 1, 1 are penetrated through the top wall of the space 18 and the substrate mounting table 4.
9 (for example, six) are formed at regular intervals along the same circumference, and the substrate push-up pins 2 projecting or immersing into the upper surface of the substrate mounting table 4 through these through holes 19, 19.
0 and 20 are accommodated in the space 18. The substrate push-up pins 20, 20 are made of aluminum and have conductivity, and the lower end is made of an aluminum pin holder 2.
1 and supported by a spring 22 installed between the pin holder 21 and the top wall of the space 18.
The tip is always urged in the immersion direction so that the tip does not protrude from the upper surface of the substrate mounting table 4. The spring 22
Insulating materials 23, 23 are interposed between the portions that contact the pin holder 21 and the portions that contact the top wall, and the side surfaces and the lower peripheral edge of the pin holder 21 are covered with the insulating material 23. Pins 20 and 20 are through holes 1
The board push-up pins 20, 20 are in an electrically floating state in combination with the loose fit states of the boards 9, 19.

【0032】前記高周波印加電極2の真空容器1を貫通
する部分は筒状部2aとしてあり、該筒状部2aは前記
空間18と連通させてある。そして筒上部2aには外端
側に金属ベロー24が連設され、ベロー24の外端が金
属製の封止板25で封止されていると共に、封止板25
上には金属杆体でなる押し上げ部材26が立設してあ
り、押し上げ部材26の上端面が、前記ピンホルダ21
の下面中央部に、空隙27を介して対向させてある。
尚、図中28は冷却水通路、29はシールドである。
The portion of the high-frequency application electrode 2 that penetrates the vacuum vessel 1 is a cylindrical portion 2a, which communicates with the space 18. A metal bellows 24 is continuously provided on the outer end side of the cylinder upper portion 2a, and the outer end of the bellows 24 is sealed with a metal sealing plate 25 and the sealing plate 25
A push-up member 26 made of a metal rod is provided upright, and the upper end surface of the push-up member 26 is
Is opposed to the center of the lower surface with a gap 27 therebetween.
In the figure, 28 is a cooling water passage, and 29 is a shield.

【0033】さて、上記実施例の働かせ方であるが、例
えば、シリコン基板上に成長させたシリコンの酸化膜を
フォトレジストでパターニングし、これをエッチングす
る場合で述べると、次の通りである。
The operation of the above embodiment will be described below. For example, a case where a silicon oxide film grown on a silicon substrate is patterned with a photoresist and etched is described below.

【0034】先ず、排気口12に接続された真空ポンプ
(図示しない)によって真空容器1内を真空に排気す
る。次に、基板14をロードロック(図示していない)
を通してロボット等で搬送し、基板載置台4上に載置
し、ガス導入口13よりCHF3とC2 6 の混合ガス
を、圧力1Torrになるまで導入する。
First, the inside of the vacuum vessel 1 is evacuated to a vacuum by a vacuum pump (not shown) connected to the exhaust port 12. Next, the substrate 14 is load-locked (not shown).
, And placed on the substrate mounting table 4, and a mixed gas of CHF 3 and C 2 F 6 is introduced from the gas inlet 13 until the pressure becomes 1 Torr.

【0035】そして、高周波印加電極2を冷却水で冷却
しながら、高周波電源8よりブロッキングコンデンサ9
を介して13.56MHz 、600Wの高周波電力を高周
波印加電極2に印加する。これと同時に、静電チャック
用の直流電源11より高周波フィルタ10を介して負の
直流電圧500Vを高周波印加電極2に重畳する。
Then, while cooling the high-frequency applying electrode 2 with cooling water, a blocking capacitor 9 is supplied from the high-frequency power source 8.
The high frequency power of 13.56 MHz and 600 W is applied to the high frequency application electrode 2 via the. At the same time, a negative DC voltage of 500 V is superimposed on the high frequency application electrode 2 from the DC power supply for electrostatic chuck 11 via the high frequency filter 10.

【0036】高周波電力の投入によって、高周波印加電
極2とガス吹出板7との間で構成される空間にプラズマ
が発生し、基板14に負のセルフバイアス電圧(約10
0V)が生じて、プラズマ中よりイオンが引き寄せら
れ、このイオンとプラズマで作られた活性ラジカルの相
互作用により、基板14がいわゆる反応性イオンエッチ
ング(RIE)を受ける。
When the high-frequency power is applied, plasma is generated in a space formed between the high-frequency application electrode 2 and the gas blowing plate 7, and a negative self-bias voltage (about 10
0V), ions are attracted from the plasma, and the interaction between the ions and active radicals generated by the plasma causes the substrate 14 to undergo a so-called reactive ion etching (RIE).

【0037】この時、高周波印加電極2およびこれと同
電位の基板載置台4に埋め込まれた金属電極5には、5
00Vの負の直流電圧が静電チャック用の直流電源11
により印加されている為、基板14と金属電極5の間に
は厚さ300μmの酸化チタンを含有したアルミナを主
成分とする誘電体膜4aを介して、電位差が生ずる。こ
のため、基板14は基板載置台4に静電チャックされ、
基板14は基板載置台4を介して、冷却水により冷却さ
れた高周波印加電極2のもとに強制冷却される。これに
より、基板14はエッチング中の温度上昇を低く抑えら
れ、シリコンに対して高い選択比を得ながら、シリコン
酸化膜を高速にエッチングすることができ、更に、エッ
チングプロファイルは垂直から順テーパ形状のものが得
られる。
At this time, the high frequency application electrode 2 and the metal electrode 5 embedded in the substrate mounting table 4 having the same potential as this
A negative DC voltage of 00 V is applied to the DC power supply 11 for the electrostatic chuck.
, A potential difference is generated between the substrate 14 and the metal electrode 5 via the dielectric film 4a mainly composed of alumina containing titanium oxide having a thickness of 300 μm. For this reason, the substrate 14 is electrostatically chucked to the substrate mounting table 4,
The substrate 14 is forcibly cooled through the substrate mounting table 4 under the high-frequency application electrode 2 cooled by the cooling water. As a result, the temperature rise of the substrate 14 during the etching can be suppressed low, the silicon oxide film can be etched at a high speed while obtaining a high selectivity to silicon, and the etching profile has a vertical to forward tapered shape. Things are obtained.

【0038】エッチングの終了時に、終点検出器等でエ
ッチングの終点を判定すると、先ず、静電チャック用の
直流電源11をOFFし、一定の時間(3〜15秒)経
過後に高周波電源8をOFFする。高周波放電をOFF
する前に、高周波に重畳した直流電圧をOFFする為、
基板14にはセルフバイアス電圧が印加された状態で、
高周波印加電極2側の電位がセルフバイアス電圧に比較
し、負の電位の状態から冷却水抵抗を通して接地電位、
即ち、セルフバイアス電圧より正の電位に変化する。こ
れは丁度、誘電体膜4aの間に逆電圧を印加した状態と
なり、また、その逆電圧の値がセルフバイアス電圧とな
り、基板14の脱着に必要とする電圧に近い為、誘電体
膜に残留する電荷を中和する。次に、基板押し上げピン
20を用いて、基板を脱着させるが、この時、基板押し
上げピン20は、押し上げ部材26と接して高周波印加
電極2と同電位となる為、基板押し上げピン20が基板
と接触した際に、基板に残留している電荷を速やかに除
去できる。このため、基板14の脱着は非常に容易にな
り、次にエッチングする未処理の基板をロボット等で搬
送し、基板載置台4上の処理が終了した基板4と入れ換
える時に、搬送ミスや、基板の破損などを抑制すること
ができ、信頼性の非常に高い静電チャック冷却が実現で
きる。
When the end point of the etching is determined by an end point detector or the like at the end of the etching, first, the DC power supply 11 for the electrostatic chuck is turned off, and after a predetermined time (3 to 15 seconds), the high frequency power supply 8 is turned off. I do. Turn off high frequency discharge
Before turning off the DC voltage superimposed on the high frequency,
With a self-bias voltage applied to the substrate 14,
The potential on the high frequency application electrode 2 side is compared with the self-bias voltage, and the ground potential is changed from the negative potential state through the cooling water resistance.
That is, the potential changes to a positive potential from the self-bias voltage. This is a state in which a reverse voltage has just been applied between the dielectric films 4a, and the value of the reverse voltage is a self-bias voltage, which is close to the voltage required for attaching and detaching the substrate 14, so that the residual voltage remains on the dielectric film. Neutralize the charge. Next, the substrate is detached by using the substrate push-up pins 20. At this time, since the substrate push-up pins 20 come into contact with the push-up member 26 and have the same potential as the high-frequency application electrode 2, the substrate push-up pins 20 Upon contact, the charge remaining on the substrate can be quickly removed. Therefore, the substrate 14 can be easily attached and detached. When an unprocessed substrate to be etched next is transferred by a robot or the like and replaced with the processed substrate 4 on the substrate mounting table 4, a transfer error or a substrate Can be suppressed, and very reliable electrostatic chuck cooling can be realized.

【0039】前記基板押し上げピン20による基板14
の脱着は、金属ベロー24で真空封止した押し上げ部材
26を封止板25を介して外部からピストン等で駆動し
て行う。押し上げ部材26によってピンホルダ21を押
し上げ、これによって基板押し上げピン20を基板載置
台4の上側に突出させることにより基板14を基板載置
台4より脱着させる。押し上げ部材26とピンホルダ2
1は、導電性の金属でできている為、基板14を押し上
げる際、基板14に残留した電荷は、基板押し上げピン
20、ピンホルダ21、押し上げ部材26、封止板2
5、金属ベロー24を通り、高周波印加電極2に流れ、
更に、冷却水を通して接地側に流れる。この為、基板1
4を容易に、しかも基板14を破損すること無く基板載
置台4から脱着させることができるものである。
The substrate 14 by the substrate lifting pins 20
The push-up member 26 vacuum-sealed by the metal bellows 24 is driven by a piston or the like from the outside via the sealing plate 25. The pin holder 21 is pushed up by the push-up member 26, whereby the substrate push-up pins 20 are projected above the substrate mounting table 4, whereby the substrate 14 is detached from the substrate mounting table 4. Push-up member 26 and pin holder 2
1 is made of a conductive metal, and when the substrate 14 is pushed up, the electric charge remaining on the substrate 14 is transferred to the substrate pushing up pins 20, the pin holder 21, the pushing up member 26, and the sealing plate 2.
5. Flow through the metal bellows 24 to the high frequency applying electrode 2,
Furthermore, it flows to the ground side through the cooling water. Therefore, the substrate 1
4 can be easily detached from the substrate mounting table 4 without damaging the substrate 14.

【0040】尚、エッチングの終了時に、直流電圧のO
FFの後、一定時間経過後高周波電圧をOFFし、次い
で基板押し上げピン20で基板14を脱着した場合につ
いて説明したが、直流電圧および高周波電圧を同時にO
FFにし、次いで基板押し上げピン20を押し上げて基
板14に残留した電荷を除去することもできる。
At the end of the etching, the DC voltage O
After the FF, a case where the high-frequency voltage is turned off after a certain time has elapsed, and then the substrate 14 is detached with the substrate push-up pin 20 has been described.
It is also possible to remove the charge remaining on the substrate 14 by setting the substrate to the FF and then lifting the substrate lifting pin 20.

【0041】さて、実施例においては、誘電体膜4aと
して、厚さ300μmの酸化チタンを含有したアルミナ
を主成分とする誘電体膜を用いたが、この材質は他のセ
ラミック、例えば、チタン酸バリウムやチタン酸鉛のよ
うな強誘電体であっても良いし、ポリイミドのような樹
脂であっても良いし、単にアルミニウムの酸化膜であっ
ても良い。また、その厚みも300μmに限定されるこ
とはない。
In this embodiment, a dielectric film mainly composed of alumina containing titanium oxide having a thickness of 300 μm is used as the dielectric film 4a, but this material is made of another ceramic such as titanic acid. It may be a ferroelectric such as barium or lead titanate, a resin such as polyimide, or simply an aluminum oxide film. Further, the thickness is not limited to 300 μm.

【0042】また、実施例に用いた静電チャックの電
圧、エッチング材料、ガスの種類、高周波パワー、エッ
チングの圧力等は、特にこの値に限定されることはな
い。
The voltage, etching material, gas type, high frequency power, etching pressure and the like of the electrostatic chuck used in the embodiment are not particularly limited to these values.

【0043】また、実施例で用いた基板押し上げピン2
0の材質や、押し上げ機構の構造はこれに限定されるこ
とはなく、特に基板押し上げピン20の材質は、金属汚
染を避ける為に、例えばガラス状カーボンやシリコンカ
ーバイトを用いることがより有効である。
The substrate push-up pins 2 used in the embodiment
The material of No. 0 and the structure of the push-up mechanism are not limited to this. In particular, the material of the substrate push-up pin 20 is more effective to use, for example, glassy carbon or silicon carbide in order to avoid metal contamination. is there.

【0044】更に、この発明は、他のエッチング装置、
例えばバッチ式の装置や、ECR装置等にも実施してそ
の威力を発揮することができると共に、プラズマCVD
やスパッタ装置等の他のプラズマ処理装置にも実施でき
るものである。
Further, the present invention relates to another etching apparatus,
For example, it can be applied to a batch type device, an ECR device, and the like to exert its power, and besides, a plasma CVD device.
The present invention can be applied to other plasma processing apparatuses such as a sputtering apparatus and a sputtering apparatus.

【0045】[0045]

【発明の効果】この発明の方法によれば、基板を静電チ
ャックにより充分冷却しながらプラズマ処理を行った
後、基板を、信頼性良く脱着できるので、基板を破損す
ることがない。そのため、信頼性の高いプラズマ処理が
行えると共に、基板搬送の信頼性にも優れたプラズマ処
理方法が提供される。
According to the method of the present invention, the substrate can be detached with high reliability after the plasma processing is performed while sufficiently cooling the substrate by the electrostatic chuck, so that the substrate is not damaged. Therefore, a plasma processing method which can perform highly reliable plasma processing and is excellent in substrate transfer reliability is provided.

【0046】又、この発明の装置によれば、静電チャッ
クした基板のプラズマ処理が完了した後、基板に残留し
た電荷を確実に除去できるので、基板の脱着を信頼性良
く行うことができ、破損するおそれも無くできる効果が
ある。従って、静電チャックを利用して、良好なプラズ
マ処理が行なえると共に、基板搬送の信頼性にも優れた
プラズマ処理装置を提供できる効果がある。
Further, according to the apparatus of the present invention, after the plasma processing of the substrate subjected to the electrostatic chuck is completed, the electric charge remaining on the substrate can be reliably removed, so that the substrate can be detached with high reliability. This has the effect of eliminating the possibility of breakage. Therefore, there is an effect that a good plasma processing can be performed by using the electrostatic chuck, and a plasma processing apparatus excellent in reliability of substrate transfer can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の実施例で用いた反応性イオンエッチ
ング装置の要部の概略断面図。
FIG. 1 is a schematic sectional view of a main part of a reactive ion etching apparatus used in an embodiment of the present invention.

【図2】この発明の実施例の高周波印加電極の部分の拡
大断面図。
FIG. 2 is an enlarged sectional view of a portion of a high-frequency application electrode according to the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 真空容器 2 高周波印加電極 3 対向電極 4 基板載置台 4a 誘電体膜 5 金属電極 8 高周波電源 11 直流電源 14 基板 19 透孔 20 基板押し上げピン 21 ピンホルダ 22 スプリング 23 絶縁材 24 金属ベロー 25 封止板 26 押し上げ部材 27 空隙 DESCRIPTION OF SYMBOLS 1 Vacuum container 2 High frequency application electrode 3 Counter electrode 4 Substrate mounting table 4a Dielectric film 5 Metal electrode 8 High frequency power supply 11 DC power supply 14 Substrate 19 Through hole 20 Substrate push-up pin 21 Pin holder 22 Spring 23 Insulation material 24 Metal bellows 25 Sealing plate 26 Push-up member 27 Air gap

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−110927(JP,A) 特開 昭63−56920(JP,A) 特開 平1−189124(JP,A) 特開 平2−69956(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/3065 C23C 16/509 H01L 21/205 H01L 21/68 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-110927 (JP, A) JP-A-63-56920 (JP, A) JP-A-1-189124 (JP, A) JP-A-2-110 69956 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/3065 C23C 16/509 H01L 21/205 H01L 21/68

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 反応性ガス等のガス導入手段を設けた真
空容器内に高周波印加電極を備え、該高周波印加電極上
に、誘電体膜と、該誘電体膜で覆われて前記高周波印加
電極と同電位となる金属電極を埋め込んだ基板載置台を
設け、プラズマ処理時には、高周波印加電極に、プラズ
マにより発生する負のセルフバイアス電圧より絶対値の
大きな負の直流電圧を高周波に重畳して印加することに
より、基板載置台上に基板を静電チャックする構成とし
たプラズマ処理装置において、前記基板載置台の下側に
高周波印加電極と電気的に絶縁された導電性を有する基
板押し上げピンが、基板載置台を貫通して出没可能に設
置してあり、かつ該基板押し上げピンがスプリングによ
り没入方向に付勢されていると共に、前記基板押し上げ
ピンの下側には、該基板押し上げピンを突出させる為
の、導電性を有する押し上げ部材が空隙を介して対向設
置してあり、該押し上げ部材は前記高周波印加電極と電
気的に導通していることを特徴とするプラズマ処理装
置。
A high-frequency applying electrode is provided in a vacuum vessel provided with a gas introducing means such as a reactive gas, and a dielectric film is provided on the high-frequency applying electrode, and the high-frequency applying electrode is covered with the dielectric film. A substrate mounting table in which a metal electrode with the same potential as that of the substrate is embedded is provided, and during plasma processing, a negative DC voltage, whose absolute value is larger than the negative self-bias voltage generated by the plasma, is applied to the high-frequency application electrode by superimposing it on the high frequency By doing so, in a plasma processing apparatus configured to electrostatically chuck the substrate on the substrate mounting table, a substrate push-up pin having conductivity and electrically insulated from the high-frequency application electrode below the substrate mounting table, The substrate push-up pin is provided so as to be able to protrude and retract through the substrate mounting table, and the substrate push-up pin is urged in a retracting direction by a spring. A plasma processing apparatus characterized in that a push-up member having conductivity for projecting a substrate push-up pin is provided opposite to the air gap, and the push-up member is electrically connected to the high frequency application electrode. .
【請求項2】 高周波印加電極には高周波電源と直流電
源が接続され、直流電源が遮断した後に、引き続き高周
波電源が遮断する構成を備えた請求項記載のプラズマ
処理装置。
Wherein the powered electrode DC frequency power source power supply is connected, after the DC power supply is cut off, continued plasma processing apparatus according to claim 1, wherein the RF power is provided a structure for blocking.
JP10981391A 1991-04-15 1991-04-15 Plasma processing method and apparatus Expired - Lifetime JP3182615B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10981391A JP3182615B2 (en) 1991-04-15 1991-04-15 Plasma processing method and apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10981391A JP3182615B2 (en) 1991-04-15 1991-04-15 Plasma processing method and apparatus

Publications (2)

Publication Number Publication Date
JPH05291194A JPH05291194A (en) 1993-11-05
JP3182615B2 true JP3182615B2 (en) 2001-07-03

Family

ID=14519862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10981391A Expired - Lifetime JP3182615B2 (en) 1991-04-15 1991-04-15 Plasma processing method and apparatus

Country Status (1)

Country Link
JP (1) JP3182615B2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5665167A (en) * 1993-02-16 1997-09-09 Tokyo Electron Kabushiki Kaisha Plasma treatment apparatus having a workpiece-side electrode grounding circuit
TW293231B (en) * 1994-04-27 1996-12-11 Aneruba Kk
JP3163973B2 (en) * 1996-03-26 2001-05-08 日本電気株式会社 Semiconductor wafer chuck device and semiconductor wafer peeling method
JPH10144668A (en) 1996-11-14 1998-05-29 Tokyo Electron Ltd Plasma treating method
US5904779A (en) * 1996-12-19 1999-05-18 Lam Research Corporation Wafer electrical discharge control by wafer lifter system
JP4008077B2 (en) * 1997-10-01 2007-11-14 キヤノンアネルバ株式会社 Plasma processing apparatus and electrostatic adsorption mechanism
JP4267131B2 (en) * 1999-07-09 2009-05-27 東京エレクトロン株式会社 Placement mechanism of workpiece
JP4386753B2 (en) 2004-02-19 2009-12-16 キヤノンアネルバ株式会社 Wafer stage and plasma processing apparatus
JP4559801B2 (en) * 2004-09-06 2010-10-13 東京エレクトロン株式会社 Wafer chuck
KR100646318B1 (en) * 2005-08-19 2006-11-23 동부일렉트로닉스 주식회사 Plasma etching apparatus
JP5302541B2 (en) * 2008-01-09 2013-10-02 株式会社日立ハイテクノロジーズ Plasma processing equipment
JP4780202B2 (en) * 2009-02-05 2011-09-28 パナソニック株式会社 Plasma processing equipment
JP6435992B2 (en) * 2015-05-29 2018-12-12 株式会社Sumco Epitaxial growth apparatus, epitaxial wafer manufacturing method, and lift pin for epitaxial growth apparatus
KR20230146121A (en) 2017-04-21 2023-10-18 어플라이드 머티어리얼스, 인코포레이티드 Improved electrode assembly

Also Published As

Publication number Publication date
JPH05291194A (en) 1993-11-05

Similar Documents

Publication Publication Date Title
KR910002451B1 (en) Vacucem treatment device
KR0151769B1 (en) Plasma etching apparatus
JP3182615B2 (en) Plasma processing method and apparatus
US5255153A (en) Electrostatic chuck and plasma apparatus equipped therewith
KR100506665B1 (en) Etching method, cleaning method, and plasma processing unit
KR100890790B1 (en) Plasma treating apparatus and plasma treating method
JP2004047511A (en) Method for releasing, method for processing, electrostatic attracting device, and treatment apparatus
KR100742487B1 (en) Plasma apparatus and lower electrode thereof
JP4322484B2 (en) Plasma processing method and plasma processing apparatus
JP4642809B2 (en) Plasma processing method and plasma processing apparatus
KR100188455B1 (en) Drying etching method
US20090242128A1 (en) Plasma processing apparatus and method
JPH10154745A (en) Electrostatic attracting device
JPH1027780A (en) Plasma treating method
JP4463363B2 (en) Lower electrode structure and plasma processing apparatus using the same
JP3231202B2 (en) Plasma processing equipment
KR0171062B1 (en) Dry etching apparatus
JP4231362B2 (en) Plasma processing apparatus and plasma processing method
JP4602528B2 (en) Plasma processing equipment
JP4129152B2 (en) Substrate mounting member and substrate processing apparatus using the same
JPH11111830A (en) Electrostatic sucking device and method, and method and device for treatment apparatus using them
JP2004047513A (en) Electrostatic attracting structure, method for electrostatic attraction, apparatus and method for plasma processing
JP4026702B2 (en) Plasma etching apparatus and plasma ashing apparatus
JPH07183280A (en) Plasma treatment device
JP3027781B2 (en) Plasma processing method

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080427

Year of fee payment: 7

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080427

Year of fee payment: 7

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090427

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100427

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100427

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110427

Year of fee payment: 10

EXPY Cancellation because of completion of term