JPH0394470A - Semiconductor device and photoelectric conversion device using the same device - Google Patents

Abstract

PURPOSE:To prevent the lowering of a current amplification factor in a micronized hetero-bipolar transistor(HBT) by making the forbidden band width of a second base region wider than that of a first base region in a base region. CONSTITUTION:A first conductivity type collector region 2, a second conductivity type base region 4 and a first conductivity type emitter region 5 are formed. The base region 4 has a first base region and a second base region shaped to the peripheral section of the first base region, and has an image sensing section having a semiconductor device in which the forbidden band width of the second base region is made wider than that of the first base region, and a vertical scanning section, a horizontal scanning section and a reading section related to the image sensing section. Accordingly, a current amplification factor hFE can be improved, and the deterioration of hFE can be prevented even in a micronized HBT.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device and a photoelectric conversion device using the same. [Prior Art] A bibolar transistor (hereinafter referred to as BPT) will be explained as an example of a conventional semiconductor device. BPTs include a hetero bibolar transistor (hereinafter referred to as HBT) that uses a wide-gap semiconductor region only for the emitter and has a heterojunction only between the emitter and base, and a hetero-bibolar transistor (hereinafter referred to as HBT) that uses a wide-gap semiconductor region only for the emitter, and a hetero-bibolar transistor (hereinafter referred to as HBT) that uses a wide-gap semiconductor region only for the emitter. There is a double hetero BPT that uses . However, in both cases, the horizontal composition of the base was assumed to be constant.

FIG. 1 is a schematic cross-sectional view showing an example of a conventional BPT. In the figure, f is a substrate (for example, an St semiconductor substrate),
2 is an n+ buried region, 3 is an n-region with a low impurity concentration, 4 is a p-region that becomes a base region, 5 is an n4 region that becomes an emitter region, 6 is an n+ region that becomes a channel stop, and 7
101, 102, 103, 104 are elements,
Insulating film for separating electrodes and wiring, 20
0 is an electrode made of metal, silicide, polycide, etc. Here, the substrate 1 contains phosphorus (ph), antimony (sb)
, doped with impurities such as arsenic (As) to make it n-type, or doped with impurities such as boron (B), aluminum (Aj2),
It is made p-type by doping with impurities such as gallium (Ga). The embedded area 2 does not necessarily have to exist. n
One area 3 is shaped by the epitaxial technique or the like.

The base region 4 contains boron (B), gallium (Ga),
It is doped with aluminum (An) or the like. As the carved ivy region 5, polysilicon formed by low pressure chemical vapor deposition (LPGVD) or the like is used.

In such conventional HBT, HBT is miniaturized (
from the emitter (E) to the collector (
There was a problem in that the current flowing in the lateral direction (horizontal direction of the base) increases due to the influence of the current flowing toward C) (current proportional to the area of the vine) and the surroundings of the emitter current.

An example of a conventional BPT is shown in FIGS. 2 and 3, and the current flowing in the lateral direction will be briefly explained.

The schematic cross-sectional view in FIG. 2 shows an HB using a semiconductor region with a wide gap (compared to the bandgap width of the semiconductor region forming the base and collector) only in the emitter.
T is shown. In FIG. 2, 201 is an n-type semiconductor substrate which becomes a collector region, and 202 is a P-type semiconductor substrate which becomes a base region.
203 is an insulating layer, and 204 is an n1 type semiconductor region which becomes an emitter region. Reference numeral 205 is an arrow schematically indicating the flow of current flowing within the BPT (particularly within the base region) when the BPT shown in FIG. 2 is driven. As shown in FIG. 2, although the current flows in the vertical direction in FIG. 2, it spreads in the lateral direction within the base region.

The schematic cross section in Figure 3 shows a narrow gap in the semiconductor region forming the base (a gap width narrower than the bun gap width of the semiconductor region forming the collector and emitter).
An example using a semiconductor is shown.

In FIG. 3, 301 is an n+ type silicon region, 302
303 is an n-type silicon region which becomes a collector region, and 303 is a P0-type silicon germanium (S i l
-x Ge x) region, 304 is n which becomes the emitter region
305 is a P type silicon region for electrically connecting the base region and the electrode 306, and 307 is an n+ type silicon region for electrically connecting the emitter region and the electrode 308. Further, 309 is an arrow schematically showing the flow of current that flows when the double hetero BPT shown in FIG. 3 is driven, and 310 is an insulating layer.

As shown in FIG. 3, although the current flows in the vertical direction in FIG. 3, it spreads in the lateral direction within the base region.

That is, carriers injected from the emitter region are not effectively confined, resulting in a one-dimensional reduction in current amplification factor.

In other words, HB due to the vertical current flowing between E and C
The current amplification factor hrx of T decreases. This is also a problem in homozygous BPT.

When the emitter area is large, the change in emitter area dimension is h,. However, when miniaturized, due to the effect of the peripheral length, the change in area changes due to the hF of IBT.
This will appear as a change in E. In the case of HBT,
When hrc becomes smaller, the carrier injection into the emitter is drastically reduced and the recombination current in the base becomes the dominant term, so this increase in lateral current becomes extremely important.

In a photoelectric conversion device, when 'hWE decreases, first B
The readout gain from a sensor using PT decreases, resulting in a decrease in signal voltage.

That is, this is because the current driving ability of the BPT is reduced, and fixed pattern noise (FPN) increases.

For this reason, in a photoelectric conversion device, the most important signal-to-noise ratio (S/N ratio) is significantly reduced.

Furthermore, the reduction in hrt causes a reduction in the current driving ability of the BPT, resulting in a reduction in switching speed and response.

In addition, since the effect of dimensions when miniaturized appears on hFE, variations in h,, when miniaturizing a sensor compatible with high speeds will significantly increase the noise of photoelectric conversion, and the sensor element There is a large variation in

That is, the aperture ratio of the sensor becomes smaller, the signal becomes smaller and the variation becomes larger, and a significant drop in S/N is inevitable.

[Problems to be Solved by the Invention] The present invention solves the above problems, and an object of the present invention is to prevent lateral diffusion current in the base and almost eliminate lateral collector current. An object of the present invention is to provide a semiconductor device that can perform the following steps, and a photoelectric conversion device using the device. Another object of the present invention is to provide a semiconductor device that can eliminate the lateral BPT effect, and a photoelectric conversion device using the semiconductor device.

Another object of the present invention is to suppress lateral injection current and reduce base current. An object of the present invention is to provide a semiconductor device and a photoelectric conversion device using the device.

In addition, an object of the present invention is to provide a semiconductor device and a photoelectric conversion device using the device, which can improve the current amplification factor h- and prevent the deterioration of hFE even in a miniaturized HBT. It is to provide.

A further object of the present invention is to provide a semiconductor device and a photoelectric conversion device using the device, which can reduce lateral current and thereby reduce current concentration at the emitter etch at large currents. It is to provide.

The purpose of the present invention is to confine the collector current (prevent unnecessary lateral current diffusion) due to the difference between the lateral band gap and the vertical band gap, and to miniaturize the device. An object of the present invention is to provide a semiconductor device having a current amplification factor as high as possible, and a photoelectric conversion device using the device.

An object of the present invention is to provide a high-performance semiconductor device that can increase current drive capability when emitters have the same pattern (size) as conventional ones, and a photoelectric conversion device using the device.

In addition, another object of the present invention is to provide a photoelectric conversion device with higher sensitivity by using a high-performance BPT structure.

[Means for Solving the Problems] A semiconductor device of the present invention includes a collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of a first conductivity type, the base region comprising: a first base region and a second base region provided around the first base region;
The forbidden band width of the second base region is wider than the forbidden f width of the base region.

The photoelectric conversion device of the present invention is characterized by using the above semiconductor device. The semiconductor device of the present invention includes: a collector region having a first conductivity type; a base region having a second conductivity type formed on the base region; and an emitter formed on the base region having a first conductivity type. In a semiconductor device having at least a region, at least a portion of the base region below the vine region has a smaller band gap than the emitter region and the collector region, and the base region has a potential barrier in the horizontal direction. It is characterized by

A photoelectric conversion device of the present invention is characterized by using the above semiconductor device.

A semiconductor device of the present invention includes a collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of a first conductivity type, wherein the base region includes a first base region and a surrounding portion thereof. a second base region provided in the first base region;
an imaging section including a semiconductor device in which the forbidden band width of the second base region is wider than the forbidden band width of the base region; and a vertical scanning section, a horizontal scanning section, and a reading section related to the imaging section.

A semiconductor device of the present invention includes a collector region having a first conductivity type, a base region laminated on the collector region and having a second conductivity type, and an emitter formed on the base region and having a first conductivity type. at least a portion of the base region below the emitter region has a smaller band gap than the emitter region and the collector region, and the base region has a potential barrier in the horizontal direction. The image capturing section includes a vertical scanning section, a horizontal scanning section, and a reading section related to the imaging section.

[Function] The semiconductor device of the present invention that achieves the above-mentioned object will be described below as an example.

The semiconductor device of the present invention effectively confines carriers injected from the emitter within the base region.
It has a structure that actually prevents the spread of current in the lateral direction.

That is, by providing a heterojunction in the base region, the bandgap barrier is utilized to prevent current from spreading in unnecessary directions.

Since most of the base current in a heterobibolar transistor (HBT) is a current generated by recombination of carriers injected from the emitter, confinement of this current has a great effect.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Example 1) FIG. 4 is a diagram showing a semiconductor device according to an example of the present invention. In the figure, parts with the same symbols as in Figure 1 are
Each shows the same thing. Further, 8 is a region in which Ge is mixed into Si to form a mixed crystal, resulting in SiI-xGe,l, and 9 is an emitter electrode, which is formed by low-pressure chemical vapor deposition (LP).
It is made of polysilicon formed by GVD) or single crystal silicon formed by epitaxial technology, etc., and has an impurity concentration of I x 10" to 10"C.
This is the 01 area of m-'.

FIG. 5 is a schematic plan view for explaining the arrangement of the base, emitter, and collector regions of the semiconductor device shown in FIG. 4. The symbol shown in FIG.
It is marked corresponding to the figure.

As shown in FIG. Ge. Area 8 is
It is formed so as to be surrounded in a plane by the P region 4 of the base region. An unillustrated slip region 5 is provided on the emitter region 9, and an unillustrated electrode 200-1 is further provided. The base region is Sil-, Ge. It is formed by region 8 and P region 4. In other words, it has a structure with a heterojunction in the base. On the P region 4, the electrode 200-2 is
It is formed to be electrically connected to region 4 (here, the electrode 200-2 is formed in a U-shape). The n0 region 7 is formed at a position apart from the base region, and an electrode (not shown) (collector electrode 200-3) is provided on the n+ region 7. In such a semiconductor device of this example,
The base current mainly consists of the following two components. (
However, when the tip of the main ivy W is contacted with metal) The main current components of the base current are J AlnJ and J Ilrse below ( J B "J all'lJ"
J 15r@e) eFirst, due to the presence of a potential barrier, the hole diffusion current from the base to the emitter is JalnJ-(Q'nl2・Dp/Ng-Lp)xco
th(WE'/Lp)[exp(Vac/kT)-11
-1-(1) is approximately expressed. Also, the recombination current of electrons injected from the emitter is JBt@c” {q”nl”DneX!) (ΔEg/
kT)/N1Lo)x [ {cosh (W!l/L
H) -1}/ {s inh (WB/LH))]
x [exp (veE/kT) −tl
"" 1-(2)

On the other hand, the collector current is JC − (q'n+'・t+nexp(ΔEg/kT
) / N1Ln)x (cosech(We/Ls)
) 'x (exp (VaE/kT) -1)
= 1- (3). Here, q is the charge, ni is the intrinsic semiconductor charge density (S i), Nt is the emitter impurity density, NB is the base impurity density, DP is the hole diffusion coefficient, DN is the electron diffusion coefficient, t, p is the hole diffusion length (given (DpτP)l/2), L,4 is the electron diffusion length, (4(DNτN)”2)+ic is the Boltzmann constant, T is the absolute temperature %VllE is the base-emitter order bias τ2 and τ are the minority carrier lifetimes of holes and electrons, ΔEg is the band gap difference between Si and Si-Ge, W is the thickness of the emitter, and Wl5 is the thickness of the base.

Note that the intrinsic carriers in the base are n, 2 in the region formed by St, whereas the intrinsic carriers in the base are n,2 in the region formed by St, whereas
In the region formed by Ge, nl2exp(ΔE
g/kT). This is because the bandgap of the base is narrower than that of the emitter by ΔEg.

Therefore, in the HBT according to this embodiment, while the collector current increases and the recombination current of carriers injected from the emitter also increases, the number of carriers injected from the base to the emitter does not decrease, so the current amplification factor hn increases.

Figures 6(a) and (b) are A-A゜ and B in Figure 4.
-B' is a potential diagram along the line shown in FIG.

In the figure, E. g is the band gap of Si and Eg is the band gap of S L-Ge. As shown in the figure, △Eg=E
g-Eg'.

The feature of the present invention is that, as shown in FIG. 6(b), a potential barrier ΔEg is formed in the base in the lateral direction. This barrier blocks the injected carriers, and the probability of exceeding this barrier is exp (-ΔEg/kT). For example, △Eg=
If it is 0.1, it will be approximately 1/54. Therefore, the current in the horizontal direction can be suppressed, and the collector current can be efficiently passed in the vertical direction.

In a homojunction BPT, the base current is usually the current JllInj injected from the base to the emitter, and the recombination current JBrs of carriers injected from the emitter. bigger,
This is the main cause of base current. However, in HBT (2)
As shown in the formula, J! tree is exp (ΔEg/
kT), so J a+. ac>J 81nJ. For example, if △Eg is 0.1 eV, then k at room temperature
T=o. Since it is 025eV, exp (ΔEg/kT
)=s4. At a sufficient value of △Eg, J Brea＞
J! llnJ, and the base current is almost J a
rea, and the current amplification factor is hPE= J C /
Became J Brae.

Here, if Wa<Ln, the following equation is obtained.

hrt- (2Ln/Wa) 2...(4) This is
This is the limit value of hFE of HBT. That is, brε is determined only by the thickness WB of the neutral region of the base and the diffusion length n of minority carriers diffusing in the base.

The above is a one-dimensional HBT approximation, but in reality, current flows two-dimensionally (on a cross-sectional view). FIG. 7 is an enlarged view of only the emitter section. In the figure, xj is the depth of the emitter in the substrate, W, is the vertical base width, and WB' is (
This is the distance to the potential barrier shown in b). As shown in the figure, the base current J 8rsc is the original vertically flowing J Br
Jllra flowing horizontally with sci-fi. It can be broadly classified into components. Here, J Ilrscx lowers hFE in HBT.

Approximating that carriers are completely blocked by the potential barrier shown in FIG. 6(b), Jl5x becomes as follows.

JBx-{Q'n+"DneXI) (ΔEg/kT)/
N1Lll)xtanh(Wa'/Ls) (exp
(Vax/kT)-1} ・=(5) Considering this current term, if the emitter area is A, the emitter peripheral length is, and h. is expressed as follows.

hrt-A1Jc/ (AtJay"LEXjJax)
- (6) brε was originally determined by h rt = JC / J Fly when the peripheral length was not an issue, but as miniaturization progressed, brε was determined by AE and LεX,
It will be about the same amount. For example, Xj=0.3μm
and AE=1x t μrr? Then, XjLi
/A! = 1. It becomes 2. When scaled down, JBX has a very large impact on h2o.

When the ratio of Jlly shown in equation (2) and JBX shown in equation (5) is approximated under the conditions of L n > W n and L n > W a ', J! IX/Jll)l =2wB'/wB
...(7), where the current density in the horizontal direction is larger than the current density in the vertical direction. In the case of a conventional BPT without a potential barrier, equation (5) can be applied as is, so Jaw/Jay J=r2 (Ln/Wa),
Usually, since it is Ln)WB, the lateral current density becomes large. In this state, as shown in equation (6), a decrease in hrz is inevitable.

As in this example, the lateral potential barrier of the invention is created, and the emitter is set to A t = L Ex'', (6), (7
), hFE is expressed by the following equation.

hrI, - (Jc/Jay) [1/ {D (8X
J/LEX) (Wa'/Wa) }]=hrzo {
1/ (1+(8XJ/LEX) (WB'/Wl1)
} ...(8) That is, B, P in the vertical direction
It is considerably smaller than hFEo determined by the T structure. In order to reduce the influence of lateral current, (axj/t.ex) (wa'/wa)≦1
...(9) must be satisfied.

For example, when W,''=WB and L l!X=L nm, X''≦0.125 μm. This effect becomes a very serious problem when the emitter size becomes finer. In the case of a conventional BPT without a potential barrier, W8° is replaced with Ln, so it is no longer possible to increase hFE, and the characteristics of the HBT cannot be utilized. In the present invention, it is possible to manufacture the emitter so that WB"≦Wa, so if the emitter depth X is determined according to the emitter area, the decrease in hrE can be suppressed.

Figure 8 shows the length of one side of the ivy, zx( μm)
h FE/h FE standardized as.

This is a graph showing the relationship between According to FIG. 8, in a miniaturized BPT with an emitter of 3 μm square or less, w,'=w. It can be seen that under the condition that Xj≦0.1 μm is required.

Normally, when the dissimilar conductor region 8 is created by diffusion, W
B■=Wa, and when fabricated by ion implantation, WB°≦W8. However, WB does not reach about % of W8. wl1' and W! The relationship of l can be determined in various ways depending on the process conditions.

Next, the mixed crystal of Si and Ge will be explained in detail. Si
and Ge have the same diamond-shaped crystal and are a perfect solid solution, and S i1-xG e. for all x (0<
For x<1), a perfect diamond-shaped crystal is obtained.

Each prohibition 'tliEg is approximately 1.1e in St
It is 0.7 eV for V and Ge, and as X increases, <Eg changes as shown in FIG.

In FIG. 9, the horizontal axis shows the mixed crystal ratio X, and the vertical axis shows the forbidden band width Eg, the reduction width △Ec on the conduction band side, and the reduction width △Ev on the valence band side. In the ex mixed crystal, most of the band gap reduction occurs in the valence band. This is very good for the HBT, since it is possible to suppress the injection of holes caused by holes, and it does not become a barrier to the injection of electrons from the emitter to the base.

Another problem with heterojunctions is the difference in lattice constants of the materials. The lattice constant of Si is ds,=5.
There are 43,086 people, and the lattice constant of Ge is d0. =5.6
Since there are 5748 people, the difference in lattice constant is approximately 4%. Therefore, on top of SL, S i,1. Ge. Naturally, creating a stress will cause stress, and in severe cases, dislocation will occur.

There is a certain relationship between the Ge mixed crystal ratio X and the thickness at which no dislocations occur.゜Figure 10 is a diagram showing this relationship, where the horizontal axis is Si. ．． The mixed crystal ratio X of G e x is shown, and the vertical axis shows the relationship between the presence of dislocation (●) and the absence of dislocation (○). However, this data is based on the molecular beam epitaxial method (M
Si. ．． The results were obtained by depositing G e X. Since the growth was performed here at 510° C., the thickness of the transition plate region from SiI-xG e to Si is very thin. When S i,-XG e X is formed by the molecular beam epitaxial method,
St and St,-,GeX have a stepwise change. Therefore, in a layer with a uniform mixed crystal composition X, dislocations will occur at the interface unless the thickness is equal to or less than the shaded area in FIG.

The present invention solves the dislocation problem by forming this region into a graded graded heterojunction.

The introduction of Ge into the base achieves this graded heterojunction by ion implantation.

Conventional Si. ．． G e. In the stepped heterojunction BPT, if the stress is large and severe, dislocation occurs and S
il -X G e ) Many reconsolidation centers occur at the interface between B and Si, and as a result, excessive current flows, I increases on the low current side, and in the region where Ic is small, hrz is small and IC increases. It showed a characteristic that hFE increases as the temperature increases.

On the other hand, in this example, the hetero interface is Si. ．． G
e. Since the ion implantation method gradually transitions to Si, and unlike conventional methods such as MBE, an ion implantation method was used, so a more ideal heterobond was obtained. FIG. 11 is a graph comparing the h, characteristics of the conventional BPT and the BPT according to this embodiment. In the figure, the horizontal axis shows the collector current, and the vertical axis shows the current amplification factor hH (=Jc/Ja). Moreover, A shows the conventional hFE characteristics, and B shows the hre characteristics of this example.

The thickness of the transition region may be determined using the values obtained from FIG. For example, if the mixed crystal ratio xw is 0.3, the width of the peak concentration should be 300 people or less, and if x = 0.2, the width of the peak concentration should be 500 people or less,
= 0.1, the width of the peak concentration may be 1500 people or less.

Ion implantation conditions can be determined more easily by analyzing the impurity distribution of ion implantation using, for example, SIMS (secondary ion mass spectrometer). Depending on the design mixed crystal ratio X,
The thickness of the transition region of the heterojunction (ion implantation conditions) can be determined in accordance with the data in FIG. 6 by comparing with the SIMS analysis results.

Since Si is approximately 5 x 10'' am-3, the mixed crystal ratio X can be easily calculated from the Ge dose.

Next, FIG. 12 shows an example of a schematic manufacturing process flow for the semiconductor device shown in FIG. 4.

An important process is the step of selectively introducing Ga only under the emitter. In Fig. 12, Ge is ion-implanted (impurity concentration 5xlO"cm-', Mix crystal ratio 40.1), and after diffusing to a predetermined depth, B"4
After ion implantation of 1013 cm-'' at a low acceleration voltage of 5 keV, heat treatment is performed at 850°C for 30 minutes to determine the depth of the base.Other steps are as shown in the figure.
．． ．． G e. To create the region, for example, after opening the emitter, the substrate is shallowly etched, and then Si. ．． G
e. Ebitaxial analysis may be performed.

By the ebitaxial method, S i, . When G e x is disciplined, W a ′ < W a can be satisfied. However, in this case, a stepwise heterojunction can be formed, so it is preferable to take stress, dislocation, defects, etc. into account when creating the junction.

(Example 2) FIG. 13 is a schematic cross-sectional view showing another example of the present invention.

In FIG. 13, the same reference numerals as in FIG. 4 indicate the same things. In FIG. 13, 1301 is a P3 region formed of polysilicon for electrically connecting the P region 4 of the base region and the electrode 200-2; 1302.1
303 and 1304 are respectively Sin. It is an insulating layer such as.

In this example, the lead-out electrode of the base was made of P+ polysilicon, and the essential base and emitter were made of self-alignment.

Even in such a BPT, the characteristics of the current amplification factor hPE could be significantly improved.

(Example 3) FIG. 14 is a schematic cross-sectional view for explaining another example of the present invention. In FIG. 14, 1 is an n-type or p-type semiconductor substrate;
2 is a substance that controls n-type conductivity x. 3 is an n-type doped region doped with n-type impurities; 4 is a P-type intrinsic base region which is a narrow bandgap semiconductor region of a semiconductor that avoids heterobibolar formation (
(first base region), 5 is an external base region formed around the outer periphery of the intrinsic base region 4, (second base region) 9 is a P+ region for lowering base resistance and/or base contact resistance, 7 is formed of a semiconductor having a wider bandgap than the semiconductor forming the first base region,
The n0 region which becomes the emitter region, (emitter region) 8 is the n0 region to lower the collector resistance of the bibolar transistor.
“Regions 101 and 102 are insulating films 20 for electrically isolating between transistors, between electrodes, between wirings, etc., respectively.
Reference numerals 0-1, 200-2, and 200-3 are electrodes made of metal, silicide, polycide, or the like, and serve as an emitter electrode, a base electrode, and a collector electrode, respectively.

In general, the semiconductor substrate 1 is a silicon substrate doped with atoms selected from group Ⅰ of the periodic table such as zon (P), arsenic (As), and antimony (sb) as impurities to make it n-type, or boron (B). A silicon substrate doped with atoms selected from Group III of the periodic table such as , aluminum (AJZ), gallium (Ga), etc. as an impurity to make it P-type is used.

In addition, the buried region 2 is doped with n-type impurities of 1016 to 1
It is made to contain at a concentration of 0 20 cm-'.

The n-region 3 (becomes the collector region of BPT) is formed by epitaxial technology, etc., and is doped with n-type impurities of 1014 to 1
This region has a low impurity concentration of approximately 0.017 cm''.

The first base region 4 is a semiconductor region containing St and Ge, and contains P-type impurities at a concentration of 10'' to 10''cm-'.

The second base region 5 is formed of crystalline silicon by vapor deposition or the like. Next, the constituent components of the BPT current will be described using this embodiment as an example.

The current injected from the emitter is approximately JEI-qDnNi2e△Eg/kT/N1Wa (x
x p (Va!/kT) -1}...2-(1). However, it is assumed that the electron diffusion region Ln is sufficiently longer than the base width WB. Note that N8 is the base concentration, D. is the electron diffusion distance, Ni is the intrinsic carrier density of SL, ■Bε
is the base-emitter applied voltage.

ΔEg is the difference in band gap between St-Ge and St.

The current component that flows two-dimensionally in the lateral direction around the emitter is Ln×WB, so it can be approximated as follows.

JEII = qDnNi2/N1Ln (j2
P(Vaz/kT)-1)...2-(2) However, S L-Ge mixed crystal and Si are approximated in the same way as Dn, N, etc.

This current ratio P6 affects the characteristics of BPT.

Assuming emitter area AEs peripheral length Lε and emitter depth WB, Pi-Jc1L1Wt/Jct ・Az=Wa/Ln-
LaWc/Ar:ixP(1△Eg/kT)
-2- (3) It is clear that the effect of uXP (ΔEg/kT) is very large. As the emitter dimension becomes smaller than 1 μm, Wa/Ln-LaWc
/AC=1, and uxP(1△E
g/kT). Also JZXP (one△E
g/kT) <<t, it is sufficient if △Eg>>kT.

As described above, in the case of a heterobibolar transistor, the base current is a recombination current of carriers injected from the emitter.

As described above, some of these recombination currents recombine in the first base region and others recombine around the emitter.

The recombination current on a negative basis is shown below.

Ja+-1/2・qDnn+2e△Eg/kT/N1W
B/Ln'(i x p (VBE /k t) -i)
・2-(4) The recombination current Jlle of the base around the periphery is the same as the equation 2-(2).

The ratio PB of the negative base current in the base and the surrounding current is as follows.

Pa- Jat-L1Wt/Ja+・＾t-2・Ln/
Wa-LtWt/Ae-J2XP (-ΔEg/kT)
...2-(5) In the case of miniaturization,
In order to keep the hrg of BPT high, it is necessary to set PB<<1.

Therefore, 2・Ln/W1L, W, /A, <<jl! XP
(1△Eg/kT)...2-(6) The following conditions are important. Normally Ln>>We, and when miniaturized, LEWE/AE=f, so the effect of confining current due to the difference in band gap is very important.

The collector current is almost the same as equation 2-(1),
In the BPT of the present invention, hrt is as follows. (1◆p
a-i) h re = Jc/Ja +=2 (Ln/”a)
' ・= 2- (7) If this effect does not exist, hFE becomes 1/l+P.

Next, the manufacturing process of the semiconductor device shown in FIG. 14 will be outlined with reference to FIG. 15.

■By ion-implanting As, Sb, P, etc. into the P-type or n-type substrate 1 (thermal diffusion may also be used), the impurity concentration, n of I
+ Form buried region 2. (Figure 15(a)) ■Next, by using the epitaxial technique etc., the impurity concentration I
Form an n-type region 8 (impurity concentration, IX1017 to 1×10”cm) to reduce the collector resistance. -3)
form. (FIG. 15(C)) (1) Element isolation regions 102 are created by selective oxidation, CVD, or the like. (FIG. 15(d)) (1) After removing the oxide film in the active region, a narrow bandgap layer (S1+-xGex, etc.) 4, which will serve as a base, and an n1 layer 7, which will serve as an emitter, are formed by an epitaxial method or the like. (Fig. 15(e)) ■ After depositing an oxide film on the entire surface, the region 7 that will become the emitter base,
Only the portion 4 is left by etching using an oxide film mask. Etch to the same depth as the base or slightly deeper. (FIG. 15(f)) (1) With the oxide film left in place, and using this oxide film as a mask, a P-type region 5 is formed in the etched crystal region only on the Si by a selective epitaxial method. (Fig. 15(g)) ■ After removing the oxide mask, the ohmic resistance of the base and
The shape of the 24 region 9 and the collector region 8 are again diffused from the surface to lower the base resistance. (FIG. 15(h)) (1) After depositing the insulating layer 101, a contact hole is opened.

(FIG. 15(i)) [Phase] After depositing the metal electrode 200, patterning is performed. (
Figure 15 (j)) ■Finally, 30 minutes in an atmosphere of 400℃ (Figure 15 (j))
After annealing the fabricated product shown in , a passivation film was applied to complete BPT.

(FIG. 15(k)) According to the present invention described above, the above-described problems could be solved and the above-mentioned objects could be achieved.

(Embodiment 4) FIG. 16 is a schematic cross-sectional view showing another preferred embodiment of the present invention.

In this example, PゝSi+-. Ge. A layer is buried below the emitter region.

The manufacturing process is different from that shown in Fig. 15, and the P0 SiI-. Ge.
After Jil (base P+ region) 4 is etched by the epitaxial method, the first base region opening is left and etched, and the second base region 5 is etched by the epitaxial method. Then, by diffusion (or ion implantation method),
Create emitter region 7. Emitter region 7 is base P
It is preferable to form the emitter region so as to be in contact with the base P region 4.However, even if the emitter region opening does not reach the base P region 4 and enters into the base, . The effect of concentrating carriers from the emitter is similar.

In FIG. 16, 8 represents the n"si region and P"Si,
-xGex indicates the width between the areas.

When this interval is 10 (when the emitter region and the base P0 region are far apart) and when it is - (when the emitter region and the base P0 region overlap regionally),
Figure 17 shows the potential distribution at cross section AA' in Figure 16 (
Shown in a) and (b), respectively. If this interval 8 is 10, the potential diagram will be as shown in FIG. 17(a), and the diffusion length of the minority carriers in the base will be. If it is smaller and the distance is 8 -, the potential diagram will be as shown in Figure 17(b), and the diffusion length of the minority carriers in the emitter will be smaller than becomes a dog. In either case, the collector current in the lateral direction of the base region shown in FIG. 16 can be confined sufficiently by the band gap difference between St and Si+-, lGex.

According to the configuration of this embodiment, the manufacturing process can be easily managed compared to a buried structure. Furthermore, the manufacturing process becomes simpler.

Therefore, it is expected that the yield will be improved and the cost will be reduced.

(Example 5) FIG. 18 shows the BP shown in the first example in a photoelectric conversion device.
It is a circuit diagram showing the case where T is used. In FIG. 18, the BPT shown in Example 1 was used in the part indicated by Tr. In FIG. 18, 1 is an imaging section, 2 is a vertical scanning section, and 3.
4 are a horizontal scanning section and a reading section, respectively. 1st
Figure 9 (a), (b). (c) is a schematic plan view and a cross-sectional view of the imaging section. Optical information is incident from a direction perpendicular to the drawing, and holes are accumulated in the base.

That is, in this example, BPT was used as a photoelectric conversion element.

For example, when the area sensor shown in FIG. 18 is used as a color camera, the optical information of the same photoelectric conversion element is read out multiple times.

At this time, since the same element is read out multiple times, the ratio of the electrical output during the first readout and the second and subsequent readouts becomes a problem. If this value becomes small, correction is required.

If the ratio of the readout outputs of the first and second readings is defined as the non-destructive degree, the non-destructive degree is expressed by the following equation.

Nondestructiveness = (CtotX hrt) / (Ctot
X hrc+cv) Here, Ctot is Tr in FIG.
The total capacitance connected to the base of the photoelectric conversion element is represented by: base-emitter capacitance Cb@, base-collector capacitance Cbe and C. Determined by X. Cv is VL
, . . . is the stray capacitance of the read line indicated by VLn. However, C08 may not exist depending on the circuit system.

The degree of non-destruction can be easily improved by increasing hrc. That is, by increasing hFE, the degree of non-destruction can be increased.

Although the present embodiment shows the case of an area sensor, it is clear that the present invention can also be applied to a line sensor.

Furthermore, even by using the semiconductor device shown in Figure N14, we were able to obtain a similarly excellent non-destructive @readable sensor. [Effects of the Invention] As explained above, according to the present invention, it is possible to block the lateral diffusion current in the base and almost eliminate the lateral collector current, so that the lateral BPT
The effect can be eliminated.

Further, in the HBT according to the present invention, the lateral injection current can be suppressed, and the base current can be reduced.

Therefore, according to the present invention, it is possible to improve the current amplification factor hFE, and therefore, even in a miniaturized HBT, h
Deterioration of FE can be prevented.

Further, according to the present invention, since the lateral current can be reduced, current concentration at the emitter etch at a large current can be reduced.

[Brief explanation of drawings]

1, 2, and 3 are schematic cross-sectional views for explaining a conventional bibolar transistor (BPT), respectively, and FIG. 4 is a schematic cross-sectional view for explaining a preferred embodiment of the present invention. A schematic cross-sectional view, FIG. 5 shows the BP shown in FIG. 4.
A schematic plan view of T, FIG. 6 is taken along A-A' in FIG.
The potential diagram at B-B', Fig. 7 is a schematic cross-sectional view showing the enlarged emitter part of BPT, and Fig. 8 is the hFE/
hP! . 9 is a graph showing the energy gap with respect to the mixed crystal ratio of silicon and germanium. FIG. 10 is a graph showing the mixing crystal ratio of silicon and germanium and dislocation. The figure shows the conventional B
A diagram showing the hFE characteristics of PT and BPT of the present invention, a schematic cross-sectional view for explaining another embodiment of the present invention, and FIG. 12 shows the manufacturing process of the semiconductor device of the present invention shown in FIG. FIGS. 13 and 14 are schematic cross-sectional views for explaining other embodiments of the present invention, and FIG. 15 is a schematic diagram showing the manufacturing process of the semiconductor device shown in FIG. 14. FIG. 16 is a schematic cross-sectional view for explaining another embodiment of the present invention, and FIG. 17 is for explaining the potential in the depth direction of A-A' shown in FIG. 12. diagram for,
Fig. 18 is a circuit diagram of a solid-state imaging device in which the BPT of the present invention is used in the solid-state imaging device, Fig. 19(a), Fig. 19(
b) and FIG. 19(C) are a schematic plan view and a schematic cross-sectional view of the imaging section of FIG. 18, respectively. 3...n-region, 4...p-region serving as a base region, 5...n+ region serving as an emitter region, 7...
・n1 region to lower collector resistance, 8...Si
l-X G e X region, 9... emitter electrode, 10
1, 102, 103... insulating film, 200-1. Zoo
-2.200-3... Electrode. (Explanation of symbols) 1...Substrate (Si semiconductor substrate), 2...n+ buried Fig. 2 307 101 Fig. 6 Fig. 7 Fig. 9 Fig. SiiJ degree = +5 Figure 10 O 0.5 1.0 Ge mixture ratio (X) Figure 11 rc (log relative value) Figure 15 Passivation Figure 15 Figure 19 (a) i 11 region fJ,a

Claims (17)

[Claims] (1) A collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of a first conductivity type, the base region being provided in the first base region and its surrounding area. a second base region, and the first
A semiconductor device characterized in that a forbidden band width of the second base region is wider than a forbidden band width of the base region. (2) The semiconductor device according to claim 1, and a photoelectric conversion device using the device, wherein the emitter region and the second base region have the same or substantially the same forbidden band width. (3) The semiconductor device according to claim 1, further comprising a semiconductor region having the same conductivity type and the same forbidden band width as the second base region between the emitter region and the first base region, and using the semiconductor device. Photoelectric conversion device. (4) The semiconductor device and photoelectric conversion device using the device according to claim 3, wherein the emitter region and the second base region have the same or substantially the same forbidden band width. (5) A semiconductor region according to claim 1, further comprising a semiconductor region of a first conductivity type and having a forbidden band width that is the same as or substantially the same as that of the first base region, between the emitter region and the intrinsic base region. A semiconductor device and a photoelectric conversion device using the device. (6) The semiconductor device and photoelectric conversion device using the device according to claim 3, wherein the semiconductor region has a thickness shorter than the diffusion length of minority carriers. (7) The semiconductor device and photoelectric conversion device using the device according to claim 5, wherein the semiconductor region has a thickness shorter than the diffusion length of minority carriers. (8) A semiconductor device according to claim 1, wherein the first conductivity type is an n-type, and a photoelectric conversion device using the device. (9) The semiconductor device according to claim 1, wherein the second conductivity type is p-type, and a photoelectric conversion device using the device. (10) The semiconductor device and photoelectric conversion device using the device according to claim 1, wherein the first base region contains silicon and germanium atoms. (11) A semiconductor device according to claim 1, wherein the collector region contains silicon atoms, and a photoelectric conversion device using the device. (12) A semiconductor device according to claim 11, wherein the collector region is a single crystal, and a photoelectric conversion device using the device. (13) A photoelectric conversion device comprising the semiconductor device according to claim 1. (14) At least a collector region having a first conductivity type, a base region laminated on the collector region and having a second conductivity type, and an emitter region formed on the base region and having the first conductivity type. A semiconductor device comprising: at least a portion of the base region below the emitter region having a smaller bandgap than the emitter region and the collector region, and wherein the base region has a potential barrier in the horizontal direction. Device. (15) A photoelectric conversion device characterized by using the semiconductor device according to claim 14. (16) A collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of a first conductivity type, the base region being provided in the first base region and a surrounding portion thereof. a second base region, and the first
A photoelectric conversion device comprising: an imaging section including a semiconductor device in which the forbidden band width of the second base region is wider than the forbidden band width of the base region; and a vertical scanning section, a horizontal scanning section, and a readout section related to the imaging section. Device. (17) At least a collector region having a first conductivity type, a base region laminated on the collector region and having a second conductivity type, and an emitter region formed on the base region and having the first conductivity type. In the semiconductor device, at least a portion of the base region below the emitter region has a smaller band gap than the emitter region and the collector region, and the base region has a potential barrier in the horizontal direction. A photoelectric conversion device having a vertical scanning section, a horizontal scanning section, and a reading section related to the imaging section.