JP3001600B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device having an integrated circuit or the like formed on a substrate, and more particularly to a semiconductor device having a lateral bipolar transistor constituting the integrated circuit. It concerns the device.

[Prior Art] Conventionally, a lateral bipolar transistor (hereinafter referred to as a horizontal bipolar transistor) in which a current flows in a lateral direction, that is, along a substrate surface.
BPT) is known, but the horizontal BPT is a vertical type in which the current flows in the vertical direction, that is, the depth direction of the substrate.
Easily coexists with BPT (for example, the conduction type array of horizontal BPT
In the case of pnp, it is widely used because it has the advantage that it can be mounted on the vertical BPT as npn which is an inverted conduction type arrangement).

[Problems to be Solved by the Invention] However, the conventional horizontal BPT has a drawback that the current amplification factor (h _FE ) cannot be increased for the following reasons.

That is, in the horizontal BPT, since the emitter region and the collector region are symmetrical, the emitter-collector breakdown voltage is low, the base width is easily affected by the collector voltage, and the so-called Early effect (depletion layer spreading effect) occurs. Because the current injected from the emitter to the base spreads widely inside, the recombination current in the base region becomes dominant, the base current increases, and the current amplification factor (h _FE ) increases. There is a problem that the decrease becomes remarkable.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems of the related art, and has as its object to provide a semiconductor device capable of easily increasing the current amplification factor of a lateral BPT.

[Means for Solving the Problems] A semiconductor device according to the present invention is a semiconductor device in which a first conductivity type emitter region and a collector region and a second conductivity type base region are formed in a semiconductor substrate in a horizontal structure. The base region has a narrow bandgap region on the front surface side and a wide bandgap region adjacent thereto that has a barrier in the depth direction of the semiconductor substrate with respect to a small number of carriers in the base region. .

[Operation] In the configuration of claim 1, by forming a heterojunction in the base region, a potential barrier for minority carriers in the base region is formed in the depth direction of the emitter region, and carriers injected from the emitter are removed. The current amplification factor (h _FE ) of the horizontal BPT is increased by preventing diffusion into the inside of the substrate.

In the configuration of claim 2, the barrier functions sufficiently even at the room temperature.

According to the configuration of the third aspect, a barrier that can prevent the emitter current from diffusing in the depth direction of the substrate can be easily formed.

According to the configuration of the fourth aspect, the recombination current of holes can be drastically reduced.

According to the configuration of the fifth aspect, the contact resistance of each region is uniformly reduced.

Embodiment FIG. 1 shows a first embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a P-type Si substrate, and the Si substrate 1 is a P-type Si substrate doped with a P-type impurity such as boron (B).

Reference numeral 2 denotes a buried region, and the buried region 2 has, for example, an impurity concentration of 10 ¹⁶ to 10 ²⁰ [cm ⁻³ ].

3 is an n-type region as part of the base region B _R, the n-type region 3 having a low impurity concentration formed by epitaxial technique or the like (for ^{example, 10 14 ~5 × 10 7 [} cm -3] Degree).

4 is an n-type region serving as an important component in the present invention, the n-type region 4 is formed by a narrow mixed crystal Si _1-X Ge _X of band gap, constituting the base region B _R.

5,5 'are P ⁺ regions, the both P ⁺ regions 5 and 5' are formed in the n-type region 4, constituting the respective emitter region E _R and a collector area C _R.

6 is an n ⁺ region, said n ⁺ region 6 to reduce the base resistance of the horizontal BPT, is intended for connecting the base electrode 201 is the buried region 2 and the metal electrode.

Reference numerals 7 and 8 denote an n region serving as a channel stop, p
Area.

Reference numeral 30 denotes an oxide film, 100 denotes an element isolation region, and 110 denotes an insulating region for separating electrodes.

Reference numerals 201 and 202 denote a base electrode and a collector electrode which are metal electrodes, respectively.

As shown in FIG. 2 (b), the potential along the line BB 'in FIG. 1 shows the same potential as the normal BPT, and the collector current I
_C is a concentration N _B of the base region B _R, so determined by the base width W _B can be easily calculated. However, the horizontal BPT
Emitter region and the collector region whereas very few parts are relative, since very often the portion extending along the surface of the substrate, injected from the emitter region E _R along the depth direction of the substrate to the base region B _R The current contributed by the generated holes and the diffusion current contributed by the electrons flowing from the base region to the emitter region become dominant, and the current amplification factor _hFE is restricted from increasing.

Therefore, in the present invention, in order to prevent the diffusion of holes into the substrate depth direction to be injected from the emitter region, thereby forming a hetero interface between the n-type region 3 and the region 4 to a depth of X _B .

 Next, each component of the horizontal BPT will be described.

(A) Collector current I _{C The} collector current I _C is approximately determined by the following equation (1) between the opposing emitter and collector.

Incidentally, the emitter depth X _E, when the emitter length is L, the area of the emitter region which faces the collector region in the horizontal BPT can be expressed approximately by X _E · L.

Here, q is the elementary charge [C], and D _P is the hole diffusion coefficient [cm].
² / s], L _P is the hole diffusion length [cm] n _i is the intrinsic carrier density [cm ^-3], V _BE is emitter-base voltage applied, W _B is base width [cm], N _B is Base impurity concentration [cm ⁻³ ], _XE is the emitter depth, L is the emitter length, R is the Boltzmann constant [J / K], and T is the absolute temperature [K].

(B) the base current I _B the base current I _B is less predominantly below (2) as ~
It consists of the three components shown in equation (4).

(A). Recombination in the base region B _R by the positive holes flowing laterally from the emitter region E _R current I _B1 (B). Recombination current of holes flowing vertically from the emitter area E _R I _B2 However, X _B is along the depth direction from the emitter region E _R region,
W _E is the emitter width.

(C). Diffusion from the base region B _R of electrons to emitter region E _R current I _B3 However, N _E is impurity concentration in the emitter region E _R, L _n is the electron diffusion length, the D _n is the diffusion coefficient of the electrons.

In the present invention, one of the above equations that should be particularly noted is the base current component _IB2 in the equation (3).

In the conventional horizontal type BPT, most of holes injected from the emitter region E _R whereas the base current by recombination flows vertically, in the present invention, the distance from the emitter region E _R X _B
To form a potential barrier △ phi _B in, so that injected carriers are blocked by this barrier.

Then, the probability of exceeding the barrier △ phi _B is, exp - a (△ φ _B / RT).

The probability is △ φ _B = 0.1 [eV] at room temperature, which is about 1/54 as compared with the conventional horizontal BPT.

In the above equation (3), if X _B << L _P holds, then tanh (X _B / L _P ) ≒ X _B / L _P , so that the horizontal BPT of the present invention has I _B2 compared to the conventional horizontal BPT. Is significantly reduced.

Next, we describe the diffusion distance L _P of positive holes in the n-type region.

Incidentally, for the hole mobility mu _P, over a wide range of the n-type impurity concentration N _D, the following equation is established.

Thus, as can be understood from this equation (5), the impurity concentration N _D becomes smaller, the mobility mu _P is ^{500 [cm 2 / V · sec} ]
Approaching a certain value. Also, the impurity concentration
When the density is 10 ⁷ [cm ⁻³ ] or more, the mobility μ _P becomes the impurity concentration N _D
Is a function of

On the other hand, the lifetime τ _{P of the} minority carrier depends on the impurity concentration of 10 ¹⁷
In the case of [cm ^-3 ] or more, it is expressed by the following equation.

When the impurity concentration becomes 10 ¹⁷ [cm ⁻³ ] or more, the mobility μ _P
Is a function of N _D.

On the other hand, the lifetime τ _{P of the} minority carrier depends on the impurity concentration of 10 ¹⁷
Above [cm ^-3 ], it is expressed by the following equation.

From the mobility μ _P and lifetime τ _P , the hole diffusion distance L
_P is generally represented by the following equation.

FIG. 3 shows the mobility μ _P (curve F ₃ ), lifetime τ _P (curve F ₁ ), and hole mobility of minority carriers in the case of n-type Si.
The diffusion distance L _P (curve F ₂ ) is calculated by the above (5), (6) and (7), respectively.
In which N _D as calculated values obtained based on the expression shown for a range of ^{10 17 ~10 19 [cm -3]} .

As is apparent from FIG. 3, the hole diffusion distance L _P is extremely long, and reaches L _P = 120 [μm] when N _D = 10 ¹⁷ [cm ⁻³ ]. Even impurity concentration N _D is ^{10 18 [cm -3], L} P
≒ 30 [μm].

Normally, 6P formed on the same substrate as npn type vertical BPT
In the case of the nP type horizontal BPT, the impurity concentration of the base region becomes small because it is the same as the impurity concentration of the collector region of the npn type vertical BPT. For example, 10 ^{14 to} 5 × 10
^{It is} about ¹⁷ [cm ^-3 ]. Therefore, although the relationship X _B "L _P can be easily established, preferably it is about X _B ≦ L _P / 10.

Since the recombination current I _B2 is drastically reduced in such conditions, the base current I _B becomes I _B1, I _B3 is dominant, it is possible to make the current amplification factor h _FE that of vertical BPT. In addition,
In the case of a mixed crystal of Si _1-X Ge _X , the mobility of carriers is reduced due to the alloy effect, but the region having a high impurity concentration (for example, 10
^{In the case of 18} [cm ^-3 ] or more), the effect of the impurity effect increases, and the mixed crystal and the Si single crystal are almost the same.

When the recombination current I _B2 decreases, the base current component becomes I
Since there is a relationship of _B3 >> I _B1 , in order to increase the current amplification factor h _FE of the horizontal BPT, if W _E << L _P holds, May be increased. What can be easily set as a design problem in the equation (8) is to increase X _E / W _E and increase N _E / N _B. Incidentally, to the N _E / N _B to the large, it is specific to the horizontal BPT is similar to the conventional BPT for the X _E / W _E to atmospheric.

Next, the manufacturing process of the first embodiment shown in FIG. 1 will be described.

Group V elements As and S are deposited on a P-type conduction type Si substrate 1.
b, P etc. are ion-implanted (impurity diffusion or the like may be performed) to obtain n ⁺ having an impurity concentration of, for example, 10 ¹⁵ to 10 ¹⁹ [cm ⁻³ ].
The buried region 2 is formed.

The impurity concentration is 10
An n-type region 3 of ¹⁴ to 10 ¹⁷ [cm ⁻³ ] is formed.

Forming an n ⁺ region 6 for reducing the base resistance (and the impurity concentration of, for example, ^{10 17 ~10 20 [cm -3]} ).

An insulating film 100 for element isolation is formed by a selective oxidation method, a CVD method, or the like, and a channel / stop region 7 is formed below the insulating film 100.

Ge is selectively applied to the Si substrate 1, for example, at a concentration of 1 × 10 ¹⁶ to 1
Ion implantation is performed at × 10 ¹⁷ [cm ⁻² ] and heat treatment is performed to form an n-type region 4 of Si _1-X Ge _X.

P ⁺ regions 5 and 5 ′ serving as emitter and collector regions are
After ion implantation of B ⁺ of × 10 ¹⁵ [cm ⁻² ], heat treatment is performed.

After an insulating film 110 is deposited and annealed, an opening for a contact is made.

Al-Si (1%) to be the electrodes 200, 201, and 202 is sputtered, and thereafter, patterning of Al-Si is performed.

The alloy of the Al-Si electrode is, for example,
After 0 minutes, a passivation film is formed.

FIG. 4 shows the change of the band gap of the mixed crystal of Si _1-X Ge _X.

In FIG. 4, the horizontal axis indicates the Ge mixed crystal ratio (mixing amount X × 100%), and the vertical axis indicates the band gap reduction amount −ΔE compared to the Si single crystal. In the figure, a curve H _O shows a state without distortion, and a curve H _U shows a distortion state, respectively, which are taken in a semiconductor device in a distortion state.

According to the figure, the band gap reduction amount − △ E ₁ ≒ 0.1 [e
V] corresponds to the case where the mixing amount X is about 0.12, and at this time, a barrier 0.1 [eV] is formed.

Ge has a concentration of 1 × 10 ¹⁶ [cm ⁻² ] and an acceleration voltage of 150 [k]
eV], the peak concentration is about 1
× 10 ²⁰ [cm ^-3 ]. Therefore, the mixing amount of Ge is a single crystal
Since the density of Si is 5 × 10 ²² [cm ⁻³ ], it is about 2%.
X = 0.12 can be achieved, for example, when the concentration of Ge is about 6 × 10 ¹⁶ [cm ⁻³ ].

[Other Embodiments] FIG. 5 shows a second embodiment.

In this embodiment, the n-type region 4 made of a mixed crystal of Si _1-X Ge _X is used.
However, it is limited to a smaller range as compared with the first embodiment. That is, the depth of the n-type region 4 is substantially the same as the depth of the P ⁺ regions 5 and 5 ′ serving as the emitter region and the collector region.

In the present invention, the pn junction between the n-type region 4 and the P ⁺ region 5 is
Since the band gap of the semiconductor is smaller than that of the pn junction between the P ⁺ region 5 and the n-type region 3, a phenomenon that the pn injection efficiency changes is used.

In the second embodiment, the collector current I _C needs to be multiplied by the coefficient of exp (△ E / RT) in the above equation (1), and the recombination current I _{B1 in the} above equation (2) must be multiplied. Is different from the first embodiment in that it is necessary to multiply exp (expE / RT) as in the above. The current amplification factor _hFE is increased based on such a feature point.

In this embodiment, it is essentially important to confine the collector current near the surface. Area 4 from this point
May be shallower than the regions 5, 5 '.

The other configuration and operation are the same as those of the first embodiment, and thus the description is omitted.

 FIG. 6 shows a third embodiment.

In this embodiment, the n-type region layer 4 made of a mixed crystal of Si _1-X Ge _X is used.
Are formed not by ion implantation but by epitaxial growth, and P ⁺ regions 5 and 5 'serving as emitter and collector portions are formed therein. In this case, the contact portion of the base region is also formed of a mixed crystal of Si—Ge, but this is not an essential problem. Further, even if the region 4 is formed shallower than the regions 5 and 5 ', it is sufficient that the collector current is confined in the region 4 according to the band gap difference.

Also in the first and second embodiments, the base take-out portion
It is the same that it may be formed of a mixed crystal of Si-Ge. Thereby, the contact resistance of each region is uniformly reduced.

In each of the embodiments described above, the case where the present invention is applied to the pnp type horizontal BPT has been described.
Needless to say, it may be applied to

[Effects of the Invention] According to the present invention, a horizontal BPT can be easily formed with a simple configuration.
Can be increased.

In addition, since the conventional integrated circuit mass production technology can be used,
Can be provided at low cost. Further, since other MOS transistors and the like can be integrated at the same time, the range of application as a semiconductor device is wide.

According to the configuration of claim 2, the barrier functions sufficiently at the room temperature.

According to the configuration of the third aspect, the recombination current of holes can be drastically reduced, and the current amplification factor can be further increased.

According to the configuration of the fourth aspect, the contact resistance of each region can be reduced uniformly.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a first embodiment of the present invention, FIG. 2 (a) is a schematic view showing a potential in a cross section taken along line AA 'of FIG. 1, and FIG. 2 (b). Is a schematic diagram showing a potential in a cross section along the line BB 'in FIG. 1, FIG. 3 is a graph showing changes in hole mobility, lifetime, and diffusion distance with respect to n-type impurity concentration, and FIG. FIG. 5 is a graph showing a change in band gap with respect to a mixed crystal ratio of Si _1-X -Ge _X. FIG. 5 is a sectional view showing a second embodiment, and FIG. 6 is a sectional view showing a third embodiment. 4... N-type region (semiconductor layer), 5... P ⁺ -type region (emitter region), E _R ... Emitter region, _BR ... Base region, _CR
... Collector region, Δφ _B ... Barrier potential.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/68-29/737

Claims (5)

(57) [Claims] 1. A semiconductor device having a lateral structure of a first conductivity type emitter region and a collector region and a second conductivity type base region in a semiconductor substrate, wherein the base region has a forbidden band width on a surface side. A semiconductor device having a narrow region and a region having a wider forbidden band than the narrow region and a small carrier in the base region in a depth direction of the semiconductor substrate. 2. The semiconductor device according to claim 1, wherein the magnitude of the potential of the barrier is equal to or higher than the heat energy at the temperature. 3. The semiconductor device according to claim 1, wherein the emitter region and the collector region are provided in a narrow band gap region forming a barrier of the base region, and a distance from an interface forming the barrier to an interface of the emitter region is at least. 3. The semiconductor device according to claim 1, wherein the diffusion length is set to be shorter than a diffusion length of the minority carrier injected from the emitter region. 4. The semiconductor device according to claim 1, wherein the emitter region and the collector region include a narrow band gap region forming a barrier of the base region and a part of a wider band gap region. Or the semiconductor device according to 2. 5. The semiconductor device according to claim 1, wherein a depth of said emitter region is set to be shorter than at least a diffusion length of minority carriers flowing from said base region.