JP2664747B2 - Semiconductor device and photoelectric conversion device using the same - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor device and a photoelectric conversion device using the same.

[Prior Art] Conventionally, as a semiconductor device, for example, a bipolar transistor (hereinafter, referred to as BPT) is known. In addition, BPT that can achieve shallower junctions and higher integration
A BPT in which the emitter is made of polysilicon, that is, DOPOSBPT (Doped Poly Silicon BPT) is known.

FIG. 14 is a sectional view showing an example of a conventional BPT. In the figure, reference numeral 1 denotes a substrate, 2 denotes an n ⁺ buried region, 3 denotes an n ⁻ region having a low impurity concentration serving as a collector region, 4 denotes a p region serving as a base region, and 5 denotes an n ⁺ region serving as an emitter region. 6 is an n ⁻ region serving as a channel stopper, 7 is an n ⁺ region for lowering the collector resistance, 101, 102, 103 and 104 are insulating films for separating elements, electrodes and wirings, 200 is a metal,
This is an electrode formed of silicide, polycide, or the like.

Here, the substrate 1 is made of phosphorus (P), antimony (Sb),
It is made n-type by doping impurities such as arsenic (As) or p-type by doping impurities such as boron (B), aluminum (Al), and gallium (Ga). The buried region 2 does not always need to be provided. The emitter region 5 is formed of polysilicon by low pressure chemical vapor deposition (LPCVD) or the like. The base region 4 includes boron (B), gallium (Ga), aluminum (A
l) etc. are doped.

[Problems to be Solved by the Invention] In the conventional BPT and DOPOSBPT described above, the impurity concentration of the emitter region 5 is 10 ¹⁹ to 10 ²¹ cm ⁻³ , the impurity concentration of the base region is 10 ¹⁶ to 10 ¹⁸ cm ⁻³ , and the collector is The impurity concentration of the region is
It was about 10 ¹⁴ -10 ¹⁶ cm ^-3 .

However, in such a BPT, since the impurity concentration of the emitter region is 10 ¹⁹ cm ⁻³ or more, narrowing of the band gap occurs, which lowers the efficiency of carrier injection from the emitter to the base (that is, current The amplification factor _hFE decreases).

In the BPT subjected to shallow reduction, in order to increase the the h _FE, it is necessary to increase the impurity concentration of the base. However, in this case, there is a new problem that the breakdown voltage between the base and the emitter is reduced and the capacitance between the base and the emitter is increased.

The present invention has been made to solve the above-described problems of the prior art, and the present invention has a high current amplification factor h _FE ,
It is another object of the present invention to provide a semiconductor device in which the withstand voltage between the base and the emitter does not decrease and which has a small capacitance and a photoelectric conversion device using the same.

[Means for Solving the Problems] A first gist of the present invention is to provide a first conductivity type emitter region,
In a semiconductor device having at least a second conductivity type base region and a first conductivity type collector region, at least B and Ge are added to the base region; and an impurity concentration in the vicinity of a junction surface of the emitter region with the base region. was a N _D, in the base region, the concentration of B and N _B, when the concentration of Ge was N _Ge, N _D
≦ 10 ¹⁹ cm ^-3, and is N _Ge> N _B; exists in a semiconductor device, characterized in that.

A second aspect of the present invention resides in a semiconductor device according to the first aspect of the present invention, wherein the addition of B and Ge to the base region is performed by ion implantation.

The third aspect of the present invention, in the first aspect or the second aspect of the present invention, N _D is present in a semiconductor device which is a 10 ¹⁷ ~10 ¹⁹ cm ^-3.

According to a fourth aspect of the present invention, in the first to third aspects of the present invention, a Si layer having an impurity concentration of 10 ¹⁹ to 10 ²¹ cm ^-3 is provided between the emitter region and the electrode. In a semiconductor device.

The fifth aspect of the present invention, in a first aspect to fourth aspect of the present invention resides in a semiconductor device which is a N _D <N _B.

A sixth aspect of the present invention resides in a photoelectric conversion device using the semiconductor device according to the first to fifth aspects of the present invention.

[Operation] According to the present invention, the withstand voltage between the base and the emitter is high,
Low base-emitter capacitance and h
A semiconductor device with a large _FE and a photoelectric conversion device using the semiconductor device can be provided.

Hereinafter, the operation of the present invention will be described in detail together with the constituent elements.

In the present invention, the band gap narrowing is prevented from occurring and the decrease in current amplification factor is prevented by suppressing the impurity concentration in the vicinity of the junction surface between the emitter region and the base region to 10 ¹⁹ cm ⁻³ or less.

It should be noted that the suppression to 10 ¹⁹ cm ^-3 is at least in the vicinity of the junction surface between the emitter region and the base region.

The reason for setting the impurity concentration of the emitter region to 10 ¹⁹ cm ⁻³ will be described below.

When the impurity concentration of the base region is increased, the breakdown voltage at the junction between the base region and the emitter region decreases.

When used in a normal IC, the breakdown voltage must be at least 2V. However, from the viewpoint of safety, it is preferable to set the voltage to 3V. Therefore, the case of setting the voltage to 3V will be described.

The breakdown voltage of the pn junction is usually determined by avalanche amplification when the impurity concentration of the emitter region is 10 ¹⁷ cm ^-3 or less, but when the impurity concentration of the emitter region is greater than 10 ¹⁷ cm ^-3 , the influence of the tunnel current is reduced. Come. Emitter region impurity concentration is 10 ¹⁸ cm
^If it is ^-3 or more, it is determined only by the tunnel current. In a region where the breakdown voltage is about 3 V, it is mainly determined by the tunnel current.
It is approximately expressed by the following equation.

Where ε: electric field (V / m), E _g : band gap, V: applied voltage, m *: effective mass, q: electric charge, It is.

When the case of silicon is applied to equation (1), the following equation is obtained.

J _t = (1.649 × 10 ⁴ εV) exp [−3.052 × 10 ⁹ / ε (2) In equation (2), if V = 3V and ε = 1 MV / cm, J _t
= 2.75 × 10 ^-5 A / cm ² , ε = 1.5MV / cm, J _C = 1.02A
_JC = 2.33 × 10 ² A / cm ² when / cm and ε = 2 MV / cm. It is safe to determine the concentration of the emitter with respect to the impurity concentration in the base region by applying an electric field ε = 1 MV / cm by applying 3 V between the emitter and the base. That is, in an actual semiconductor device or the like, when the emitter size becomes small (for example, 3 × 3 μm ² ) and the depth of the emitter junction becomes shallow (for example, around 0.5 μm or less), the current around the emitter is affected. , (1),
This is because the current becomes larger than the current according to the equation (2).

maximum electric field (stepped junction approximation) epsilon _m and depletion layer width W of the p-n junction can be represented by the following equation.

_{ε m = ((((2q} (V bi + V)) / ε S) · (N B · N D / (N B + N D))) 1/2 ...... (3) W = ((2∈ S / _{q) · ((N B +} N D) / (N B · N D)) · (V bi + V))) 1/2 ...... (4) V bi: diffusion voltage, epsilon: permittivity, N _B: base impurity concentration in the region, N _D: impurity concentration of the emitter region, V: applied voltage FIG. 11, the impurity concentration of the base region on the vertical axis, the horizontal axis represents the impurity concentration of the emitter region, at ε _{m =} 1MV / cm , And the applied voltage V = 1, 2, 3, 4, 5V.

Since it is desired to set the withstand voltage at V = 3V, ε _m = 1MV / cm, it is sufficient to consider the 3V line in the figure. For example, when the impurity concentration (N _B ) of the base region is 10 ¹⁸ cm ⁻³ , the impurity concentration (N _D ) of the emitter region is preferably 4.5 × 10 ¹⁸ cm ⁻³ or less.

N _B = 5 × 10 ¹⁸ cm ⁻³ , N _D <1 × 10 ¹⁸ cm ⁻³ , and N _B = 1
If it is × 10 ¹⁹ cm ^-3 , N _D <9 × 10 ¹⁷ cm ^-3 is good.

If N _B is 1 × 10 ¹⁸ cm ⁻³ or more, N _D is 4.5 × 10 ¹⁸ cm ^−3.
The following will be good. This is the upper limit.

Applied voltage 2.5V, When epsilon = 1 MV / cm, in order to satisfy this condition, the FIG. 11, it is found that the degree ^{_{N D <1 × 10 19 cm}} -3 or less.

Was N _D 10 ¹⁹ or less in the present invention from the above viewpoint.

On the other hand, the lower limit of the impurity concentration in the emitter region is 10 ¹⁷
cm ^-3 is preferred.

A preferred lower limit of the impurity concentration of the emitter region will be described.

Collector current J _C is expressed by the following equation ^{_{(6), J B2 = (qn i 2}} D n / N B L n) cosech (W B / L n) × [exp (V BE / kT) -1 ] (6) Assuming that W _B ≪L _n , V _BE ≫kT, equation (6) gives J _C = (qn _i ² D _n ) / (N _B W _B ) ・ exp (V _BE / kT) (7) Normally, this equation is satisfied in the range where N _D ≫ (n _i ² / N _B ) · exp (V _BE / kT) in the minority carrier approximation is satisfied, and the region where this is broken is the current of this transistor. Drive limit.

Thus, an impurity concentration concentration N _D of the emitter region (n _i ² /
J _C = q · (D _n / W _B ) · N _D obtained by substituting (N _B ) · exp (V _BE / kT) is the current defined by the impurity concentration in the emitter region of this transistor. Drive limit.

Usually, 10 ⁴ to 10 ⁵ A / cm ² is required as a transistor as _JC . Use _{D n = (kT / q)} μ n, the mu _n using conventional data, as W _B = 0.05,0.1,0.2μm, when calculating the lower limit of the N _D, so that the FIG. 13.

Therefore, from the viewpoint of setting J _C to 10 ⁴ to 10 ⁵ A / cm ² , N _D
Is preferably 10 ¹⁷ or more.

When the emitter region is formed, an automatic contact layer of 10 ¹⁹ to 10 ²¹ cm ^-3 may be desirably provided on the surface to reduce the automatic resistance.

The base is made of Si-Ge-B system by mixing B and Ge at the same time, and has the effect of mixed crystal and the effect of band gap narrowing at the same time, reducing the band gap of the base and increasing the injection efficiency of the emitter. . As a result, _hFE is increased. However, since the emitter impurity concentration is determined as described above, it is possible to prevent the occurrence of adverse effects such as a decrease in the base-emitter breakdown voltage and an increase in the base-emitter capacitance. it can.

 Hereinafter, the present invention will be described in more detail.

FIGS. 7A and 7B are views showing a band structure in a semiconductor. In the figure, the vertical axis indicates energy, and the horizontal axis indicates state density n (E) (number of carriers that can enter / unit volume).

FIG. 7A shows a band structure in an n-type low impurity density semiconductor, in which an n-type donor level is separated from a conduction band. However, in a semiconductor containing a high impurity concentration, the range of the donor order is widened, and a donor band is formed.
It is energetically connected to the original conduction band of the semiconductor. That is, a degenerate conduction band as shown in FIG. 7B is formed. As a result, band edge tailing occurs,
The band gap changes from E _g to E _g ′, and band narrowing of ΔE _g = E _g −E _g ′ occurs.

In FIG. 7, the case of an n-type semiconductor has been described.
-Type semiconductor occurs similar band tailing in towards the valence band in the high density doping of bandwidth (band gap) E _g narrowing occurs in. The value of the band narrowing can be approximately expressed by the following equation.

ΔE _g = (3q ² / 16πε _s ) × (q ² N / ε _s kT) ^1/2 (10) where q is electric charge, ε _s is a semiconductor permittivity, k is Boltzmann's constant, and T is absolute. The temperature, N, is the impurity density.

When the semiconductor is Si and at room temperature, ΔE _g = 22.5 (N / 10 ¹⁸ ) ^1/2 meV (11). Therefore, if N = 10 ¹⁸ cm ⁻³ , ΔE _g = 2
It becomes 2.5meV. Moreover, essential carrier density n _i when the bandgap narrowing occurred ^'2, when the carrier density in the absence of narrowing was ^{_{n i 2, n i' 2}} = n 1 2 exp (ΔE _g / kT) …… (12)

The analytical theoretical formula for base current and collector current in BPT is as follows (however,
Previous W _E is assumed to be contact with a metal).

The base current is primarily diffusion current J in the positive holes from the base to the emitter ^{_{B1 = (qn i 2 D p}} / N E L P) coth (W E / L P) × (exp (V BE / kT) - 1] ... (13) and recombination current J _B2 = the injected electrons from the emitter ^{_{(qn i 2 D n / n}} B L n) ((cosh (W B / L n) -1) / (sinh ( W _B / L _n ))) [exp (V _BE / kT) −1]... (14)

The collector ^{_{current, J C = (qn i 2}} D n / N B L n) cosech (W B / L n) × [exp (V BE / kT) -1] becomes ...... (6). Note that, q is the charge, n _i is the intrinsic semiconductor density, N _E is impurity density of the emitter, N _B is the impurity density of the base, D _P is the hole diffusion coefficient, D _n is the electron diffusion coefficient, L _p is hole diffusion length ((D _p τ _p) is approximated by ^1/2), L _n is approximated by the electron diffusion length ^{_{(D p τ p) 1/2)}} , k is the Boltzmann constant, T is the absolute temperature, V _bE is the base-emitter forward bias voltage, tau _p is the life of the holes the minority carriers, tau _n lifetime of the electron minority carriers, W _E is emitter thickness, W _B is the base thickness.

In addition, the carrier density of the emitter is represented by _{^{n iE 2 = n i 2 exp}} [ΔE ge / kT], the carrier density of the base is represented by _{^{n iB 2 = n i 2 exp}} [ΔE gb / kT].

N _i ² is at n _iE ² in consideration of the above points (13), (1
4) n _i ² is at n _iB ² in formula, n _i ² are replaced by n _iB ² in (6).

Usually, since W _B ≪L _n and J _B1 ≫J _B2 , h
_FE is roughly expressed as h _FE ≒ J _C / J _B1 ≒ (L _p D _n n _{i B} ² / W _B D _p N _B n _iE ² ) tanh (W _E / W _B ) = (L _p D _n N _E / W _B D _p N _B) is a _{tanh (W E / L p)} × exp [(ΔE gb -ΔE ge) / kT] ...... (15), also expressed by considering only narrowing of the bandgap And h _FE ≒ h _FEO exp [(ΔE _gb −ΔE _ge ) / kT] (16) Here, h _FEO is the current amplification factor when there is no narrowing of the band gap. Conventional BPT impurity concentration N _E of the emitter is about 10 ²⁰ ~10 ²¹ cm ^-3, The base of the impurity concentration N _B was about 10 ¹⁶ ~10 ¹⁸ cm ^-3. Therefore, ΔE _ge was large and ΔE _gb was almost zero. For this reason, _hFE was smaller than the essential value.

FIG. 8 is a graph showing a result of calculating the narrowing width of the band gap using the formula (2) when boron is highly doped in Si. In FIG. 8, the horizontal axis indicates the impurity density (cm ⁻³ ), and the vertical axis indicates the narrowed width ΔE _g (meV) of the band gap. For example, if the impurity concentration of the emitter is 10 ¹⁸ cm ⁻³ and the impurity concentration of the base is 10 ¹⁹ cm ⁻³ , ΔE _g = ΔE _ab −ΔE _ge ≒ 50
meV, and h _FE ≒ 7.4h _FEO .

In the present invention, it has been described that the high concentration of the base has a great advantage. However, the p-type impurity has a higher solubility in silicon than the n-type impurities phosphorus (P) and arsenic (As). Low.

FIG. 9 shows data on the solubility of impurities in silicon in the solid phase. The horizontal axis shows the temperature (T ° C.), and the vertical axis shows the solubility in the solid phase. B-type impurities include B, Ga, Al, etc., but B can be dissolved to the highest concentration. Here, when doped above the solid solubility, it precipitates in Si during the semiconductor device manufacturing process. , Defects, and adversely affect the characteristics of BPT. However, this depends on the temperature of the process.

Since B can be doped most stably to a high concentration among the respective impurities, B is optimal as a p-type impurity.

However, if impurities are doped at a high concentration,
The tetrahedral atomic radius of the impurity in Si becomes a problem. That is, since Si is a diamond-type crystal, it forms a tetrahedral bond, and the atomic radius r at this time becomes a problem. When representing the difference between the atomic radius _{100 × (r-r Si)} / r Si, the case of B, and approximately -25. Since the atomic radius of B is smaller than that of Si, if the concentration exceeds 10 ¹⁸ cm ^-3 , stress occurs at the interface between the emitter and the collector containing no B impurity. When this stress becomes significant, it develops into dislocation. As a result, electrical leakage occurs between the base and the emitter or between the base and the collector, and the breakdown voltage is reduced. In addition, current amplifications also deteriorate.

In the present invention, Ge is doped into the base region simultaneously with B.

Ge of _{100 × (r Ge -r Si)} / r Si is approximately +4. That is, it is 4% larger than Si. Ideally, for B
When the Ge doping amount is 25/4 = 8.25 times, lattice distortion can be completely corrected.

However, in the present invention, since the base p region is also made to have a distribution of the impurity concentration by, for example, ion implantation, the structure does not easily generate the lattice distortion, and it is not necessary to limit Ge to such a concentration. This makes it difficult to generate defects and dislocations by adopting a configuration in which the amount of B added to the base is continuously changed. As a result, the defect generation limit is such that the peak concentration is higher than the B concentration of 10 ¹⁸ cm ⁻³ .

The main purpose of doping Ge is to make the band gap smaller than that of Si by doping Ge with Si. The concentration that affects the band gap is not necessarily sufficient to be 8.25 times the above B, and the effect appears at a concentration of 10 ²⁰ cm ⁻³ or more.

Ge has a smaller band gap than Si. While the band gap of Si is E _gSi ≒ 1.1 eV, the band gap of Ge is E _gGe ≒ 0.7 eV. Further, when the crystal composition is set to Si _1-x G _x , it is approximately expressed by the following equation.

E _g ′ = E _gSi −X (E _gSi −E _gGe ) (17) Therefore, if X = 0.1, ΔE _g (= E _g ′)
−E _gSi ) is about ₄₀ meV. The Ge concentration at this time is approximately 5 × 1
0 ²¹ cm ^-3, which is 10 times or more of B.

FIG. 10 is a graph showing the effect of Ge on the band gap. In FIG. 10, the horizontal axis represents the composition ratio X, and the vertical axis represents the band gap E _g , the conduction band side ΔE _C and the valence band side ΔE _v
Shows the change in As is clear from the figure, B and Ge
And co-doping can reduce the bandgap of the base and thus increase the current amplification of the BPT.

The p-type impurities to be doped into the base include A
l, Ga, etc. can be used, but both are 100 × (r−
Since _rSi ) / _rSi is approximately +8, lattice distortion cannot be corrected unless the atomic radius is small. For example, carbon (C) has a small atomic radius,
Since _1-x C _x is the direction in which the band gap is large, and with opposite properties bandgap narrowing, not preferable combination. That is, B and Ge
Can be said to be the best as a p-type base.

In addition, when the base is made of a Si-Ge-B mixed crystal, the injection of holes into the base can be suppressed, and there is an effect that it does not become a barrier to the injection of electrons from the emitter into the base.

Example As an example of the present invention, a BPT having the same configuration as that shown in FIG. 1 was manufactured by using an ion implantation method.

 1 shows a manufacturing process of a BPT of the present embodiment.

An n ⁺ buried region 2 was formed in a p-type substrate 1.

N ⁻ on the buried region 2 by an epitaxial technique or the like.
Region 3 was created.

An n ⁺ region 7 for lowering the collector resistance of the BPT was created.

An element isolation region 101 was created together with the channel stop region 6.

By ion implantation, p-type impurities such as Ge and B or Ga were formed on the n ⁻ region 3 (formation of a base region). In addition,
When the distribution of the heavily doped impurities in the n ⁻ region 3 was measured, the results shown in FIG. 2 were obtained. The details will be described later.

After opening the contact for the emitter, deposition of polycrystalline or monocrystalline silicon doped with impurities by low pressure chemical vapor deposition (LPCVD) or epitaxial
Region 5 was patterned (formation of emitter region). At this time, P was doped using an ion implantation method. When the impurity (P) concentration was measured, the distribution shown in FIG. 2 was obtained.

An insulator 103 is deposited, a contact hole is made in the insulator 103, and a wiring electrode material such as Al is deposited, followed by patterning.

An insulator 104 is deposited, and an external outlet is processed.

The above is the outline of the manufacturing process of this embodiment. The most important thing in this embodiment is the base region creation process shown in FIG. The ion implantation method is excellent in that the mixed crystal ratio can be stably set, the concentration distribution of Ge can be accurately reproduced, and mass productivity is high. In addition to this, after Ge ion implantation, Si is amorphous,
Solid phase epitaxial growth could be easily performed, and the temperature of the process could be reduced. Further, Ge has a characteristic that the diffusion constant in Si is small and that the Ge concentration distribution during ion implantation hardly changes during a heat treatment step at 1000 ° C. or less.

The distribution function in the depth direction X in the semiconductor at the time of ion implantation is approximately expressed by the following equation.

N (X) ≒ (N _O /2.5R _P ) exp (− (X−R _p ) ² / (ΔR _P ) ² ) (18) where, N _O is the amount of implantation per unit area, R _P Is the peak position, and ΔR _p is the distance from the peak to one variance (1σ). R _p and ΔR _p change with the acceleration voltage.

FIG. 2 is a graph showing the distribution of B, Ge, and P when ion implantation is performed as described above. In FIG. 2, the horizontal axis represents the depth (relative value), and the vertical axis represents the number of atoms / cm.
Indicates ^-3 .

As a result of fabricating the hetero BPT as described above, a semiconductor device having a high withstand voltage between the base and the emitter, a small capacitance between the base and the emitter, and a large _hFE could be provided.

Embodiment 2 FIG. 3 is a diagram showing another embodiment of the present invention.

The hetero BPT according to the present embodiment differs from the first embodiment in that the emitter has a buried structure, the substrate 1 is n-type, and there is no buried region.

Even in such a hetero BPT, the B shown in Example 1
The same effect as PT was obtained.

Third Embodiment FIG. 4 shows an example in which an emitter region 5 is formed on the substrate 1 side.

Even in such a hetero BPT, the B shown in Example 1
The same effect as PT was obtained.

Embodiment 4 FIG. 5 is a diagram showing a third embodiment of the present invention.

The hetero BPT according to the present embodiment differs from the first embodiment in that an n ⁺ contact 8 is provided. The reason for providing the n ⁺ contact 8 is to reduce the ohmic resistance of the emitter 5. The n ⁺ contact 8 has an impurity concentration of 10 ²⁰ cm ⁻³ .

Even in such a hetero BPT, the B shown in Example 1
The same effect as PT was obtained.

(Embodiment 5) FIG. 6 is a circuit diagram showing a case where the BPT shown in Embodiment 1 is used for the solid-state imaging device disclosed by the present applicant in Patent Application (2) on December 21, 1987. FIG. In FIG. 6, the BPT shown in Example 1 was used for the portion indicated by Tr.

That is, in this example, the BPT shown in Example 1 was used as a photoelectric conversion element.

According to the present invention, f _T (frequency) of a semiconductor device can be improved, and therefore, it is very effective when used for a photoelectric conversion device.

F _T is determined from the read speed in the photoelectric conversion device.

The current photoelectric conversion device (area sensor) has 500 × 640 elements. In the case of HD (High Diffision; an area sensor for high-definition), the size is 1000 × 2000 elements. In the current operation of the television, the horizontal operation time is HT ≒ 50 μsec, and the horizontal blanking period HALK is 8 to 10 μsec. Considering the horizontal operation, conventionally, T _H = 50 μsec / 640 = 80 nsec, whereas in HD, T _H = 26 nsec / 2000 = 13 nsec.

The frequency is required to be at least 6 times or more. That is, since it is f _T ≒ 1~2GH _Z currently requires more f _T> 6~16GHz.

Next, when the area sensor shown in FIG. 6 is used as a color camera, an operation of reading the optical information of the same photoelectric conversion element a plurality of times is performed. At this time, since the data is read from the same element a plurality of times, the ratio of the electrical output at the time of the first read and the electrical output at the time of the second and subsequent read becomes a problem. If this value decreases, correction is required.

The ratio between the first and second read outputs is defined as the non-destructive degree.

 The degree of non-destruction is expressed by the following equation.

Non-destructive degree = (C _tot × h _FE ) / (C _tot × h _FE + C _v ) where C _tot indicates the total capacitance connected to the base of the photoelectric conversion element indicated by Tr in FIG. determined by the base-emitter capacitance _C be the base-collector capacitance C _bc and C _ox. C _v is the stray capacitance of the reading line represented by VL ₁ ··· VL _n. However, _Cox may not exist depending on the circuit system.

The degree of non-destruction can be easily improved by increasing _hFE . That is, it is possible to increase the non-destructive level by increasing the h _FE.

C _tot is the capacitance of the BPT sensor, the capacitance between the base and the emitter,
It is expressed as the capacity between base and collector. That is, C _tot
= C _be + C _bc . Normally, when C _be > C _bc and the impurity concentration in the base region is increased, C _be is the main factor that affects the non-destructive degree.

In the above equation, C _V is the stray capacitance of the vertical line, h
_FE is the current gain of the BPT. Therefore, since the design value of 2 million pixels is C _tot <10 fF, it is sufficient that C _be <10 fF. Whether C _be <10fF also depends on the concentration of the emitter. Emitter size 1.5μm square (S
C _be = ε · S / d (where d is the thickness of the depletion layer) ε = ε _S · ε _O (ε _S = 11.8 in Si), S = 2.25 × 10 ⁻⁸ cm ² , D ≧ 235 °. The impurity concentration C _BE = 10 fF of the emitter region with respect to the impurity concentration of the base region in FIG. 12, showing the upper limit of the N _D (impurity concentration of the emitter region) in the case of a 5 fF. For example, N _B = 10 ¹⁹ cm ⁻³
Then, for C _be = 10 fF, N _D = 3 × 10 ¹⁸ cm ⁻³ or less, C _be
= 5fF, 6.3 × 10 ¹⁷ cm ⁻³ or less.

Here, for an HD-compatible area sensor, C _tot = 10fF, C _V
= Because it is 2.5 pF, for example, in order to non-destructive degree of 0.90 or more, h _FE is required 2250 or more. In order to ensure a sufficient non-destructive degree, h _FE is likely to be needed more than 2000.

In contrast, conventionally, for example, in homozygous BPT, h _FE
Was about 1000, so that a sufficient non-destructive degree could not be obtained. On the other hand, in the semiconductor device of the present invention, since _hFE can be made sufficiently large, an excellent degree of non-destruction can be obtained.

More preferably, the degree of non-destruction is 0.98 or more. In that case, _hFE is required to be about 10,000. Conventional homo
In the BPT, this value could not be reached and could only be reached in the BPT of the present invention.

In this embodiment, the case of the area sensor is described, but it is apparent that the present invention can be applied to a line sensor.

[Effects of the Invention] As described above, according to the present invention, by setting the impurity concentration of the emitter to 10 ¹⁹ cm ^-3 or less, band gap narrowing can be suppressed, and the injection efficiency from the emitter can be reduced. Can be raised.

In addition, the band gap narrowing effect by increasing the boron concentration of the base and the mixed crystal effect by mixing Ge can make the band gap of the base narrower than the band gap of the emitter. _HFE can be improved. Further, since lattice strain can be reduced, defects at the interface can be reduced.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view of a BPTN showing a first embodiment. FIG. 2 is a graph showing distributions of B, Ge and P in the first embodiment. 3 to 5 are sectional views showing another embodiment. FIG. 6 is a circuit diagram of a photoelectric conversion device using the BPT shown in the first embodiment. FIGS. 7A and 7B are views showing a band structure in a semiconductor. FIG. 8 is a graph showing the narrowing width of the band gap when boron is heavily doped in Si. FIG. 9 is a graph showing data on the solubility of impurities in silicon in the solid phase. FIG. 10 is a graph showing the effect of Ge on the band gap. From Figure 11 to Figure 13 is a graph for showing the upper or lower limit of the N _D. Fig. 14 shows the conventional BP
FIG. 4 is a cross-sectional view illustrating an example of T. (Description of symbols) 1 ...... substrate, 2 ...... n ⁺ buried region, 3 ...... n ^- region 4
... A p region serving as a base region, 5... An n ⁺ region serving as an emitter region. N is 6 ...... channel stop ^- region, n ⁺ regions in order to lower the 7 ...... collector resistance, 101,10
2,103,104: Insulating film for separating elements, electrodes, and wirings, respectively, 200: Electrodes.

Claims (6)

(57) [Claims] 1. A semiconductor device having at least a first conductivity type emitter region, a second conductivity type base region and a first conductivity type collector region; at least B and Ge added to the base region; wherein the impurity concentration in the vicinity of the junction surface of the base region and N _D, when the concentration of B in the base region and N _B, and the concentration of Ge and N _Ge, N _D ≦ 10 of
¹⁹ cm ^-3, and is N _Ge> N _B; wherein a. 2. The semiconductor device according to claim 1, wherein B and Ge are added to the base region by ion implantation. 3. A N _D A semiconductor device according to claim No. 1 or claim 2, characterized in that the 10 ¹⁷ ~10 ¹⁹ cm ^-3. 4. The semiconductor device according to claim 1, wherein an Si layer having an impurity concentration of 10 ¹⁹ to 10 ²¹ cm ⁻³ is provided between the emitter region and the electrode. . 5. A N _D <semiconductor device according to claim 1 to claim 4, wherein the is N _B. 6. A photoelectric conversion device using the semiconductor device according to claim 1.