JPH0392054U - - Google Patents

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Publication number
JPH0392054U
JPH0392054U JP15085689U JP15085689U JPH0392054U JP H0392054 U JPH0392054 U JP H0392054U JP 15085689 U JP15085689 U JP 15085689U JP 15085689 U JP15085689 U JP 15085689U JP H0392054 U JPH0392054 U JP H0392054U
Authority
JP
Japan
Prior art keywords
circuit board
hybrid integrated
integrated circuit
circuit device
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15085689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15085689U priority Critical patent/JPH0392054U/ja
Publication of JPH0392054U publication Critical patent/JPH0392054U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の実施例である混成集積回路
装置を示す斜視図、第2図はその正面図、第3図
は、他の実施例である混成集積回路装置を示す正
面図、第4図は、他の実施例である混成集積回路
装置を示す正面図、第5図は、従来例である混成
集積回路装置を示す正面図である。 1……第一の回路基板、2,2′……第二の回
路基板、3,3′……第三の回路基板、4,5…
…電子部品、6,8……リード端子、6a,8a
……リード端子の先端部。
FIG. 1 is a perspective view showing a hybrid integrated circuit device according to an embodiment of the present invention, FIG. 2 is a front view thereof, and FIG. 3 is a front view showing a hybrid integrated circuit device according to another embodiment. FIG. 4 is a front view showing a hybrid integrated circuit device according to another embodiment, and FIG. 5 is a front view showing a conventional hybrid integrated circuit device. 1... First circuit board, 2, 2'... Second circuit board, 3, 3'... Third circuit board, 4, 5...
...Electronic component, 6, 8...Lead terminal, 6a, 8a
...The tip of the lead terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第一の回路基板1上に第二の回路基板2,2′
を搭載してなる混成集積回路装置において、前記
第二の回路基板2,2′の板面からほぼ垂直に導
出されたリード端子6の先端部6aが、前記第一
の回路基板1の板面に形成された端子電極7に半
田付けされていることを特徴とする混成集積回路
装置。
A second circuit board 2, 2' is placed on the first circuit board 1.
In the hybrid integrated circuit device, the tip portion 6a of the lead terminal 6 led out almost perpendicularly from the board surface of the second circuit board 2, 2' is connected to the board surface of the first circuit board 1. A hybrid integrated circuit device characterized in that the hybrid integrated circuit device is soldered to a terminal electrode 7 formed in the .
JP15085689U 1989-12-30 1989-12-30 Pending JPH0392054U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15085689U JPH0392054U (en) 1989-12-30 1989-12-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15085689U JPH0392054U (en) 1989-12-30 1989-12-30

Publications (1)

Publication Number Publication Date
JPH0392054U true JPH0392054U (en) 1991-09-19

Family

ID=31697188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15085689U Pending JPH0392054U (en) 1989-12-30 1989-12-30

Country Status (1)

Country Link
JP (1) JPH0392054U (en)

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