JPH0392001A - Microwave integrated circuit - Google Patents

Microwave integrated circuit

Info

Publication number
JPH0392001A
JPH0392001A JP1230067A JP23006789A JPH0392001A JP H0392001 A JPH0392001 A JP H0392001A JP 1230067 A JP1230067 A JP 1230067A JP 23006789 A JP23006789 A JP 23006789A JP H0392001 A JPH0392001 A JP H0392001A
Authority
JP
Japan
Prior art keywords
mic
dielectric
carrier
integrated circuit
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1230067A
Other languages
Japanese (ja)
Inventor
Hideki Toritsuka
鳥塚 英樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1230067A priority Critical patent/JPH0392001A/en
Publication of JPH0392001A publication Critical patent/JPH0392001A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Abstract

PURPOSE:To eliminate the need for the soldering process between a microwave integrated circuit(MIC) substrate and a carrier by using the MIC board reinforced with other dielectric substance in advance and connecting the periphery of MIC patterns to ground with throughholes. CONSTITUTION:One MIC board 20 is formed by pressing and connecting a metallic foil 11, a 1st dielectric material (e.g. a 'Teflon(R)' glass substrate) 12, metallic foils 13, 15 forming a ground face of the MIC, and a dielectric material (e.g. glass epoxy resin substrate) 14 to reinforce the MIC. Plural MIC patterns 22 each comprising a microstrip circuit 21 formed on the metallic foil 11 are arranged to the substrate 12 and lots of throughholes 23 are provided around each MIC pattern 22 to make the metallic foils 11, 13, 15 conductive. Thus, both sides of the dielectric material 14 are equi-potential electrically to form a carrier. Thus, the soldering between the MIC board and the carrier is not required.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上に利用分野) 本発明はマイクロ波集積回路に係り,特にその強度の改
良された構造に関する。
DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Industrial Field of Application) The present invention relates to microwave integrated circuits, and more particularly to a structure with improved strength.

(従来の技術) 従来,マイクロ波集積回路(以下、MIC略記)は,一
般にアルミナ基板やガラス基材ふっ素樹脂鋼張積層板(
以下、テフロンガラス基板と略記)等を用いた誘電体基
板上にマイクロストリップ線路が形成されている。
(Prior Art) Conventionally, microwave integrated circuits (hereinafter abbreviated as MIC) have generally been manufactured using an alumina substrate or a glass-based fluororesin steel-clad laminate (
A microstrip line is formed on a dielectric substrate using a Teflon glass substrate (hereinafter abbreviated as a Teflon glass substrate) or the like.

上記のうち,テフロンガラス基板は,それ自身が軟質で
薄板状のため、マイクロストリップ線路の接地面を形戒
する金属箔に、基板の構造を補強するための板状の金属
板(以下、キャリアと略記)を半田付け等により接着固
定して用いることが一般に行なわれている。上記キャリ
アはMICを補強するだけでな<.MICの接地面とし
て働き、MICを同軸回路等に変換するとき,誘電体基
板上に形成されたマイクロストリップ線路と同軸の内導
体の高さを一致させるための高さ調整の役目も兼ねるよ
うになっている。
Among the above, the Teflon glass substrate itself is soft and thin, so the metal foil that forms the ground plane of the microstrip line is replaced with a plate-shaped metal plate (hereinafter referred to as a carrier) to reinforce the structure of the substrate. (abbreviated as )) is generally used by adhesively fixing it by soldering or the like. The above carrier not only reinforces the MIC. It acts as a ground plane for the MIC, and when converting the MIC into a coaxial circuit, etc., it also serves as a height adjustment to match the height of the microstrip line formed on the dielectric substrate and the coaxial inner conductor. It has become.

マイクロストリップ線路が形成された誘電体基板を金属
板に固定した従来のマイクロ波集積回路を第5@に示す
。図中101は薄板状に形成されたテフロンガラス基板
で,このテフロンガラス基板101の表面にはマイクロ
ストリップ線路l02(一部のみ図示)が形成され、裏
面には上記マイクロストリップ線路102の接地面を形
成するため全面に鋼材等の金属箔103が形成されMI
CIQ4を構或している. また、105は上記MIC104を補強するための強度
を有する金属板にて形成されたキャリアで,このキャリ
ア105と上記接地面の金属fil03とは図示しない
半田付け,例えば半田クリームを用いたりフロー技術等
によって接続し、固定するようになっている. なお,106は上記MIC104およびキャリア105
の4隅部に穿設された取付孔で、対向する取付孔106
に合致させて半田付けすることにより,上記MIC10
4とキャリア105との位置決めが行なわれる.つぎに
、上記MICの製造および組立の工程について説明する
.まず, MIC104の外形寸法と同じ形状にキャリ
ア105をプレス加工等により打抜き,Sn. Ni,
 Au等の導電部材を用いてキャリアl05全面にめっ
き処理を施す。一方、両面を銅張りしたテフロンガラス
基板材(図示せず)の一方の面を,周知の写真技術でマ
イクロストリップ線路102をパターニングし,一枚の
テフロンガラス基板上に複数のMIC104を形成する
. 次に、上記テフロンガラス基板材は、第5図にて104
に示す1枚毎のMICの大きさに合わせて打抜き技術で
切り離し、上記キャリア105上に半田付け等により固
定する.この様な従来の製造方法は,各阿ICごとに切
り離した後キャリア105上に半田付け等を行うため,
作業能率が極めて悪い。また,1枚毎に切離された旧C
をそれぞれ同一外形寸法のキャリア105上に半田付け
する際広い面積で接着されるため,接着時に空気層が部
分的に発生することがあり、接地不良を生ずるなどの欠
点があった. さらに、キャリア105とMICl04との位置ずれ等
により,特に高周波における電気的な特性のばらつきが
発生しやすいという欠点を有していた.(発明が解決し
ようとする課題) 上に述べたように,従来は1枚毎に切り離されたMIC
をキャリア105上に接着固定していたため,作業能率
が悪い上,接着面に空気層が部分的に発生して接地不良
を起したり、また、キャリア105とMIC104との
位置ずれ等によって各MIC104がそれぞれ電気的特
性のばらつきを生ずる等の欠点があった. 本発明は上記欠点を解決するためになされたもので,テ
フロンガラス基板材の接地面にMIC104を補強する
ための強度を有する誘電体材を接着固定したMIC基板
材を用いてMICを形成した後、1枚毎に切り離し得る
ようにしたMICを提供することを目的とする. 〔発明の構成〕 (課題を解決するための手段) 本発明のマイクロ波集積回路は、マイクロ波集積回路の
要部が形成された板状の第1誘電体と、前記第1誘電体
の第1主面に接しマイクロ波集積回路のパターンが形成
された第1金属箔と,前記第1誘電体の第2主面に第1
主面で接しマイクロ波集積回路の接地面をなす第2金属
箔と,前記第2金属箔の第2主面に第1主面で接し前記
第1誘電体を機械的に補強する第2誘電体と,マイクロ
波集積回路の周囲に設けられ前記第1ないし第3金属箔
の各金属箔を電気的に接続するスルーホールを具備した
ことを特徴とする。
A conventional microwave integrated circuit in which a dielectric substrate on which a microstrip line is formed is fixed to a metal plate is shown in No. 5@. In the figure, reference numeral 101 denotes a Teflon glass substrate formed into a thin plate. A microstrip line 102 (only a part of which is shown) is formed on the surface of this Teflon glass substrate 101, and a ground plane of the microstrip line 102 is formed on the back side. A metal foil 103 made of steel or the like is formed on the entire surface to form an MI
It consists of CIQ4. Further, 105 is a carrier formed of a metal plate having strength for reinforcing the MIC 104, and the carrier 105 and the metal fil03 on the ground plane are soldered together (not shown) using solder cream, flow technique, etc. It is designed to be connected and fixed by. In addition, 106 is the above-mentioned MIC 104 and carrier 105
Mounting holes drilled at the four corners of the mounting holes 106 facing each other.
By soldering in accordance with the above MIC10
4 and the carrier 105 are positioned. Next, the manufacturing and assembly process of the above MIC will be explained. First, a carrier 105 is punched out by pressing or the like to have the same external dimensions as the MIC104, and Sn. Ni,
The entire surface of the carrier 105 is plated using a conductive material such as Au. On the other hand, microstrip lines 102 are patterned on one side of a Teflon glass substrate material (not shown) with copper coating on both sides using a well-known photographic technique, and a plurality of MICs 104 are formed on one Teflon glass substrate. Next, the Teflon glass substrate material is 104 in FIG.
Each sheet is cut out using a punching technique according to the size of the MIC shown in the figure, and fixed onto the carrier 105 by soldering or the like. In such a conventional manufacturing method, each IC is separated and then soldered onto the carrier 105.
Work efficiency is extremely poor. In addition, the old C
When they are soldered onto carriers 105 of the same external dimensions, they are bonded over a wide area, so air spaces may be formed in some areas during bonding, resulting in poor grounding. Furthermore, it has the disadvantage that variations in electrical characteristics are likely to occur, especially at high frequencies, due to misalignment between the carrier 105 and the MICl04. (Problem to be solved by the invention) As mentioned above, in the past, the MIC was separated into individual pieces.
Since the MIC 104 was fixed on the carrier 105 with adhesive, work efficiency was poor, air layers were partially formed on the adhesive surface, causing poor grounding, and misalignment between the carrier 105 and the MIC 104 caused each MIC 104 to However, each had drawbacks such as variations in electrical characteristics. The present invention was made to solve the above-mentioned drawbacks, and after forming an MIC using an MIC substrate material in which a dielectric material having strength for reinforcing the MIC104 is adhesively fixed to the ground plane of a Teflon glass substrate material. , the purpose is to provide a MIC that can be separated one by one. [Structure of the Invention] (Means for Solving the Problems) A microwave integrated circuit of the present invention includes a plate-shaped first dielectric body on which a main part of the microwave integrated circuit is formed, and a first dielectric body of the first dielectric body. a first metal foil on which a pattern of a microwave integrated circuit is formed in contact with a first main surface; and a first metal foil on a second main surface of the first dielectric;
a second metal foil that contacts at its main surface and forms a ground plane of the microwave integrated circuit; and a second dielectric that contacts the second main surface of the second metal foil at its first main surface and mechanically reinforces the first dielectric. The microwave integrated circuit is characterized by having a through hole for electrically connecting the body and each of the first to third metal foils provided around the microwave integrated circuit.

(作 用) 本発明は上記構成とすることにより、従来1枚毎に分離
してからMICをキャリア上に半田付けし,固定してい
たのに対し,第1の誘電体上に接続された第1の金属箔
により複数のマイクロ波集積回路を形成し、それぞれの
MICの周囲をスルーホールによって第2、第3の金属
箔に接続することにより接地面を形戒し得るため,ll
造上の作業能率が大幅に向上し,また、半田付けの際,
部分的に発生していた空気層による接地不良等を生じて
いた従来の欠点をも防止することができる.さらに、個
々のMICに分割するとき、各MICの位置精度も向上
させることが可能となった.又. MI(1:上にFE
Tダイオード、抵抗,コンデンサ等の素子を接続した後
に個々の回路に分離することが可能であり、さらに製造
上の作業能率が向上する.(実施例) 以下、本発明の一つの実施例を図面を参照して説明する
(Function) By having the above configuration, the present invention has the MIC connected to the first dielectric, whereas conventionally the MIC was soldered and fixed on the carrier after being separated one by one. By forming a plurality of microwave integrated circuits using the first metal foil and connecting the periphery of each MIC to the second and third metal foils through through holes, it is possible to form a ground plane.
Construction work efficiency has been greatly improved, and when soldering,
It is also possible to prevent the conventional drawbacks such as poor grounding due to air layers that occur in some areas. Furthermore, when dividing into individual MICs, it is now possible to improve the positional accuracy of each MIC. or. MI (1: FE on top
After connecting elements such as T diodes, resistors, and capacitors, it is possible to separate them into individual circuits, further improving manufacturing efficiency. (Example) Hereinafter, one example of the present invention will be described with reference to the drawings.

第1図は本発明のMICを実現するための用いるMIC
基板材の構造を説明するために斜視図である。
Figure 1 shows the MIC used to realize the MIC of the present invention.
FIG. 2 is a perspective view for explaining the structure of a substrate material.

すなわち,11はMICを形成する第1の金属M(例え
ば銅箔),l2はMICを形成する第1の誘電体(例え
ばテフロンガラス基板)、l3はMICの接地栢を形成
する金属箔(例えば銅箔)、l4はMICを補強するた
めの強度を有する誘電体(例えばガラスエポキシ樹脂基
板)、l5は13と同じく,接地面を形成する金属箔(
例えば銅箔)である。これらは、圧着技術により圧着接
続され,1枚のMIC基板材を形成している. 上記のκIC基板材を用いたMICの形成方法について
次に説明する。
That is, 11 is the first metal M (e.g. copper foil) that forms the MIC, l2 is the first dielectric material (e.g. Teflon glass substrate) that forms the MIC, and l3 is the metal foil (e.g. l4 is a dielectric material (e.g. glass epoxy resin board) that has the strength to reinforce the MIC, l5 is a metal foil (copper foil) that forms the ground plane, similar to 13.
For example, copper foil). These are crimped and connected using crimping technology to form one MIC board material. Next, a method for forming an MIC using the above-mentioned κIC substrate material will be described.

第2図は本発明の一実施例で第1図で説明したMIC基
板材20を用いたMIC回路である。図中、テフロンガ
ラス基板12に第1の金属箔11によるマイクロストリ
ップ回路21 (一部のみ図示)によるMICパターン
22が縦横に複数個(図中では8個)配列されている.
又,各々のMICパターン22の周囲に多数のスルーホ
ール23が縦横に設けられており,周知の金属めっき技
術によりスルーホール23を形成して各金属箔11,1
3、15を導通状態にする.したがって,誘電体14の
両面は電気的に同電位となり,従来のキャリア105と
電気的に同一の構或となる.このときの上記スルーホー
ル23の数、大きさ,ピッチ,及び位置は、NICパタ
ーン及び使用周波数によって決められる. 第3図は、第2図からMICパターン22を1個打抜き
分離した状態を示す斜視図である。すなわち、打抜きは
、スルーホール23の中央部分を行う。中央部を打抜く
と、打抜く面積が小さいので容易に打抜くことができる
.打抜かれたMICパターン22を周知の抜戻し技術に
より再び第2図に示す状態に配列可能である。そして、
各MICパターン22CこそれぞれFET、抵抗、コン
デンサ等の部品(図示しない)を周知の自動マウント装
置により配置して半田付けを行うことができる。その後
,再び第3図に示す様に分離することによって各MIC
パターンには、それぞれ各部品が接続されたMICを完
戒することができる。
FIG. 2 shows an MIC circuit using the MIC substrate material 20 described in FIG. 1, which is an embodiment of the present invention. In the figure, a plurality of MIC patterns 22 (8 in the figure) are arranged vertically and horizontally on a Teflon glass substrate 12, each consisting of a microstrip circuit 21 (only a portion of which is shown) made of a first metal foil 11.
Further, a large number of through holes 23 are provided in the vertical and horizontal directions around each MIC pattern 22, and the through holes 23 are formed by a well-known metal plating technique to form each metal foil 11, 1.
3. Make 15 conductive. Therefore, both sides of the dielectric 14 have the same electrical potential, and have the same electrical structure as the conventional carrier 105. The number, size, pitch, and position of the through holes 23 at this time are determined by the NIC pattern and the frequency used. FIG. 3 is a perspective view showing a state in which one MIC pattern 22 is punched out and separated from FIG. 2. That is, punching is performed at the center of the through hole 23. If you punch out the center part, the punching area will be small, so it will be easier to punch out. The punched MIC patterns 22 can be arranged again in the state shown in FIG. 2 by a well-known extraction technique. and,
For each MIC pattern 22C, parts (not shown) such as FETs, resistors, and capacitors can be placed and soldered using a well-known automatic mounting device. After that, each MIC is separated again as shown in Figure 3.
Each pattern can include a complete list of MICs to which each component is connected.

第4図は,本発明の他の実施例で、スルーホール23が
打抜き位置より内側にあり側面からは、スルーホールが
見えないが,第3図と同様,本発明に必要な性能を満足
している.なお、24はMICの取付孔である。
FIG. 4 shows another embodiment of the present invention, in which the through hole 23 is located inside the punching position and cannot be seen from the side, but like FIG. 3, it satisfies the performance required for the present invention. ing. Note that 24 is a mounting hole for the MIC.

上記実施例では、MIC 22が形戒された第1の誘電
体l2にテフロンガラス基板、第2の誘電体l4にガラ
ス二ボキシ基板を用いた場合について説明したが、これ
に限定されるものではなく、第工、第2の誘電体基板を
スルーホールで電気的に接続された構造であれば,差支
えない。
In the above embodiment, a Teflon glass substrate is used as the first dielectric 12 in which the MIC 22 is formed, and a glass dielectric substrate 14 is used as the second dielectric 14, but the present invention is not limited to this. There is no problem as long as the structure is such that the first and second dielectric substrates are electrically connected through a through hole.

また本発明は、MICの接地面を形成する二つの金属箔
l3、15を同電位にすることで達或されるため、第3
図,第4図に示した金属illは無くても良い.この場
合には、スルーホールの製造方法が異なるが、金属箔l
3と15がスルーホールで接続されていることは同一で
ある。
Furthermore, since the present invention is achieved by making the two metal foils 13 and 15 forming the ground plane of the MIC the same potential, the third
The metal ill shown in Figures and Figure 4 may be omitted. In this case, the manufacturing method of the through hole is different, but the metal foil l
3 and 15 are the same in that they are connected through a through hole.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、従来、阿IC基板か
ら個々の阿ICパターンを分離した後キャリアに半田付
けすることにより. MICの強度を補強したのに対し
、予め他の誘電体で補強した材料を用い、その周囲をス
ルーホールで接続することで接地をすることが可能とな
り、MIC基板とキャリアとの半田接続工程が不要とな
った。
As described above, according to the present invention, conventionally, individual AIC patterns are separated from an AIC substrate and then soldered to a carrier. In order to strengthen the strength of the MIC, it is now possible to ground the MIC by using a material that has been reinforced with another dielectric material and connecting the periphery with a through hole, which reduces the solder connection process between the MIC board and the carrier. No longer needed.

又、多数のMICパターン上にFET .抵抗等の部品
を同時に接続可能となり、作業工程が大幅に短縮される
とともに自動組立機の使用が可能になるという利点を有
している。
Also, FETs are placed on many MIC patterns. This has the advantage that parts such as resistors can be connected at the same time, the work process is greatly shortened, and automatic assembly machines can be used.

また,半田付け接続工程が無いことから,精密加工が行
なえるなどの優れた効果を奏するものである.
Additionally, since there is no soldering connection process, it has excellent effects such as precision machining.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に使用する阿工C用の基板材の構造を示
す斜視図、第2図は本発明の一実施例に係るMICパタ
ーンを複数個形成した状態を示す斜視図,第3図は第2
図に示すMICパターンの複数個から1個のMICパタ
ーンを打抜き分離した状態を示す斜視図,第4図は第2
図に示すMICパターンの複数個から打抜き分離した他
のMICパターンを示す斜視図,第5図は個々のMIC
パターンをキャリアに固定する従来のMIC装置を示す
斜視図である. 11,13. 15・・・金属箔、12,14・・・誘
電体,21・・・マイクロストリップ線路,22・・・
MIC23・・・スルーホール
FIG. 1 is a perspective view showing the structure of a substrate material for A-C used in the present invention, FIG. 2 is a perspective view showing a state in which a plurality of MIC patterns are formed according to an embodiment of the present invention, and FIG. The figure is the second
A perspective view showing a state in which one MIC pattern is punched and separated from a plurality of MIC patterns shown in the figure.
A perspective view showing other MIC patterns separated by punching from a plurality of MIC patterns shown in the figure, and Figure 5 shows individual MIC patterns.
1 is a perspective view showing a conventional MIC device that fixes a pattern to a carrier. 11,13. 15... Metal foil, 12, 14... Dielectric, 21... Microstrip line, 22...
MIC23...Through hole

Claims (1)

【特許請求の範囲】[Claims]  マイクロ波集積回路の要部が形成された板状の第1誘
電体と、前記第1誘電体の第1主面に接しマイクロ波集
積回路のパターンが形成された第1金属箔と、前記第1
誘電体の第2主面に第1主面で接しマイクロ波集積回路
の接地面をなす第2金属箔と、前記第2金属箔の第2主
面に第1主面で接し前記第1誘電体を機械的に補強する
第2誘電体と、マイクロ波集積回路の周囲に設けられ前
記第1ないし第3金属箔の各金属箔を電気的に接続する
スルーホールを具備したマイクロ波集積回路。
a plate-shaped first dielectric on which a main part of a microwave integrated circuit is formed; a first metal foil in contact with a first main surface of the first dielectric and on which a pattern of a microwave integrated circuit is formed; 1
a second metal foil whose first principal surface is in contact with the second principal surface of the dielectric and forms a ground plane of the microwave integrated circuit; and a first dielectric foil whose first principal surface is in contact with the second principal surface of the second metal foil. A microwave integrated circuit comprising: a second dielectric for mechanically reinforcing the body; and a through hole provided around the microwave integrated circuit to electrically connect each of the first to third metal foils.
JP1230067A 1989-09-05 1989-09-05 Microwave integrated circuit Pending JPH0392001A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1230067A JPH0392001A (en) 1989-09-05 1989-09-05 Microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1230067A JPH0392001A (en) 1989-09-05 1989-09-05 Microwave integrated circuit

Publications (1)

Publication Number Publication Date
JPH0392001A true JPH0392001A (en) 1991-04-17

Family

ID=16902023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1230067A Pending JPH0392001A (en) 1989-09-05 1989-09-05 Microwave integrated circuit

Country Status (1)

Country Link
JP (1) JPH0392001A (en)

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