JPH0386468A - Polishing method for semiconductor substrate - Google Patents

Polishing method for semiconductor substrate

Info

Publication number
JPH0386468A
JPH0386468A JP1224063A JP22406389A JPH0386468A JP H0386468 A JPH0386468 A JP H0386468A JP 1224063 A JP1224063 A JP 1224063A JP 22406389 A JP22406389 A JP 22406389A JP H0386468 A JPH0386468 A JP H0386468A
Authority
JP
Japan
Prior art keywords
polishing
abrasive
semiconductor substrate
surface roughness
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1224063A
Other languages
Japanese (ja)
Inventor
Akira Nieda
贄田 晃
Hiroshi Sato
弘 佐藤
Muneharu Shimanoe
島ノ江 宗治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP1224063A priority Critical patent/JPH0386468A/en
Publication of JPH0386468A publication Critical patent/JPH0386468A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable a specular polishing that the surface roughness is less than 10Angstrom by specifying the conditions of the pH of the alkali liquid of an abrasive and contained abrasive grain size, the feeding quantity, polishing pressure, etc., of the abrasive. CONSTITUTION:An abrasive 8 containing the abrasive grain in 10 - 300Angstrom grain size in the alkali liquid of less than 11.0 pH is used and a finishing polishing is executed under the conditions of 0.01 - 0.2cc/cm<2> feed quantity of the abrasive 8 and 100 - 200g/cm<2> polishing pressure. Thus, the mechanical action as well as the etching action are slightly strengthened and the semiconductor board 5 surface can be polished in less than 10Angstrom surface roughness without causing a flaw and damage.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体基板の研磨方法、特に半導体基板の平
均表面粗さRaをIOA以下にする仕上げ研磨方法に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for polishing a semiconductor substrate, and particularly to a method for final polishing the average surface roughness Ra of a semiconductor substrate to be less than IOA.

〔発明の概要〕[Summary of the invention]

本発明は、半導体基板を研磨盤に接触させ、研磨剤を供
給して半導体基板の面を研磨する半導体基板の研磨方法
において、り)+ 11.0以下のアルカリ液に粒径1
00〜300人の砥粒を含有してなる研磨剤を用い、研
磨剤の供給量を0.Ol〜0.2cc / c++l・
分とし、研磨圧力を100〜200 g / catと
して研磨することによって、平均表面粗さRaが10Å
以下の仕上げ研磨を可能にするものである。
The present invention provides a semiconductor substrate polishing method in which a semiconductor substrate is brought into contact with a polishing plate and a polishing agent is supplied to polish the surface of the semiconductor substrate.
Using an abrasive containing abrasive grains of 0.00 to 300, the supply amount of the abrasive was set to 0. Ol~0.2cc/c++l・
By polishing at a polishing pressure of 100 to 200 g/cat, the average surface roughness Ra was 10 Å.
This enables the following final polishing.

〔従来の技術〕[Conventional technology]

従来の半導体基板の仕上げ研磨は定盤に軟質のポリウレ
タン製の発泡クロスを貼着した研磨盤を用い、研磨剤に
アルカリ液に砥粒であるSiO□粒子を含有せしめたも
のを用いて行っている。半導体基板は接着剤でガラスプ
レートに接着するか、もしくはテンプレートというホル
ダーを用いて保持している。そして、回転する研磨盤に
研磨剤を適量供給し、半導体基板を研磨盤に接触させて
研磨を行う。この仕上げ研磨の特徴は、軟質クロスを用
いて研磨盤への加圧力を低くして行う所謂エツチング作
用を主とした研磨である。このときの研磨条件は次の如
くである。
Conventional final polishing of semiconductor substrates is carried out using a polishing plate with a soft polyurethane foam cloth attached to the surface plate, and a polishing agent containing SiO□ particles, which are abrasive grains, in an alkaline solution. There is. The semiconductor substrate is adhered to the glass plate with adhesive or is held using a holder called a template. Then, an appropriate amount of polishing agent is supplied to a rotating polishing disk, and the semiconductor substrate is brought into contact with the polishing disk to perform polishing. This final polishing is characterized by polishing mainly using a so-called etching effect, which is performed by using a soft cloth and reducing the pressure applied to the polishing disk. The polishing conditions at this time are as follows.

研磨圧カニ 100 g / crlより低圧研磨剤供
給量二0.4〜2. Occ / ci・水研磨剤のア
ルカリ液:pH11,0を越える強アル刀り研磨剤の砥
粒(Sto=)粒径:300人を越える粒径かかる研磨
方法によれば、半導体基板表面に傷、ダメージの無い鏡
面を得ることができる。
Polishing pressure crab 100 g/crl Low pressure polishing agent supply amount 20.4~2. Occ/ci/water Alkaline solution of polishing agent: Strong alkaline with pH exceeding 0 Abrasive grain of polishing agent (Sto=) Particle size: Particle size of more than 300 people This polishing method may cause scratches on the surface of the semiconductor substrate. , it is possible to obtain a mirror surface without damage.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし乍ら、上述の従来の仕上げ研磨方法はエツチング
作用を主体としているため、平均の表面粗さRaが20
Å以上となる。20Å以上の面粗さの場合、現状のデバ
イスのパターンルールでは特に問題とならないが、今後
、更に微細パターンになると表面粗さが問題となる可能
性がある。また、現在、例えば高電力素子等のデバイス
用基板として2枚のシリコンウェハ同士を直接貼り合せ
てなる貼り合せウェハ、或は貼り合せ方式のS○■(s
ilicon on 1nsulator)基板等の所
謂貼り合せウェハの研究が進められているが、このよう
な貼り合せウェハに使用した場合、20Å以上の表面粗
さではウェハ間に気泡が発生する原因になることが実験
で確認されている。
However, since the above-mentioned conventional finish polishing method is mainly based on etching, the average surface roughness Ra is 20.
Å or more. In the case of surface roughness of 20 Å or more, there is no particular problem with the current device pattern rules, but if the pattern becomes even finer in the future, surface roughness may become a problem. Currently, bonded wafers made by directly bonding two silicon wafers, or bonded S○■ (s
Research is progressing on so-called bonded wafers such as ilicon on 1 nsulator) substrates, but when used in such bonded wafers, surface roughness of 20 Å or more may cause air bubbles to occur between the wafers. Confirmed by experiment.

本発明は、上述の点に鑑み、平均の表面粗さが10Å以
下となるように仕上げ研磨を可能にした半導体基板の研
磨方法を提供するものである。
In view of the above-mentioned points, the present invention provides a method for polishing a semiconductor substrate, which enables final polishing so that the average surface roughness is 10 Å or less.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、半導体基板(5)を研磨盤(2)に接触させ
、研磨剤(8)を供給して半導体基板(5)の面を研磨
する半導体基板の研磨方法において、pH11,0以下
のアルカリ液に粒径100〜300人の砥粒を含有して
なる研磨剤(8)を用い、研磨剤(8)の供給量を0.
01〜0.2cc / crl・分とし、研磨圧力を1
00〜200 g / cnとして研磨することを特徴
とする。
The present invention provides a method for polishing a semiconductor substrate in which the surface of the semiconductor substrate (5) is polished by bringing the semiconductor substrate (5) into contact with a polishing plate (2) and supplying an abrasive agent (8). Using an abrasive (8) containing abrasive grains with a particle size of 100 to 300 in an alkaline solution, the supply amount of the abrasive (8) was set to 0.
01~0.2cc/crl・min, polishing pressure 1
Characterized by polishing as 00-200 g/cn.

〔作用〕[Effect]

上述の本発明によれば、pH11,0以下のアルカリ液
に粒径100〜300人の砥粒を含有した研磨剤を用い
、研磨剤の供給量を0.01〜0.2cc / aIl
l・分、研磨圧力を100〜200g/Cdの条件で仕
上げ研磨することにより、エツチング作用と併せてメカ
ニカル作用が少し強まり、傷、ダメージを生じさせるこ
となく、IOÅ以下の表面粗さに半導体基板表面を研磨
することができる。
According to the present invention described above, an abrasive containing abrasive grains with a particle size of 100 to 300 particles is used in an alkaline solution having a pH of 11.0 or less, and the supply amount of the abrasive is 0.01 to 0.2 cc/al.
By final polishing at a polishing pressure of 100 to 200 g/Cd for 1 minute, the mechanical action is slightly strengthened in addition to the etching action, and the semiconductor substrate can be polished to a surface roughness of IOÅ or less without causing scratches or damage. The surface can be polished.

E実施例〕 以下、図面を用いて本発明による半導体基板の研磨方法
の例を説明する。
Example E] Hereinafter, an example of a method for polishing a semiconductor substrate according to the present invention will be explained using the drawings.

第1図は研磨装置(1)を示すもので、(2)は定盤(
3)に軟質ポリウレタン製の発泡クロス(4)を貼着し
てなる研磨盤、(5)は研磨されるべき半導体基板例え
ばシリコンウェハであり、ウェハ(5)は接着剤を介し
てホルダー(6)に固定される。研磨時、ウェハ(5)
は回転する研磨盤(2)の発泡クロス(4)の面に接触
し、研磨剤供給子役(7)から研磨剤(8)を供給して
行われる。
Figure 1 shows the polishing device (1), and (2) the surface plate (
A polishing plate (3) is made of a soft polyurethane foam cloth (4) attached to the polishing plate, (5) is a semiconductor substrate to be polished, such as a silicon wafer, and the wafer (5) is attached to a holder (6) via an adhesive. ) is fixed. During polishing, wafer (5)
This is carried out by contacting the surface of the foam cloth (4) of the rotating polishing disk (2) and supplying the abrasive (8) from the abrasive supply child (7).

本発明に係る仕上げ研磨法は、従来のエツチング作用を
主とした研磨から、メカニカル作用を少し強めた研磨条
件で行うようになす。本実施例では、研磨条件を次のよ
うに設定する。
The final polishing method according to the present invention is performed under polishing conditions with a slightly stronger mechanical action than the conventional polishing mainly using an etching action. In this example, polishing conditions are set as follows.

研磨剤(8)としては、9H11,0以下のアルカリ液
に粒径100〜300人のSiQ2粒子(砥粒〉を含有
せしめた研磨剤(懸濁液)を用いる。アルカリ液のSi
O□粒子の含有は5wt%程度である。アルカリ液とし
ては例えば水酸化ナトリウム、アンモニアの水溶液を用
いろる。
As the abrasive (8), an abrasive (suspension) containing SiQ2 particles (abrasive grains) with a particle size of 100 to 300 is used in an alkaline solution of 9H11.0 or less.
The content of O□ particles is about 5 wt%. As the alkaline solution, for example, an aqueous solution of sodium hydroxide or ammonia can be used.

研磨剤(8)の供給量は0.01〜0.2cc / c
lfI・分とする。研磨圧力即ちウェハ(5)の研磨盤
(2)への加圧力は100〜200 g / cmとす
る。また研磨盤(2)の周速は34m/分とする。
The supply amount of abrasive (8) is 0.01~0.2cc/c
Let it be lfI・min. The polishing pressure, that is, the pressing force of the wafer (5) to the polishing plate (2) is 100 to 200 g/cm. Further, the peripheral speed of the polishing plate (2) is 34 m/min.

このような研磨条件でウェハ(5)を研磨すると、傷、
ダメージを生じさせないで10Å以下の平均表面粗さの
研磨面が得られる。
If the wafer (5) is polished under such polishing conditions, scratches,
A polished surface with an average surface roughness of 10 Å or less can be obtained without causing damage.

この結果を第2図乃至第4図のグラフに示す。The results are shown in the graphs of FIGS. 2 to 4.

第2図の曲線(I)は研磨剤に含有されているSiQ、
粒子の粒径と面粗さの関係を示すグラフである。Sin
、粒径が300A以下であれば面粗さはIOA以下にな
る。
Curve (I) in FIG. 2 shows SiQ contained in the abrasive,
It is a graph showing the relationship between particle size and surface roughness of particles. Sin
If the grain size is 300A or less, the surface roughness will be IOA or less.

第3図は、研磨圧力と面粗さ及びダメージの関係を示す
もので、曲線(ff)がダメージのグラフ、曲線(II
[>が面粗さのグラフを示す。研磨圧力が100 g 
/ cI11以上であれば面粗さは10Å以下となるも
、研磨圧力が200 g / cutを越えるとダメー
ジが発生する。従って研磨圧力を100〜200 g 
/ crjの範囲にすればダメージがなく且つ10Å以
下の面粗さが得られる。
Figure 3 shows the relationship between polishing pressure, surface roughness, and damage, where the curve (ff) is a damage graph and the curve (II
[> indicates a graph of surface roughness. Polishing pressure is 100g
If /cI11 or more, the surface roughness will be 10 Å or less, but if the polishing pressure exceeds 200 g/cut, damage will occur. Therefore, increase the polishing pressure to 100-200 g.
/ crj, no damage can be caused and a surface roughness of 10 Å or less can be obtained.

第4図は、研磨剤の供給量とダメージ及び面粗さの関係
を示すもので、曲線(rV)がダメージのグラフ、曲線
(V)が面粗さのグラフを示す。研磨剤供給量が0.0
1CC/Cl11・分より少ないとダメージの発生があ
り、0.2CC/ cM・分を越えると面粗かが10人
より粗くなる。従って、研磨剤供給量を0、Ol〜0.
2CG / crl・分の範囲にすればダメージがなく
且つ10Å以下の面粗さが得られる。
FIG. 4 shows the relationship between the supply amount of abrasive and damage and surface roughness, where the curve (rV) shows the damage graph and the curve (V) shows the surface roughness graph. Abrasive supply amount is 0.0
If it is less than 1 CC/Cl11·min, damage may occur, and if it exceeds 0.2 CC/cM·min, the surface roughness becomes rougher than 10. Therefore, the abrasive supply amount is set to 0, Ol to 0.
If it is in the range of 2CG/crl·min, no damage will occur and a surface roughness of 10 Å or less can be obtained.

なお、表面粗さの測定は、3次元表面粗さ計を用いて行
った。また、ダメージの測定は、研磨後のウェハ表面を
酸化してライトエツツチ(l!lightetch :
欠陥検出エッチ〉によるピットを見て行った。
Note that the surface roughness was measured using a three-dimensional surface roughness meter. In addition, the damage can be measured by oxidizing the wafer surface after polishing and using lighttetch (l!lighttetch).
I checked the pits using defect detection etch.

このように本研磨方法を用いることにより、ウェハ(5
)を傷、ダメージのない、しかも面粗さが10Å以下と
なるような鏡面仕上げを行うことができるものであり、
従って、超微細パターンの半導体デバイス或は信頼性の
高い貼り合せウェハの作成を可能にする。
By using this polishing method in this way, the wafer (5
) can be finished to a mirror finish without scratches or damage, and with a surface roughness of 10 Å or less.
Therefore, it is possible to produce semiconductor devices with ultra-fine patterns or highly reliable bonded wafers.

〔発明の効果〕〔Effect of the invention〕

本発明による半導体基体の研磨方法によれば、研磨剤の
アルカリ液のpH及び含有されている砥粒の粒径、研磨
剤の供給量、研磨圧力等の条件を特定することにより、
表面粗さが10Å以下の鏡面研磨を行うことができる。
According to the method of polishing a semiconductor substrate according to the present invention, by specifying conditions such as the pH of the alkaline solution of the polishing agent, the particle size of the abrasive grains contained, the supply amount of the polishing agent, and the polishing pressure,
Mirror polishing with a surface roughness of 10 Å or less can be performed.

従って、本研磨方法を用いることにより、超微細パター
ンの半導体デバイスの作成が可能となり、また、貼り合
せウェハにおいてもウェハ間に気泡の発生がなく信頼性
の高い貼り合せをウェハが得られるものである。
Therefore, by using this polishing method, it is possible to create semiconductor devices with ultra-fine patterns, and even in bonded wafers, it is possible to obtain highly reliable bonding with no air bubbles between the wafers. be.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る研磨装置の例を示す構成図、第2
図は砥粒(SiO□)の粒径と面粗さの関係を示すグラ
フ、第3図は研磨圧力と面粗さ及びダメージとの関係を
示すグラフ、第4図は研磨剤供給量と面粗さ及びダメー
ジとの関係を示すグラフである。 (1)は研磨装置、(2)は研磨盤、(5)は半導体基
板、(8)は研磨剤である。 代 理 人 松 隈 秀 盛 1朋m装置 第 図 第2図 第3図 手続補正書 1、事件の表示 )V戒 1年特 許 願 第224063号 2・Q 明(7) 名s   半導体基よ1、方法3、
1ili正をする者 事件との関係   特許出願人 住 所 東京部品用区北品用6丁目7番35号名称(2
18)ソニー株式会社 代表取締役 大 賀 典 雄 4、代理人
FIG. 1 is a configuration diagram showing an example of a polishing apparatus according to the present invention, and FIG.
The figure is a graph showing the relationship between the grain size of abrasive grains (SiO It is a graph showing the relationship between roughness and damage. (1) is a polishing device, (2) is a polishing plate, (5) is a semiconductor substrate, and (8) is a polishing agent. Agent Hidemori Matsukuma 1 Tomorrow Apparatus Figure 2 Figure 3 Procedural Amendment 1, Indication of Case) V Command 1 Year Patent Application No. 224063 2 Q Ming (7) Name S Semiconductor Base 1, Method 3,
Relationship with the case of the person making the 1ili correction Patent applicant address: 6-7-35, Kitashinyo, Tokyo Parts Store Name (2
18) Sony Corporation Representative Director Norio Ohga 4, Agent

Claims (1)

【特許請求の範囲】 半導体基板を研磨盤に接触させ、研磨剤を供給して上記
半導体基板の面を研磨する半導体基板の研磨方法におい
て、 pH11.0以下のアルカリ液に粒径100〜300Å
の砥粒を含有してなる研磨剤を用い、 該研磨剤の供給量を0.01〜0.2cc/cm^2・
分とし、研磨圧力を100〜200g/cm^2として
研磨することを特徴とする半導体基板の研磨方法。
[Scope of Claims] A method for polishing a semiconductor substrate, in which a semiconductor substrate is brought into contact with a polishing plate, and a polishing agent is supplied to polish the surface of the semiconductor substrate, wherein a particle size of 100 to 300 Å is added to an alkaline solution having a pH of 11.0 or less.
Using an abrasive containing abrasive grains, the supply amount of the abrasive is 0.01 to 0.2 cc/cm^2.
A method for polishing a semiconductor substrate, comprising polishing at a polishing pressure of 100 to 200 g/cm^2.
JP1224063A 1989-08-30 1989-08-30 Polishing method for semiconductor substrate Pending JPH0386468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1224063A JPH0386468A (en) 1989-08-30 1989-08-30 Polishing method for semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1224063A JPH0386468A (en) 1989-08-30 1989-08-30 Polishing method for semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH0386468A true JPH0386468A (en) 1991-04-11

Family

ID=16807990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1224063A Pending JPH0386468A (en) 1989-08-30 1989-08-30 Polishing method for semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH0386468A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07314324A (en) * 1994-05-18 1995-12-05 Memc Electron Materials Inc Method for rough polishing of semiconductor wafer to reduce surface roughness
WO1998050200A1 (en) * 1997-05-07 1998-11-12 Kabushiki Kaisha Toshiba Abrasive and method for polishing semiconductor substrate
JP2007073687A (en) * 2005-09-06 2007-03-22 Sumco Techxiv株式会社 Polishing method of semiconductor wafer
CN105666309A (en) * 2016-01-29 2016-06-15 柳州市安龙机械设备有限公司 Finish machining method of hard alloy workpiece

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07314324A (en) * 1994-05-18 1995-12-05 Memc Electron Materials Inc Method for rough polishing of semiconductor wafer to reduce surface roughness
WO1998050200A1 (en) * 1997-05-07 1998-11-12 Kabushiki Kaisha Toshiba Abrasive and method for polishing semiconductor substrate
US6354913B1 (en) 1997-05-07 2002-03-12 Kabushiki Kaisha Toshiba Abrasive and method for polishing semiconductor substrate
JP2007073687A (en) * 2005-09-06 2007-03-22 Sumco Techxiv株式会社 Polishing method of semiconductor wafer
CN105666309A (en) * 2016-01-29 2016-06-15 柳州市安龙机械设备有限公司 Finish machining method of hard alloy workpiece

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