JPH0385487A - Time-piece apparatus - Google Patents

Abstract

PURPOSE:To reduce clock gain due to the repetition of current supply and power failure by performing the changing-over to the time of a backup time- piece at the time of power failure while performing the changing-over to a power supply synchronous time-piece at the time of power recovery and applying statistical processing to said time. CONSTITUTION:A microcomputer 4A being a central processing circuit counts the pulse of power supply voltage subjected to waveform shaping by a waveform shaping circuit 2 to tick time as a power supply synchronous time-piece to display the same on a display device 5. When a pulse is not generated for a definite period, power failure is judged to change over time to a quartz time- piece 3. When the circuit 2 becomes a state generating a pulse, power recovery is judged to return to power supply synchronous time but, at this time, the count time of the first pulse from the circuit 2 is set to a time of the 1/2 cycle of a pulse, that is, statistical processing is applied to perform processing. Therefore, stable clocking operation reduced in error can be realized over a long period of time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a clock device for a complex meter 1, such as an electronic wattmeter.

[Conventional technology] The configuration of a conventional example will be explained with reference to FIG.

FIG. 4 is a block diagram showing a conventional timepiece device.

In FIG. 4, the conventional clock device includes a power supply voltage terminal (1) connected to a picture power supply (not shown), and a waveform shaping circuit (2) including a noise filter connected to this power supply voltage terminal (1). , a crystal clock (3), a microcomputer (
4), a display device (5) connected to this microcomputer (4), and a power supply circuit (6) such as a battery that supplies power to each circuit.

Furthermore, Figure 4 shows the clock device part of the electronic watt-hour meter, in which the power supply current terminal (7), the input side is connected to the power supply voltage terminal (1) and the power supply current terminal (7), and the output side is connected to the power supply voltage terminal (1) and the power supply current terminal (7). Also shown is a power frequency conversion circuit (8) connected to the microcomputer (4).

Next, the operation of the above-mentioned conventional example will be explained.

Power-synchronized clocks based on the power frequency are corrected throughout the year by the power company for frequency differences.
It is accurate in the long run.

The waveform shaping circuit (2) shapes the waveform of the power supply voltage and outputs pulses proportional to the power supply frequency to the microcomputer (4).

The microcomputer (4) counts input pulses to mark one hour as a power synchronized clock, and displays the time on a display (5).

If there is no pulse from the waveform shaping circuit (2) for a certain period of time, the microcomputer (4) determines that there is a power outage and switches to the time set by the crystal clock (3).

After that, when the waveform shaping circuit (2) starts outputting pulses, it is determined that the power has been restored and the time is switched to the time of the power synchronized clock.

However, since the timing at this time is uncertain, a two-hour error (clock advance) occurs.

On the other hand, the power amount frequency conversion circuit (8) multiplies the power supply voltage and current to obtain the power amount, converts the power I into a frequency, and outputs the frequency to the microcomputer (4).

The microcomputer (4) integrates the input frequencies and calculates the integrated power amount.

[Problems to be Solved by the Invention] The conventional clock device as described above has a problem in that the clock always advances due to repeated energization and power outage.

This invention was made to solve the above-mentioned problems, and an object thereof is to provide a timepiece device that can reduce clock advance due to repeated energization and power outage.

[Means for solving sII] A timepiece device according to the present invention includes the following means.

(i> Waveform shaping circuit that shapes the power supply voltage and outputs pulses corresponding to the power supply frequency.

(ii) A Ban Nkua Tubu clock that keeps time based on an oscillator.

(ii) The above pulses are counted and the time is kept as a power synchronized clock, and in the event of a power outage, the time is switched to the time of the above-mentioned bath/sofa/tsubu clock, and when the power is restored, the time is switched to the time of the above power synchronized clock, and the statistical clock is set at that time. A central processing circuit that performs processing.

[Operation] In the present invention, the power supply voltage is waveform-shaped by the waveform shaping circuit and a pulse corresponding to the power supply frequency is output.

In addition, the central processing circuit counts the above pulses and keeps time as a power synchronized clock, and in the event of a power outage, the time is switched to the time of the backup clock, and when power is restored, the time is switched to the time of the power synchronized clock, and the time is clocked. is subjected to statistical processing.

[Embodiment] The configuration of an embodiment of the present invention will be described with reference to FIG.

FIG. 1 is a block diagram showing an embodiment of the present invention, which includes a power supply voltage terminal (1) to a crystal clock (3), and a display device (5).
~Power frequency conversion circuit (8>) is completely the same as that of the above-mentioned conventional device.

In FIG. 1, an embodiment of the present invention is such that the microcomputer (4) of the conventional device described above is replaced with a microcomputer (4^) having new functions.

By the way, the backpack watch of the present invention is a crystal watch (3) in the above-described embodiment of the present invention, and the central processing circuit is a microcomputer (4^).

Next, the operation of the above embodiment will be explained with reference to FIGS. 2 and 3.

25th! ! is a waveform shaping circuit (2) of an embodiment of the present invention.
FIG. 3 is a flowchart showing the operation of an embodiment of the present invention.

In step (10) of FIG. 3, the microcomputer (4^) sets the time mode to a power synchronized clock.

In Ste, F (11), microcomputer (4
^) counts the pulses from the waveform shaping circuit (2) and determines whether the waveform shaping circuit (2) is generating pulses for a certain period of time 6 If no pulses are generated, it is determined that there is a power outage and the next Step, proceed to bu (12).

If not, return to step (10).

In Steps F (12) to (13), the time mode is set to crystal clock (3), and the time is ticked by crystal clock <3).
When the waveform shaping circuit (2) starts generating pulses, it is determined that the power has been restored, and the process proceeds to the next step, B<14>.

In step (14), statistical processing of the power synchronized clock is added and the process returns to step (10).

That is, for example, in the case of a power source with a frequency of 50 Hz, time is counted by counting pulses of 20 m5 per cycle.

The crystal clock (3) operation during a power outage switches to power synchronized clock operation at the next minute 00 seconds when power is turned on. At this time, the arrival time of the first pulse from the waveform shaping circuit (2) is indefinite within the range of 0 to 20 m5, as shown in FIG. Therefore, the time must be changed by switching operation.
A progress of 0 to 20 m5 is generated. Therefore, this crystal clock (
When switching to the power synchronized clock from 3), the count time of the first pulse mentioned above is treated as 10 m5, which is 172 cycles of the pulse.

In this way, a clock with fewer errors can be realized over the long term.

As described above, in an embodiment of the present invention, when the power is restored from a power outage and the crystal clock (3) is switched to the power synchronized clock, the count time of the first pulse from the waveform shaping circuit (2) is , by adding statistical processing, that is, 172 pulses
Since it is processed as a periodic time, it is possible to realize stable clock operation over a long period of time.

In addition, in the above-mentioned embodiment, this is performed as statistical processing.

Each time the crystal clock (3) switches to the power synchronized clock, the count time of the first pulse from the waveform shaping circuit (2) is set to 172 cycles of the pulse, but the number of switchings described above is counted. , a similar operation can be expected even if the count time of the first pulse is set to zero time every time the pulse is switched to an even or odd number.

Incidentally, in the above description, the case where the present invention is used in an electronic power I meter has been described, but it goes without saying that it can also be used in other composite devices.

[Effects of the Invention] As explained above, the present invention comprises a waveform shaping circuit that shapes the waveform of a power supply voltage and outputs a pulse corresponding to the power supply frequency, a backup clock that keeps time based on an oscillator, and a back-up clock that keeps time based on an oscillator. It is equipped with a central processing circuit that counts and keeps time as a power synchronized clock, switches to the time of the backup clock when the power goes out, switches to the time of the power synchronized clock when the power is restored, and performs statistical processing on the time. Therefore, it is possible to reduce clock advance due to repeated energization and power outage.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
M is a waveform diagram showing output pulses of a waveform shaping circuit according to an embodiment of the present invention, FIG. 3 is a flowchart diagram showing the operation of an embodiment of the present invention, and FIG. 4 is a block diagram showing a conventional clock device. be. In the figure, (1) ... power supply voltage terminal, (2) (3) (4^) (5>) In addition, ... waveform shaping circuit, ... crystal clock, ... microcomputer, ... It is an indicator.

Claims (1)

[Claims] A waveform shaping circuit that shapes the power supply voltage and outputs pulses corresponding to the power supply frequency, a backup clock that keeps time based on an oscillator, and a backup clock that counts the above pulses and keeps time as a power synchronized clock, and in the event of a power outage, the above backup What is claimed is: 1. A clock device comprising a central processing circuit that switches to the time of the power supply synchronized clock when the power is restored, and performs statistical processing on the time.