JPH0821884A - Clock device - Google Patents

Clock device

Info

Publication number
JPH0821884A
JPH0821884A JP15474094A JP15474094A JPH0821884A JP H0821884 A JPH0821884 A JP H0821884A JP 15474094 A JP15474094 A JP 15474094A JP 15474094 A JP15474094 A JP 15474094A JP H0821884 A JPH0821884 A JP H0821884A
Authority
JP
Japan
Prior art keywords
clock
time
power supply
power
cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15474094A
Other languages
Japanese (ja)
Inventor
Shigeharu Muraki
茂晴 村木
Hajime Saito
肇 齊藤
Osamu Ikeda
修 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
Original Assignee
Chubu Electric Power Co Inc
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chubu Electric Power Co Inc, Mitsubishi Electric Corp filed Critical Chubu Electric Power Co Inc
Priority to JP15474094A priority Critical patent/JPH0821884A/en
Publication of JPH0821884A publication Critical patent/JPH0821884A/en
Pending legal-status Critical Current

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  • Electric Clocks (AREA)

Abstract

PURPOSE:To provide a clock device capable of preventing the advance of the clock when noise is mixed into a power source by shaping the waveform of the power voltage, outputting the pulses corresponding to the power frequency, and providing a back-up clock ticking the time based on an oscillator. CONSTITUTION:The voltage cycle range corresponding to the power frequency is set in advance. When pulses are generated from a wave-form shaping circuit 2A at the reference cycle, the pulses are counted to tick the time, and the time is written into a crystal clock 3 at a constant cycle, e.g. at every minute. When the pulse interval becomes longer than the reference time, it is judged that a power stoppage or a momentary stoppage occurs, and the time is ticked by the crystal clock 3 for a fixed period, e.g. until 00 second of the next minute of the crystal watch 3 or until 00 second of the next minute after the electric power is recovered. When pulses are generated at the cycle shorter than the reference cycle, it is considered that noise is mixed, the time is likewise ticked by the crystal clock 3 until 00 second of the next minute, and the clock is switched to a back-up clock synchronized with the power frequency after 00 second of the minute at the reference cycle.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、電子式電力量計や電
子式最大需要電力計、或は、これらの複合計器などに用
いる時計装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timepiece device used for an electronic watt hour meter, an electronic maximum demand watt meter, or a composite instrument of these.

【0002】[0002]

【従来の技術】従来の時計装置の構成を図4に示すブロ
ック図を参照しながら説明する。図4の時計装置は、図
示しない商用電源に接続された電源電圧端子1と、この
電源電圧端子1に接続されたノイズフイルタを含む波形
整形回路2と、水晶時計3と、波形整形回路2および水
晶時計3に接続されたマイクロコンピュータ4と、この
マイクロコンピュータ4に接続された表示器5と、各回
路に電源を供給する電池等の電源回路6とから構成され
ている。なお、図4は電子式電力量計の時計装置部分を
示したもので、電源電流端子7、並びに、入力側が電源
電圧端子1および電源電流端子7に接続され、かつ、出
力側がマイクロコンピュータ4に接続された電力量周波
数変換回路8も図示されている。
2. Description of the Related Art The structure of a conventional timepiece device will be described with reference to the block diagram shown in FIG. The timepiece device of FIG. 4 has a power supply voltage terminal 1 connected to a commercial power supply (not shown), a waveform shaping circuit 2 including a noise filter connected to the power supply voltage terminal 1, a quartz clock 3, a waveform shaping circuit 2 and It is composed of a microcomputer 4 connected to the quartz clock 3, a display 5 connected to the microcomputer 4, and a power supply circuit 6 such as a battery for supplying power to each circuit. 4 shows the timepiece device portion of the electronic watt-hour meter. The power supply current terminal 7 and the input side are connected to the power supply voltage terminal 1 and the power supply current terminal 7, and the output side is connected to the microcomputer 4. The connected electric energy frequency conversion circuit 8 is also shown.

【0003】つぎに、上記従来の時計装置の動作を説明
する。電源周波数に基づいた電源同期時計は、その周波
数の較差が電力会社によって年間通して補正されている
ので、長期的にみると正確である。波形整形回路2は、
電源電圧を波形整形して電源周波数に比例したパルスを
マイクロコンピュータ4へ出力する。マイクロコンピュ
ータ4は、入力するパルスをカウントして電源同期時計
として時刻をきざむ。また、その時刻を表示器5により
表示する。
Next, the operation of the conventional timepiece device will be described. The power supply synchronous clock based on the power supply frequency is accurate in the long term because the frequency difference is corrected by the electric power company throughout the year. The waveform shaping circuit 2
The power supply voltage is waveform-shaped and a pulse proportional to the power supply frequency is output to the microcomputer 4. The microcomputer 4 counts the input pulses and cycles the time as a power supply synchronized clock. Further, the time is displayed on the display unit 5.

【0004】このような構成のものにおいて、電源にノ
イズが混入すると、たとえ波形整形回路2にノイズフイ
ルタがあったとしても完全に除去できずに、電源同期時
計が進むことになる。なお、停電時には、マイクロコン
ピュータ4は水晶時計3の時刻に切り換える。一方、電
力量周波数変換回路8は、電源電圧および電流を乗算し
て電力量を求め、その電力量を周波数に変換してマイク
ロコンピュータ4へ出力する。マイクロコンピュータ4
は、入力される周波数を積算して積算電力量を計算する
ようになされている。
In such a configuration, if noise is mixed in the power supply, even if the waveform shaping circuit 2 has a noise filter, it cannot be completely removed, and the power supply synchronous clock advances. It should be noted that at the time of power failure, the microcomputer 4 switches to the time of the quartz clock 3. On the other hand, the power amount frequency conversion circuit 8 multiplies the power supply voltage and the current to obtain the power amount, converts the power amount into a frequency, and outputs the frequency to the microcomputer 4. Microcomputer 4
Is designed to integrate input frequencies and calculate integrated electric energy.

【0005】[0005]

【発明が解決しようとする課題】上記説明の従来の時計
装置では、電源にノイズが混入したとき電源同期時計が
進むという問題点があった。この発明は、上記の問題点
を解決するもので、電源にノイズが混入した場合の時計
の進みを防止することができる時計装置を得ることを目
的とする。
The conventional timepiece device described above has a problem that the power supply synchronized timepiece advances when noise is mixed in the power supply. The present invention solves the above problems, and an object thereof is to obtain a timepiece device that can prevent the timepiece from advancing when noise is mixed in the power supply.

【0006】[0006]

【課題を解決するための手段】この発明に係る時計装置
は、以下に述べるような手段を備えたものである。 (1) 電源電圧を波形整形して電源周波数に対応した
パルスを出力する波形整形回路。 (2) 発振器に基づいて時刻を刻むバックアップ用時
計。 (3) 上記パルスをカウントして電源同期時計として
時刻を刻み、一定周期毎に上記バックアップ用時計の時
刻を上記電源周期時計の時刻に合わせ、上記パルスの周
期が基準電源周期より短い場合、上記バックアップ用時
計の時刻に切り換える中央演算処理回路。
The timepiece device according to the present invention comprises the following means. (1) A waveform shaping circuit that shapes the waveform of the power supply voltage and outputs a pulse corresponding to the power supply frequency. (2) A backup clock that keeps time based on an oscillator. (3) Counting the pulses to engrave the time as a power supply synchronized clock, adjust the time of the backup clock to the time of the power supply cycle clock at regular intervals, and if the pulse cycle is shorter than the reference power supply cycle, Central processing circuit that switches to the time of the backup clock.

【0007】[0007]

【作用】この発明においては、波形整形回路によって、
電源電圧が波形整形されて電源周波数に対応したパルス
が出力される。また、中央演算処理回路によって、上記
パルスがカウントされて電源同期時計として時刻が刻ま
れ、一定周期毎にバックアップ用時計の時刻が上記電源
同期時計の時刻に合わせられ、上記パルスの周期が基準
電源周期より短い場合上記バックアップ用時計の時刻に
切り換えられる。
In the present invention, by the waveform shaping circuit,
The power supply voltage is waveform-shaped and a pulse corresponding to the power supply frequency is output. In addition, the central processing circuit counts the above-mentioned pulses to engrave the time as a power supply synchronized clock, adjusts the time of the backup timepiece to the time of the power supply synchronized timepiece at regular intervals, and makes the period of the pulse the reference power supply. If it is shorter than the cycle, the time is switched to the time of the backup clock.

【0008】[0008]

【実施例】【Example】

実施例1.以下、この発明の一実施例を図について説明
する。図1において、電源電圧端子1、水晶時計3、表
示器5〜電力量周波数変換回路8は上記従来装置のもの
と全く同一である。図1におけるこの発明の一実施例
は、上記従来装置の波形整形回路2およびマイクロコン
ピュータ4を、ノイズフイルタを有しない波形整形回路
2Aおよび新しい機能が加わったマイクロコンピュータ
4Aに置き換えたものである。ところで、この発明のバ
ックアップ用時計は、上記この発明の一実施例では水晶
時計3であり、中央演算処理回路は、マイクロコンピュ
ータ4Aである。
Example 1. An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, the power supply voltage terminal 1, the crystal timepiece 3, the display 5 to the power amount frequency conversion circuit 8 are exactly the same as those of the conventional device. In the embodiment of the present invention shown in FIG. 1, the waveform shaping circuit 2 and the microcomputer 4 of the conventional device are replaced with a waveform shaping circuit 2A having no noise filter and a microcomputer 4A having a new function. By the way, the backup timepiece of the present invention is the crystal timepiece 3 in the above-described embodiment of the present invention, and the central processing circuit is the microcomputer 4A.

【0009】つぎに、上記実施例の装置の動作を図2の
波形図および図3のフローチャート図を参照しながら説
明する。図2において、A期間は電源が正常、B期間は
停電、C期間は復電、D期間はノイズが混入、E期間は
正常のそれぞれの状態を示す。
Next, the operation of the apparatus of the above embodiment will be described with reference to the waveform chart of FIG. 2 and the flow chart of FIG. In FIG. 2, the power supply is normal in the period A, the power is cut in the period B, the power is restored in the period C, noise is mixed in the period D, and the state E is normal.

【0010】図3のステップ10において、マイクロコン
ピュータ4Aは、時刻モードを電源周期時計とする。ス
テップ11において、マイクロコンピュータ4Aは、波形
整形回路2Aからのパルスをカウントし、あらかじめ設
定され電源の周波数に対応した電圧周期範囲(基準周
期)、例えば50Hzであれば47.5〜52.5Hzで波形整形回路
2Aがパルスを発生しているかどうかを判断する。図2
のB期間で示すように、パルス発生が基準周期より長い
場合には停電または瞬停と判断しステップ12へ進む。そ
うでない場合はステップ14へ進む。ステップ12〜13にお
いて、時刻モードを水晶時計3とし、一定期間、例えば
図2のC期間で示すように、復電した次の分00秒まで
水晶時計3により時刻を刻む。その後、ステップ10へ戻
る。ステップ14において、図2のD期間に示すように、
パルス発生が基準周期より短い場合にはノイズ混入と判
断しステップ15へ進む。そうでない場合はステップ17へ
進む。ステップ15〜16において、時刻モードを水晶時計
3とし、図2のE期間に示すように、パルス発生が基準
周期に戻った次の分00秒まで水晶時計3により時刻を
刻む。その後、ステップ10へ戻る。ステップ17〜18にお
いて、一定周期毎、例えば1分間毎に水晶時計3へ電源
同期時計の時刻を書き込む。即ち、水晶時計3の時刻の
修正を行う。
In step 10 of FIG. 3, the microcomputer 4A sets the time mode to the power cycle clock. In step 11, the microcomputer 4A counts the pulses from the waveform shaping circuit 2A and sets the waveform shaping circuit in a voltage period range (reference period) preset corresponding to the frequency of the power source, for example, 47.5 to 52.5 Hz for 50 Hz. Determine if 2A is pulsing. Figure 2
When the pulse generation is longer than the reference period, as indicated by the period B, the power failure or the instantaneous power failure is determined and the process proceeds to step 12. If not, proceed to Step 14. In steps 12 to 13, the time mode is set to the crystal timepiece 3, and the time is set by the crystal timepiece 3 until the next minute 00 seconds after the power is restored, for example, as indicated by the period C in FIG. Then, return to step 10. In step 14, as shown in period D of FIG.
If the pulse generation is shorter than the reference period, it is determined that noise is included and the process proceeds to step 15. If not, proceed to step 17. In steps 15 to 16, the time mode is set to the crystal timepiece 3, and the time is set by the crystal timepiece 3 until the next minute 00 seconds after the pulse generation returns to the reference period, as shown in period E of FIG. Then, return to step 10. In steps 17 to 18, the time of the power supply synchronized clock is written in the quartz clock 3 at regular intervals, for example, every one minute. That is, the time of the quartz clock 3 is corrected.

【0011】この発明の一実施例は、上記のように、電
源の周波数に対応した電圧周期範囲をあらかじめ設定し
ておき、基準周期で波形整形回路2Aからパルスが発生
しているときはそれをカウントして時刻を刻むととも
に、一定周期毎例えば1分間毎に水晶時計3へ時刻を書
き込む。パルス発生が基準周期より長い場合、停電ある
いは瞬停と判断し、ある一定期間例えば水晶時計3にて
次の分00秒までまたは復電した次の分00秒まで水晶
時計3により時刻を刻む。パルス発生が基準周期より短
い周期の場合、ノイズが混入したものとみなし上記と同
様に水晶時計3により次の分00秒まで時刻を刻み、基
準周期になれば(正しい周期になれば)その分00秒よ
り電源周波数に同期した時計に切り換える。
In one embodiment of the present invention, as described above, the voltage cycle range corresponding to the frequency of the power supply is set in advance, and when the pulse is generated from the waveform shaping circuit 2A at the reference cycle, it is set. While counting and engraving the time, the time is written in the quartz timepiece 3 at regular intervals, for example, every one minute. When the pulse generation is longer than the reference period, it is determined that there is a power failure or an instantaneous power failure, and the time is kept by the quartz clock 3 until a certain time, for example, the next 00 minutes or the next minute 00 seconds after the power is restored. If the pulse generation is shorter than the reference period, it is considered that noise is mixed and the time is ticked by the quartz clock 3 until the next minute 00 seconds in the same manner as above, and when the reference period is reached (if it becomes the correct period) Switch from 00 seconds to a clock synchronized with the power supply frequency.

【0012】従って、波形整形回路2Aへのノイズが混
入防止のためのノイズフイルタなどの部品が省略できる
とともに、有電圧時には安定した電源周波数を利用し瞬
停、停電時には水晶時計3に切り換え、水晶時計3のみ
の欠点を除去することができるという効果を奏する。と
ころで上記説明では、電子式電力量計に利用する場合に
ついて述べたが、その他の複合機器にも利用できること
はいうまでもない。
Therefore, parts such as a noise filter for preventing noise from being mixed into the waveform shaping circuit 2A can be omitted, and a stable power supply frequency is used when there is a voltage to switch to the quartz clock 3 when a power failure or power failure occurs. This has the effect of eliminating the drawbacks of the timepiece 3 only. By the way, in the above description, the case of using for an electronic watt-hour meter was described, but it goes without saying that it can also be used for other complex devices.

【0013】[0013]

【発明の効果】この発明は、上記説明のように、電源電
圧を波形整形して電源周波数に対応したパルスを出力す
る波形整形回路と、発振器に基づいて時刻を刻むバック
アップ用時計と、上記パルスをカウントして電源同期時
計として時刻を刻み、一定周期毎に上記バックアップ用
時計の時刻を上記電源同期時計の時刻に合わせ、上記パ
ルスの周期が基準電源周期より短い場合上記バックアッ
プ用時計の時刻に切り換える中央演算処理回路とを備え
たので、電源にノイズが混入した場合の時計の進みを防
止することができるという効果を奏する。
As described above, the present invention provides a waveform shaping circuit for shaping the waveform of the power supply voltage and outputting a pulse corresponding to the power supply frequency, a backup timepiece that keeps time based on an oscillator, and the pulse. The clock is counted as a power synchronized clock, and the time of the backup clock is adjusted to the time of the power synchronized clock at regular intervals, and when the pulse cycle is shorter than the reference power cycle, the time of the backup clock is adjusted. Since the central processing unit for switching is provided, it is possible to prevent the timepiece from advancing when noise is mixed in the power supply.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

【図2】この発明の一実施例の波形整形回路の出力パル
スを示す波形図である。
FIG. 2 is a waveform diagram showing output pulses of the waveform shaping circuit according to the embodiment of the present invention.

【図3】この発明の一実施例の動作を示すフローチャー
ト図である。
FIG. 3 is a flowchart showing the operation of the embodiment of the present invention.

【図4】従来の時計装置を示すブロック図である。FIG. 4 is a block diagram showing a conventional timepiece device.

【符号の説明】[Explanation of symbols]

1 電源電圧端子 2A 波形整形回路 3 水晶時計 4A マイクロコンピュータ 5 表示器 1 Power supply voltage terminal 2A Waveform shaping circuit 3 Quartz watch 4A Microcomputer 5 Display

フロントページの続き (72)発明者 池田 修 広島県福山市緑町1番8号 三菱電機株式 会社福山製作所内Front Page Continuation (72) Inventor Osamu Ikeda 1-8 Midoricho, Fukuyama-shi, Hiroshima Mitsubishi Electric Corporation Fukuyama Works

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電源電圧を波形整形して電源周波数に対
応したパルスを出力する波形整形回路と、発振器に基づ
いて時刻を刻むバックアップ用時計と、上記パルスをカ
ウントして電源同期時計として時刻を刻み、一定周期毎
に上記バックアップ用時計の時刻を上記電源同期時計の
時刻に合わせ、上記パルスの周期が基準電源周期より短
い場合上記バックアップ用時計の時刻に切り換える中央
演算処理回路を備えたことを特徴とする時計装置。
1. A waveform shaping circuit that shapes the waveform of a power supply voltage and outputs a pulse corresponding to the power supply frequency, a backup clock that ticks the time based on an oscillator, and a clock that counts the pulses to set the time as a power synchronized clock. A central arithmetic processing circuit that adjusts the time of the backup clock to the time of the power supply synchronous clock at regular intervals and switches to the time of the backup clock when the pulse cycle is shorter than the reference power supply cycle. Characteristic clock device.
JP15474094A 1994-07-06 1994-07-06 Clock device Pending JPH0821884A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15474094A JPH0821884A (en) 1994-07-06 1994-07-06 Clock device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15474094A JPH0821884A (en) 1994-07-06 1994-07-06 Clock device

Publications (1)

Publication Number Publication Date
JPH0821884A true JPH0821884A (en) 1996-01-23

Family

ID=15590893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15474094A Pending JPH0821884A (en) 1994-07-06 1994-07-06 Clock device

Country Status (1)

Country Link
JP (1) JPH0821884A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006340179A (en) * 2005-06-03 2006-12-14 Nippon Telegr & Teleph Corp <Ntt> Time delivery system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006340179A (en) * 2005-06-03 2006-12-14 Nippon Telegr & Teleph Corp <Ntt> Time delivery system

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