JPS6225743Y2 - - Google Patents

Description

[Detailed explanation of the idea] The present invention relates to a digital clock.

Conventionally, digital clocks have been developed that use the AC power frequency as a reference frequency, divide the frequency using a frequency divider circuit, obtain time signals of hours, minutes, and seconds, and display the time digitally. In this type of digital clock, the timekeeping function stops when there is a power outage, and when the power is turned on again, the timekeeping function starts operating from that point.
The correct time is not displayed. Therefore, when there is a power outage and you do not notice it, you may not notice that the clock display is incorrect.

The present invention automatically sounds a buzzer when the power is turned back on after a power outage, alerting the user that there has been a power outage in the past. An embodiment of the present invention will be described below with reference to the drawings. 1 is an AC power supply, 2 is a transformer, 3 is a logic circuit incorporating a frequency dividing circuit, etc.
4 is a display section to which a time signal from the logic circuit 3 is added to display the time; 5 is a reference frequency input terminal of the logic circuit 3 to which the AC power source 1 is input via the transformer 2; 9 is an input terminal to which the DC voltage +B obtained by rectifying and smoothing the AC power supply 1 through the transformer 2, diodes _D1 , _D2 , and capacitor 8 is input;
FAST and SLOW are time adjustment terminals to which DC power +B is input via switches S ₁ and S ₂ , respectively. If you close switch S ₁ and apply DC power +B to the FAST terminal, time will advance at a rate of 1 hour/1 second, and if you close switch S ₂ and apply DC power +B to the SLOW terminal, the time will advance by 1/2. The logic circuit 3 is configured so that time advances at a rate of one minute per second. Also, when both switches S ₁ and S ₂ are closed, the switch
S ₁ takes priority and time advances at a rate of 1 hour/1 second.
Such fast-forwarding of time is performed by directly applying a 1/2 Hz or 1 Hz frequency signal to a frequency divider circuit that generates a "minute" or "hour" time signal. 10
is a flip-flop circuit consisting of two transistors Q ₁ and Q ₂ , and a DC voltage +B is applied to the emitters of both transistors Q ₁ and Q ₂ and the base of transistor Q ₁ .
is applied to the base of the transistor _Q2 , and a DC voltage +B is applied to the base of the transistor Q2 via the switches _S1 and _S2 and the diodes _D3 and _D4 . 6 is the buzzer signal generation circuit, and voltage +B is the switching transistor Q ₃
and input via diode _D5 . Switching transistor _Q3 is controlled by flip-flop circuit 10, and the collector voltage of transistor _Q2 is applied to the base of transistor _Q3 . The constants of the flip-flop circuit 10 are determined so that when the flip-flop circuit 10 is energized, the transistor Q ₁ is turned on and the transistor Q ₂ is turned off. Reference numeral 7 denotes a radio receiver, which generates a buzzer sound through its speaker SP when a buzzer signal is sent from the buzzer signal generating circuit 6. The output of the switching transistor _Q3 is also applied to the radio receiver 7 via the diode _D6 to supply power.

Next, the operation of the above configuration will be explained. When a power outage occurs, the power supplied to the secondary side of the transformer disappears,
All functions will stop. When power is turned on again, the timekeeping function starts operating, but the displayed time is inaccurate. At this time, the flip-flop circuit 10
The transistor Q ₁ is turned on, the transistor Q ₂ is turned off, and the transistor Q ₃ is turned on. Therefore, the DC voltage +B is input to the buzzer signal generation circuit 6 through the diode _D5 , and the speaker of the radio receiver 7
The SP emits a buzzer sound. This buzzer alerts you that there was a power outage in the past and that the current displayed time is incorrect.

So, in order to set the time accurately, I turned on the switch.
When S ₁ or S ₂ is closed, fast forwarding of the display time starts, and at the same time, DC voltage +B is applied to the collector of transistor Q ₁ and the base of transistor Q ₂ via diode D ₃ or D ₄ , and the transistor
Turn off Q ₁ and turn on Q ₂ . Therefore, transistor Q ₃ controlled by transistor Q ₂ is turned off, and the supply of voltage +B to buzzer signal generation circuit 6 is cut off. Therefore, the generation of the buzzer sound stops.

As explained above, according to the present invention, when the power is turned on again after a power outage, a buzzer sound is generated to notify that the displayed time is incorrect, so the user does not notice that there has been a power outage. Therefore, the disadvantage of not noticing that the display time is incorrect is eliminated. Furthermore, since the time adjustment switch simultaneously stops the generation of the buzzer sound, there is an advantage that there is no need to provide a dedicated switch for the buzzer.

[Brief explanation of the drawing]

The figure is a circuit diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...AC power supply, 2...Transformer, 3...Logic circuit, 4...Display section, 10...Flip-flop circuit, 6...Buzzer signal generation circuit, 7...Radio receiver.

Claims (1)

[Scope of utility model registration request] Using the commercial AC power frequency as the reference frequency, this frequency is divided by a frequency dividing circuit to obtain a time signal, and the time such as hours and minutes is displayed.When the power is re-energized after a power outage, all circuits operate normally. and a digital clock that notifies the user of a power outage by a buzzer or other alarm, a switching element that detects and activates when the power is turned on again after a power outage, and an alarm signal generating circuit that is activated by switching on the element. A digital timepiece comprising: a time adjustment switch that inputs a high frequency signal to the frequency dividing circuit to rapidly advance time counting; and the switching element is turned off by actuation of the time adjustment switch.