JPH0385013A - Chopper type comparator - Google Patents

Abstract

PURPOSE:To attain low power consumption in the standby mode by providing a current interrupt switch connecting in series with a P-channel MOS transistor(TR) and an N-channel MOS TR and controlled to be OFF only in the standby mode. CONSTITUTION:A chopper type comparator has a switch circuit 11 switching a reference voltage V1 and an input voltage V2. A coupling capacitor 12 connects to the output of the switch circuit 11. An inverter 13 is constituted by a complementary MOS comprising a PMOS 13a and an NMOS 13b connected in series between a power supply voltage and a ground voltage VSS. A short- circuit switch 14 short-circuits input and output of the inverter 13 at the input of the reference voltage V1. Moreover, an NMOS 15 connects in series with the PMOS 13a and the NMOS 13b and the NMOS 15 is turned off by a standby control signal SB applied to a standby mode terminal 15a.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention is used in integrated analog/digital converters, etc., and is a complementary MOS transistor (hereinafter referred to as CMO
The present invention relates to a chopper-type comparator using an inverter having an inverter configuration, particularly a chopper-type comparator that achieves low power consumption in standby mode.

(Conventional technology) Conventionally, technologies in this field include ■Nikkei Electronics (1987-1>Nikkei McGraw-Hill Co., Ltd., 8-bit MO3 ICA-D converter JP, 159-162, making full use of electrified balanced comparator, ■ JP-A No. 60-65613, ■ JP-A No. 60-119120, ■ JP-A-61
There were those described in JP-A-288615 and the like. The configuration will be explained below using figures.

FIG. 2 is a circuit diagram showing an example of the configuration of the conventional chopper type comparator described in the above-mentioned document (2).

This chopper type comparator has a switch circuit section for switching between the reference voltage (1) and the input voltage V2. The switch circuit 1 is composed of switches a and lb, and the output side is connected to the input side of an inverter 3 via a coupling capacitor 2. Furthermore, the inverter 3 has P
A channel type MOS transistor (hereinafter referred to as PMO3>3a) and an N channel type MOS transistor (hereinafter referred to as NM
It is composed of CMO8 with >3b called O8, and its PMO
33a and NMO83b are connected to power supply voltage VCC and ground voltage V
It is connected in series with SS.

A short circuit switch 4 is connected between the input and output of the inverter 3, and an output terminal 5 for an output voltage vO is connected to the output side of the inverter 3.

Next, the operation will be explained.

This chopper type comparator first performs initialization in order to determine the magnitude of the reference voltage V1 and the input voltage (2). During this initialization period, the capacitor 2 is charged and discharged with the reference voltage 1 and the threshold voltage VT of the inverter 3 by turning on the switches 1a and 4 and turning off the switch 1b.

As a result, the input side of the capacitor 2 becomes the reference voltage V1, and the input and output rules of the inverter 3 are each stabilized at the threshold voltage VT.

Subsequently, during the comparison operation, the switches 1a and 4 are turned off, and the switch 1b is turned on. At this time, if V1=■2,
There is no change in potential, and the output voltage Vo at the output terminal 5 is also stable at the threshold voltage VT, as in the initialization period. However, if Vl<V2, the input voltage of the inverter 3 increases and becomes higher than the threshold voltage 1'. Therefore, the voltage at the output terminal 5 is lower than the voltage VT during the initialization period,
The output voltage Vo becomes a defined logic state.

Conversely, if Vl>V2, the input voltage of inverter 3 decreases and becomes lower than the threshold voltage ■]゛.
The output voltage Vo becomes higher than the voltage during the initialization period, and Vl
The logic state is opposite to that when <V2. In this way,
A comparison can be made between the reference voltage V1 and the unknown input voltage (2).

(Problems to be Solved by the Invention) However, the chopper type comparator having the above configuration has the following problems.

In a device in which this chopper type comparator is built into, for example, a microcomputer (hereinafter referred to as microcomputer), when the device is placed in a stopped state, usually called standby mode or power down mode,
Even if the power supply voltage is applied, the microcomputer operation is stopped. At this time, since the input voltage of the comparator is stopped in an undefined state, the PMO 83a and NIVIO 83b are in a half-on state in the inverter 3 in the comparator, and a through current flows between the power supply voltage VCC and the ground voltage VSS. This poses a problem in that even if an attempt is made to significantly reduce power consumption during standby mode, the reduction in power consumption is hindered.

Here, the standby mode is one of the important functions in a system such as a microcomputer, and will be explained using, for example, a case where an automobile control system is configured with a microcomputer.

When a microcomputer is used to control a car, when the car is being driven, the microcomputer enters the operating state by inserting the engine key. Conversely, when the car is not in use, it is necessary to put the microcomputer into standby mode by removing the key.

In the memory section (static RAM, etc.) in the microcontroller,
For example, various data are stored in order to store the operating state and use that data to operate the device when restarting, or to store abnormal data when an abnormality is detected. The car uses a 12v battery, and the battery is charged by a generator while driving. However, as mentioned above, if you want to leave data in the memory in the microcomputer, you cannot turn off the power to the vehicle control electronic equipment.

Therefore, it is necessary to operate only the minimum necessary circuit parts to reduce power consumption as much as possible. If the current consumption is high at this time, the battery discharge time will be shortened when the car is not in use, and the battery will have to be removed every time the car is stored or imported or exported, which poses a serious problem. . - As an example, if the current consumption of the electronic unit when stopped is 30 mA, the battery will discharge in 1 to 2 months and become unusable.

Therefore, the microcomputer has a standby mode, which stops the crystal oscillation circuit and fixes the internal state.

The memory section stops while retaining data, and in CMOS microcontrollers that are composed entirely of digital circuits, only leakage current (for example, 1 μA or less) flows.However, as a recent trend, analog/digital converters (hereinafter referred to as A/D converter), or digital/
Microcomputers that incorporate analog circuits such as analog converters and are integrated into a single chip are often used, and as mentioned above, current consumption during standby mode has become a problem in the comparator section used in the A/D converter.

Further, when the gain of the inverter 3 is increased in order to improve the operating speed of the comparator and increase the speed, there is also the problem that the current consumption further increases.

The present invention solves the problem that the conventional technology has, in that it impedes the reduction in power consumption during standby mode.
The present invention provides a chopper type comparator that solves the problem of increased power consumption in standby mode when increasing speed.

(Means for Solving the Problems) According to the present invention, in order to solve the above problems, a switch circuit that switches between an input reference voltage and an input voltage;
a coupling capacitor connected to the output side of the switch circuit; and an inverter having a complementary MOS transistor configuration including a P-channel MOS transistor and an N-channel MOS transistor connected in series between a power supply voltage and a ground voltage; The chopper type comparator includes a short-circuit switch for short-circuiting between the input and output of the inverter when the reference voltage is input, and the following measures are taken.

One or more current cutoff switches are connected in series to the P-channel MOS transistor and the N-channel MOS transistor, and are controlled to be turned off only in standby mode.

(Function) According to the present invention, since the chopper type comparator is configured as described above, the current interrupting switch is turned on in the normal mode, thereby enabling the inverter to operate. Further, by being in the off state in the standby mode, the current path between the power supply voltage VCC and the ground voltage SS in the inverter is cut off, and a through current is prevented.

Therefore, the above problem can be solved.

(Embodiment) FIG. 1 is a circuit diagram of a chopper type comparator showing a first embodiment of the present invention.

This chopper type comparator has a switch circuit 11 for switching between the reference voltage (1) and the input voltage V2. The switch circuit 11 has an input terminal 1 for the reference voltage ■1.
It includes a switch lla connected between 0a and node N1, and a switch llb connected between input end 10b for input voltage V2 and node N1. The output side node N1 of the switch circuit 11 is connected to one end of the coupling capacitor 12, and the other end of the coupling capacitor 12 is connected to the node N2.
are respectively connected to the input side of the inverter 13. A short-circuit switch 14 is connected between the input and output of the inverter 13, that is, the node N2 and the output terminal 6.

Inverter 13 includes PMO813a and NMO313b, each gate of which is connected to the other end of coupling capacitor 2.
It is composed of 8 CMOs consisting of. That PMO31
The source of 3a is connected to the power supply voltage VCC, and the drain is connected to NMO8.
It is connected to the drain of 13b. Furthermore, NMO3
NMO81 where the source of 13b is a current cutoff switch
5, the source of NMO815 is connected to the ground voltage VS
Each is connected to S. Moreover, the gate of NMO 815 is connected to standby mode terminal 15a for standby control signal SB. And PMO813a
and N] Each drain of the VIO 313b is connected to the output terminal 16.

Next, the operation will be explained.

(A) Operation in normal mode When the standby mode terminal 15a is connected to the power supply voltage VCC, for example,
The "H" level of is applied to turn on the NMO 815.

This makes the inverter 13 ready for operation. Next, switch lla and 14 are turned on, and switch llb is turned on.
By turning off the input voltage V1, initialization is performed to determine the magnitude of the reference voltage V1 and the input voltage V2. During this initialization period,
The input and output of the inverter 13 are short-circuited, and the inverter 13
With a threshold voltage Vt of , node N2 and output terminal 1
6 is biased. Furthermore, the node N1 is at the reference voltage ■
Biased at 1. As a result, the coupling capacitor 12
The voltage at nodes Nl and N2, which are both ends of the reference voltage ■1,
Each is determined by the threshold voltage Vt.

Next, switch lla, 14 is turned off, switch llb
By turning on, a comparison operation is performed to determine the magnitude of reference voltage (1) and input voltage (2).

If it is Vl-V2, there is no change in the potential, and the output voltage 0 at the output terminal 16 is also stable at the threshold voltage Vt as in the initialization period. However, if Vl<V2,
Since there is no place for the charges to escape, the potential difference across the coupling capacitor 12 does not change, and the inverter 1 only changes by the difference of V2-Vl.
The voltage at the input side node N2 of No. 3 rises and becomes higher than the threshold voltage Vt. Therefore, the voltage at the output terminal 16 is lower than the voltage Vt during the initialization period, and the output voltage VO becomes the determined logic state "Ll+ level."

Conversely, if Vl>V2, the input voltage of the inverter 13 similarly decreases by the difference between Vl and V2, and becomes lower than the threshold voltage Vt. Therefore, the output voltage Vo becomes higher than the voltage during the initialization period, and the logic state is ``H1+H1+ level'' which is opposite to that when Vl<V2.
A comparison can be made between the reference voltage V1 and the unknown input voltage V2.

(Open) Operation in standby mode When the standby mode terminal 15a is connected to the ground voltage vSS, for example,
Applying the “L” level standby control signal SB of N
Turn off MO815. As a result, even if the comparator stops at any timing in the series of operations in normal mode, the power supply voltage CC and ground voltage VSS
The current path between the two can be completely cut off, and theoretically there is no current consumption.

By the way, in order to transmit the comparison result to the output terminal 16,
It is often connected to digital circuits such as inverters and latch circuits. In that case, the output terminal 16 is in an undefined state during standby mode. Even if the output terminal 16 is in an undefined state, the output terminal 16 can be pulled up or pulled down only in standby mode, or an analog switch can be used to prevent current from flowing, so that current consumption does not flow in the next stage digital circuit. It is necessary to consider such things as

This embodiment has the following advantages.

(1) In conventional circuits, in order to reduce current consumption during standby mode, it is necessary to determine the logic level and
In order to avoid a half-on state, it is necessary to pull up/down the voltage on the input side of the inverter to the power supply voltage VCC or ground voltage SS. Or it is necessary to turn off the short-circuit switch at the same time. For example, you can connect NMO8 for pull-down to the input side of the inverter, which turns on only in standby mode, or connect PMO8 for pull-up.
It is also possible to connect. In this case, by pulling up or pulling down the input side of the inverter and turning off the shorting switch, it is possible to reduce the current consumption during standby mode.

However, when pull-up or pull-down means are used in this way, the input side of the inverter and the power supply voltage VCC
Alternatively, a parasitic capacitance CP is added between the capacitor and the ground voltage VSS, and charge distribution occurs between the coupling capacitor and the parasitic capacitor CP during a normal mode comparison operation. This reduces the voltage change on the input side of the inverter when switching from the initialization period to the comparison operation. Therefore, the change in the output voltage Vo also becomes small, and if the voltage difference between the reference voltage Vl and the input voltage V2 is minute, there is a drawback that a normal comparison operation cannot be obtained.

Therefore, in a comparator used in a high-resolution A/D converter of 10 bits or more, the parasitic capacitance CP must be made as small as possible. The problem was that it was not possible to use

In this embodiment, a current interrupting N is provided between the power supply voltage VCC and the ground voltage VSS, which is turned off during standby mode.
Since the MOS 15 is connected, it is possible to reduce power consumption while maintaining a high degree of comparison accuracy without adding the above-mentioned extra parasitic capacitance JICP to the input side of the inverter 13.

(2) In the standby mode, when the output terminal 16 is pulled up or pulled down using a MOS transistor or the like, a parasitic capacitance is added to the output terminal 16.

However, since the shorting switch 14 is turned off during the comparison operation, its parasitic capacitance does not affect the coupling capacitor 12 at all.

(3) Since the through current of the inverter 13 is prevented during standby mode, current consumption during standby mode can be reduced. Therefore, if the present invention is applied to a comparator for an A/D converter built into a microcomputer or the like having a standby function, it becomes possible to reduce the power consumption of automobiles, electronic devices, etc. that use batteries.

FIG. 3 is a circuit diagram of a chopper type comparator according to a second embodiment of the present invention, and elements common to those in FIG. 1 are given the same reference numerals.

This chopper type comparator is an NMOS shown in Figure 1.
The NMOS 15, which is a current cutoff switch, connected between the source of
The structure is connected in series between the drain of NMO8I3b and the drain of NMO8I3b, and has the same effect as the first embodiment.

FIG. 4 is a circuit diagram of a chopper type comparator according to a third embodiment of the present invention, and elements common to those in FIG. 1 are given the same reference numerals.

This chopper type comparator is an NMOS shown in Figure 1.
PMO815-
In this configuration, the source of the PMO 815-1 is connected to the power supply voltage VCC, and the drain is connected to the source of the PMO 313a.

To enter standby mode, connect standby mode terminal 1
5a, a standby control signal SB of o H++ level, which is the power supply voltage VCC, is applied to the PMO 815-1.
It is sufficient to turn off the current path between the power supply voltage CC and the ground voltage VSS. Other than that, this embodiment has the same effects as the first embodiment.

FIG. 5 is a circuit diagram of a chopper type comparator according to a fourth embodiment of the present invention, and elements common to those in FIGS. 1 and 4 are given the same reference numerals.

This chopper type comparator is connected to the power supply voltage VC in Fig. 4.
PMO connected between C and the source of PMO813a
815-1, the drain of PMO813a and NMOS1
3b, and has the same effect as the third embodiment.

Note that the present invention is not limited to the illustrated embodiment, and various modifications are possible. Examples of such modifications include the following.

(a> The current cutoff switch in the first, second, third, and fourth embodiments includes an NMOS15 or PMO815-1 switch between the power supply voltage CC and the ground voltage SS.
For example, between the power supply voltage CC and the output terminal 16, or between the output terminal 16 and the ground voltage VSS.
A two-stage configuration may be used in which NMO3 and PMO8 are respectively connected between.

Furthermore, a configuration with two or more stages is also possible.

(b) Paragraph 1 above. In the second, third, and fourth embodiments, the switch circuit 11 uses a switch 1la11b, but a selector or the like may also be used, for example.

(C) In the first, second, third, and fourth embodiments described above, a MOS transistor is used as the current cutoff switch, but a junction field effect transistor or other switching means may be used, for example.

(Effects of the Invention) As described above in detail, according to the present invention, a current interrupting switch for interrupting the current path between the power supply voltage and the ground voltage is provided, and the current interrupting switch is provided in the standby mode. Since the inverter is controlled to be turned off and turned on in the normal mode, it is possible to prevent a through current in the inverter, and it is possible to extremely reduce current consumption in the standby mode.

Furthermore, since the through-f1 current can be prevented without adding extra parasitic capacitance to the input side of the inverter, circuit design is facilitated, and a high degree of comparison accuracy can be maintained.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a chopper type comparator showing a first embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional chopper type comparator, and FIG. 3 is a chopper type comparator showing a second embodiment of the present invention. FIG. 4 is a circuit diagram of a chopper type comparator showing a third embodiment of the present invention, and FIG. 5 is a circuit diagram of a chopper type comparator showing a fourth embodiment of the present invention. 11... Switch circuit, 12... Coupling capacitor, 13... Inverter, 13a.
Song/PMO8,13b...NMO8,14...
...Short circuit switch, 15.15-4...
Current cutoff switch, VCC...Power supply voltage, V
SS: Ground voltage, ■1: Reference voltage, V2: Input voltage, SB: Standby control signal, Vo: Output Voltage.

Claims (1)

[Claims] A switch circuit that switches between an input reference voltage and an input voltage, a coupling capacitor connected to the output side of the switch circuit, and a P connected in series between a power supply voltage and a ground voltage. A chopper comparator comprising an inverter having a complementary MOS transistor configuration including a channel type MOS transistor and an N-channel type MOS transistor, and a shorting switch for shorting between the input and output of the inverter when the reference voltage is input, A chopper type comparator, comprising: one or more current cutoff switches connected in series to the P-channel MOS transistor and the N-channel MOS transistor, and controlled to be turned off only in standby mode.