JPH0382092A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH0382092A JPH0382092A JP21898889A JP21898889A JPH0382092A JP H0382092 A JPH0382092 A JP H0382092A JP 21898889 A JP21898889 A JP 21898889A JP 21898889 A JP21898889 A JP 21898889A JP H0382092 A JPH0382092 A JP H0382092A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- gauge
- dicing
- integrated circuit
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 22
- 238000012790 confirmation Methods 0.000 abstract description 3
- 238000005259 measurement Methods 0.000 abstract description 3
- 230000000007 visual effect Effects 0.000 abstract 1
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 235000019219 chocolate Nutrition 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は絶縁基板の表・裏両面にパターンを有する混成
集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hybrid integrated circuit having patterns on both the front and back surfaces of an insulating substrate.
梱数集積回路用の絶縁基板では、表・裏のパターンの相
対的ズレが電気的特性に影響するので、特に基板の切断
位置とパターンのズレが問題である。In insulating substrates for integrated circuits, the relative misalignment between the front and back patterns affects the electrical characteristics, so misalignment between the cutting position of the board and the pattern is particularly problematic.
従来より、絶縁板基板の表・裏パターンの相対的は位置
ズレの確認については、基板の端部がらのパターンの距
離を基板衣・裏について測定し、その差により表・裏パ
ターンの相対的なズレを判断するという方法がとられて
いた。Conventionally, to check the relative positional deviation of the front and back patterns of an insulating board, the distance of the pattern from the edge of the board to the board cover and back has been measured, and the difference is used to check the relative position of the front and back patterns. The method used was to determine the discrepancy.
絶縁基板の分割方法は、チョコレートブレーク法、レー
ザースクライプ法、ダイシング法等が従来より実施され
ているが、その作業性について一長一短があり、適用す
る製品の特質に応じて使い分けられていた。Conventional methods for dividing insulating substrates include the chocolate breaking method, laser scribing method, and dicing method, but these methods have advantages and disadvantages in terms of workability, and are used depending on the characteristics of the product to which they are applied.
なかでも寸法精度の良い分割方法としてはダイヤモンド
ブレードを使ったダイシングであり、表面パターンのズ
レを測定する場合には、ダイシングにより分割した基板
端部からパターンまでの寸法を、表・裏それぞれに対し
測定することにょリ、表・裏パターンの相対的ズレを確
認する方法が実施されている。Among them, dicing using a diamond blade is a dividing method with good dimensional accuracy.When measuring the deviation of the surface pattern, measure the dimension from the edge of the substrate divided by dicing to the pattern for each of the front and back sides. During measurement, a method is used to check the relative deviation of the front and back patterns.
この方法では表・裏及びＸ−Ｙ方向の測定がそれぞれ必
要なため、極めて複雑な作業となる欠点があった。This method has the drawback that it requires measurements in the front, back, and X-Y directions, making the work extremely complicated.
第３図に示すように、１は例えばセラミック等より作ら
れた絶縁基板１であり、２，３はそれぞれ基板１の表面
、裏面に形成された表裏パターン２及び裏面パターン３
である。As shown in FIG. 3, 1 is an insulating substrate 1 made of ceramic or the like, and 2 and 3 are front and back patterns 2 and back patterns 3 formed on the front and back surfaces of the substrate 1, respectively.
It is.
４はダイヤモンドブレード等によりダイシングされた基
板１の端部４である。Reference numeral 4 denotes an end portion 4 of the substrate 1 diced with a diamond blade or the like.
ここで、表面パターン２及び裏面パターン３の相対ズレ
を確認する方法を説明する。Here, a method for checking the relative displacement between the front pattern 2 and the back pattern 3 will be explained.
基板１の表面及び裏面に対し直角に端部４がダイシング
されているものヒして、その端部４の表面側、裏面側の
端部４を起点としてパターンの端部までの距離ａ、ｂ、
ｃ、ｄを投影型顕微鏡等で測定し、表面パターン２．裏
面パターン３の中心の位置を（ａ −ｂ ） ／ ２
、 （ｃ −ｄ ） ／ ２として求め、さらにこれ
らの値の差は表面パターン２及び裏面パターン３のズレ
としていた。If the edge 4 is diced perpendicularly to the front and back surfaces of the substrate 1, the distances a and b from the edge 4 on the front and back sides of the substrate 1 to the edge of the pattern are ,
c and d are measured using a projection microscope, etc., and the surface pattern 2. The center position of back pattern 3 is (a - b) / 2
, (c-d)/2, and the difference between these values was taken as the shift between the front pattern 2 and the back pattern 3.
従って、上述した表・裏パターンの相対的位置ズレの確
認方法では、表・裏のパターンに対し４か所、さらにＸ
方向、Ｙ方向の確認が必要な場合は、合計８か所の寸法
測定及びそれらに応じたデータの処理及び判定作業が必
要である。Therefore, in the above-mentioned method of checking the relative positional deviation of the front and back patterns, there are four locations for the front and back patterns, and
If it is necessary to confirm the direction and the Y direction, it is necessary to measure dimensions at eight locations in total and process and judge the data accordingly.
本発明の混成集積回路は、絶縁基板の表・裏画面に設け
たパターンを有する混成集積回路番こおいて、前記絶縁
性基板の基板端部の表・裏画面の少くとも一面に階段状
パターンゲージを設け、前記絶縁基板がダイシング法に
より分割されて、前記基板端部が前記階段状パターンゲ
ージのどこを通るかを測定することにより、表・裏のパ
ターンの相対的位置ズレを判定するこヒを特徴とする混
成集積回路を含んで構成されている。The hybrid integrated circuit of the present invention has a pattern provided on the front and back screens of an insulating substrate, wherein a step-like pattern is provided on at least one surface of the front and back screens at the edge of the insulating substrate. A gauge is provided, the insulating substrate is divided by a dicing method, and the relative positional shift of the front and back patterns is determined by measuring where the edge of the substrate passes through the stepped pattern gauge. It is constructed by including a hybrid integrated circuit characterized by H.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の第１の実施例の平面図である。FIG. 1 is a plan view of a first embodiment of the invention.
絶縁基板１の表面（或いは裏面）の端部４の近くに位置
ズレ確認用の階段状パターンゲージらが設けられており
、ダイシングされた端部４の位置に応じて階段状のパタ
ーンゲージ５の一部が端部４に近い方から破線に示すよ
うに欠落するようになっており、その欠落する位置によ
り、ダイシングの位置とパターンのズレが目視により確
認することが可能である。A stepped pattern gauge for checking positional deviation is provided near the edge 4 on the front (or back) of the insulating substrate 1, and a stepped pattern gauge 5 is installed in accordance with the position of the diced edge 4. A portion is missing from the side closer to the end portion 4 as shown by the broken line, and the position of the missing portion makes it possible to visually confirm the misalignment between the dicing position and the pattern.
同様のパターンゲージ５を反対側にも設けることにより
、表・裏にある階段状パターンゲージ５のどの位置が欠
落しているかを確認するこヒにより、表・裏パターンゲ
ージのそれぞれヒダイシングされた位置のズレが分るの
で、表面、裏面ノくターンの相対ズレが目視により分る
。By providing a similar pattern gauge 5 on the opposite side, it is possible to check which position of the stepped pattern gauge 5 on the front and back sides is missing. The relative deviation between the front and back turns can be seen visually.
階段状パターンゲージ５の階段部の高さを表・裏それぞ
れのパターンのズレの要求精度より小さくすることによ
り、表・裏パターンの相対ズレについて判定することが
可能である。By making the height of the step part of the stepped pattern gauge 5 smaller than the required precision for the deviation of the front and back patterns, it is possible to determine the relative deviation of the front and back patterns.
例えば、ズレの要求精度±０．１ｍ／ｍにより階段の高
さを０．０２ｍｍとすると、表・裏でダイシングの位置
が横切る線が階段の位置に通して例えば４つ以内であれ
ば規格以内であると計数化することが判定できる。For example, if the height of the stairs is 0.02 mm due to the required misalignment accuracy of ±0.1 m/m, it is within the standard if there are no more than 4 lines across the dicing position on the front and back through the stairs position. It can be determined that it can be digitized.
第２図は本発明の第２の実施例を示す平面図である。FIG. 2 is a plan view showing a second embodiment of the invention.
本実施例では階段状パターンゲージ５ａの階段状の線幅
を細くした斜線に示す抵抗層６を設けると共に、その抵
抗部の抵抗値が測定できる電極７、〜７ｆを設けである
。In this embodiment, a resistance layer 6 shown by diagonal lines in which the stepped line width of the stepped pattern gauge 5a is narrowed is provided, and electrodes 7, to 7f are provided for measuring the resistance value of the resistance portion.
この例では、各電極間の抵抗値を順次測定することによ
り、ダイシングの位置が測定した抵抗値の異常ヒなって
表われることにより、パターンに対するダイシングの位
置が分るので、この作業を表・裏について実施すること
により、表・裏パターンの相対ズレの確認が抵抗値の測
定を行なう作業に置き替えられ容易になるという利点が
ある。In this example, by sequentially measuring the resistance value between each electrode, the dicing position will appear as an abnormality in the measured resistance value, and the dicing position relative to the pattern can be determined. By performing this on the back side, there is an advantage that checking the relative shift between the front and back patterns can be replaced with the work of measuring the resistance value, making it easier.
ダイシング前に各電極７．〜７１間の抵抗値を計測して
おくと、ダイシング後の計装置と比較して、極めて容易
に判定することが可能となる。7. Each electrode before dicing. By measuring the resistance value between 71 and 71, it becomes possible to determine it extremely easily by comparing it with the measuring device after dicing.
又ダイシング前に各電極間の抵抗値を一定値にトリミン
グ法により調整しておくと、ダイシング後の抵抗値の変
化の位置がより明確に判定することが可能になる。Furthermore, if the resistance value between each electrode is adjusted to a constant value by a trimming method before dicing, it becomes possible to more clearly determine the position of change in resistance value after dicing.
Ｘ、Ｙ両方法の確認が必要な場合に、それぞれのパター
ンの対とＸ方向Ｙ方向に必要なことは第１及び第２の実
施ともに同じである。When confirmation using both the X and Y methods is required, the requirements for each pair of patterns and the X and Y directions are the same for both the first and second implementations.
以上説明したように本発明は、位置ズレ確認用パターン
を本来のパターンを作ると同時に作ることにより、表・
裏画面にあるパターンの相対的位置ズレの確認が、パタ
ーンゲージの位置を寸法的に測定するのではなく、パタ
ーンゲージ目視により確認又は抵抗値の測定に置き替え
られるという効果がある。As explained above, the present invention creates the positional deviation confirmation pattern at the same time as creating the original pattern, thereby making it possible to
There is an effect that the relative positional shift of the pattern on the back screen can be confirmed by visually checking the pattern gauge or by measuring the resistance value instead of measuring the position of the pattern gauge dimensionally.
第１図は本発明の第１の実施例を示す平面図、第２図は
本発明の第２の実施例を示す平面図、第３図は従来の混
成集積回路の絶縁基板の一例の断面図である。
１・・・絶縁基板、２・・・表面パターン、３・・・裏
面パターン、４・・・端部、５，５．・・・階段状パタ
ーンゲージ、６・・・抵抗部、７．〜７ｆ・・・電格。Fig. 1 is a plan view showing a first embodiment of the present invention, Fig. 2 is a plan view showing a second embodiment of the invention, and Fig. 3 is a cross section of an example of an insulating substrate of a conventional hybrid integrated circuit. It is a diagram. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Surface pattern, 3... Back pattern, 4... End part, 5,5. ... Stepped pattern gauge, 6... Resistance section, 7. ~7f... Electric rating.
Claims (1)
集積回路において、前記絶縁性基板の基板端部の表・裏
両面の少くとも一面に階段状パターンゲージを設け、前
記絶縁基板がダイシング法により分割されて、前記基板
端部が前記階段状パターンゲージのどこを通るかを測定
することにより、表・裏のパターンの相対的位置ズレを
判定することを特徴とする混成集積回路。In a hybrid integrated circuit having a pattern provided on both the front and back surfaces of an insulating substrate, a stepped pattern gauge is provided on at least one surface of both the front and back sides of the substrate edge of the insulating substrate, and the insulating substrate is formed by a dicing method. A hybrid integrated circuit characterized in that the relative positional deviation of the front and back patterns is determined by dividing the substrate and measuring where on the stepped pattern gauge the end of the substrate passes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21898889A JPH0382092A (en) | 1989-08-24 | 1989-08-24 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21898889A JPH0382092A (en) | 1989-08-24 | 1989-08-24 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0382092A true JPH0382092A (en) | 1991-04-08 |
Family
ID=16728510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21898889A Pending JPH0382092A (en) | 1989-08-24 | 1989-08-24 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0382092A (en) |
-
1989
- 1989-08-24 JP JP21898889A patent/JPH0382092A/en active Pending
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