JPH0381297B2 - - Google Patents
Info
- Publication number
- JPH0381297B2 JPH0381297B2 JP62032504A JP3250487A JPH0381297B2 JP H0381297 B2 JPH0381297 B2 JP H0381297B2 JP 62032504 A JP62032504 A JP 62032504A JP 3250487 A JP3250487 A JP 3250487A JP H0381297 B2 JPH0381297 B2 JP H0381297B2
- Authority
- JP
- Japan
- Prior art keywords
- groove
- film
- trench
- polycrystalline silicon
- coating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 22
- 239000004065 semiconductor Substances 0.000 claims description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 150000002500 ions Chemical class 0.000 claims description 20
- 239000011248 coating agent Substances 0.000 claims description 18
- 238000000576 coating method Methods 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 17
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- 230000001590 oxidative effect Effects 0.000 claims 1
- 239000012535 impurity Substances 0.000 description 31
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 239000003990 capacitor Substances 0.000 description 10
- 238000005468 ion implantation Methods 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- 230000007423 decrease Effects 0.000 description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000002955 isolation Methods 0.000 description 4
- UMVBXBACMIOFDO-UHFFFAOYSA-N [N].[Si] Chemical compound [N].[Si] UMVBXBACMIOFDO-UHFFFAOYSA-N 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Landscapes
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62032504A JPS63200528A (ja) | 1987-02-17 | 1987-02-17 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62032504A JPS63200528A (ja) | 1987-02-17 | 1987-02-17 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63200528A JPS63200528A (ja) | 1988-08-18 |
| JPH0381297B2 true JPH0381297B2 (fr) | 1991-12-27 |
Family
ID=12360818
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62032504A Granted JPS63200528A (ja) | 1987-02-17 | 1987-02-17 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63200528A (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5874346A (en) * | 1996-05-23 | 1999-02-23 | Advanced Micro Devices, Inc. | Subtrench conductor formation with large tilt angle implant |
| US5767000A (en) * | 1996-06-05 | 1998-06-16 | Advanced Micro Devices, Inc. | Method of manufacturing subfield conductive layer |
| KR101626565B1 (ko) * | 2008-10-31 | 2016-06-01 | 어플라이드 머티어리얼스, 인코포레이티드 | Ｐ3ｉ 챔버에서 등각 도핑의 개선 |
-
1987
- 1987-02-17 JP JP62032504A patent/JPS63200528A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63200528A (ja) | 1988-08-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4786954A (en) | Dynamic ram cell with trench surrounded switching element | |
| US4688063A (en) | Dynamic ram cell with MOS trench capacitor in CMOS | |
| US7405455B2 (en) | Semiconductor constructions and transistor gates | |
| US5410176A (en) | Integrated circuit with planarized shallow trench isolation | |
| US5164806A (en) | Element isolating structure of semiconductor device suitable for high density integration | |
| EP0167764B1 (fr) | Cellule RAM dynamique | |
| US5492851A (en) | Method for fabricating attached capacitor cells in a semiconductor device having a thin film transistor | |
| US6063694A (en) | Field-effect transistor with a trench isolation structure and a method for manufacturing the same | |
| JPS63120462A (ja) | １デバイス型メモリ・セルの製造方法 | |
| US5290726A (en) | DRAM cells having stacked capacitors of fin structures and method of making thereof | |
| US5470776A (en) | Method for fabricating stacked dynamic random access memory cell | |
| JPH0365905B2 (fr) | ||
| JP3146316B2 (ja) | 半導体装置及びその製造方法 | |
| US5156993A (en) | Fabricating a memory cell with an improved capacitor | |
| US4760034A (en) | Method of forming edge-sealed multi-layer structure while protecting adjacent region by screen oxide layer | |
| JPH0586863B2 (fr) | ||
| US5635740A (en) | Semiconductor device and method of manufacturing the same | |
| JPH0381297B2 (fr) | ||
| US5482889A (en) | Method for producing of semiconductor device having of channel stopper under field insulating layer | |
| CA1228425A (fr) | Cellule de memoire vive dynamique avec condensateur dans un sillon mos en technologie cmos | |
| JPH06209088A (ja) | 半導体記憶装置及びその製造方法 | |
| US5160988A (en) | Semiconductor device with composite surface insulator | |
| JP3113011B2 (ja) | 半導体装置の製造方法 | |
| JP3224916B2 (ja) | 半導体装置の製造方法 | |
| JPH1197529A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |