JPH037993B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an image processing apparatus mainly used in an image diagnostic apparatus in the medical field, and in particular to an image processing apparatus for processing a plurality of processed images as pre-processing for image processing for diagnosis. This is related to the alignment of the .

[Technical background of the invention and its problems]

When image data is collected from multiple diagnostic imaging devices, or when image data is collected from subjects (e.g. patients) at different times even when using the same device, slight differences in the imaging conditions of the imaging system, etc. Due to the difference, there is a shift in image size, a shift in the position of the object, etc. Therefore, when performing image processing on multiple images, such as inter-image calculations, it is necessary to align the positions and sizes of the images (hereinafter referred to as ``position and size alignment'' for simplicity). (hereinafter simply referred to as "alignment").

Conventionally, when aligning such images, it has been either to switch and display the images and compare them, or to superimpose the images by adding or subtracting between them, and then displaying this superimposed image. The method used is to align the images using However, when positioning is performed by switching images, it is necessary to remember the image before switching, and the switching of images may cause screen flickering, making it difficult to perform the above positioning. isn't it. Furthermore, when images are superimposed, there is a problem that the shading and the like of the images change due to the superimposition of the images, making it difficult to see and also making positioning difficult.

[Purpose of the invention]

An object of the present invention is to provide an image processing device that can easily align images by displaying a composite image that is optimal for alignment.

[Summary of the invention]

To achieve the above object, the present invention includes a reading means for reading image data from a plurality of image memories, a display prohibiting/permitting means for prohibiting/permitting display of image data of each image read by the reading means, and a display prohibiting/permitting means for prohibiting/permitting display of image data of each image read by the reading means. an image display means for displaying a composite image based on image data permitted by the above; Complementary display prohibition for each target image, and all combinations thereof
The invention is characterized by comprising a control means for permitting permission.

[Embodiments of the invention]

The configuration of an embodiment of the present invention is shown in FIG.

The display control circuit 1 generates a column address signal Sa, a row address signal Sb, and a horizontal/vertical synchronization signal Sc for displaying an image. The column address generation circuits 2a and 2b are
A column address for memory reading is generated from the column address signal Sa, and row address generating circuits 3a and 3b generate a row address for memory reading from the row address signal Sb. First memory 4 and second memory 5
are memories in which images to be processed are stored. The memory read selection circuits 6a and 6b are
They are for inhibiting/permitting the output of read data Sd and Se read from the first and second memories 4 and 5, respectively, and in this case are gate circuits consisting of AND gates. The OR circuit 7 is enabled to output and receives the first output from the memory read selection circuits 6a and 6b.
The data from the second memory 4 or the second memory 5 is output. The D/A (digital-to-analog) conversion circuit 8 converts the memory read data Sf selected and given from the OR circuit 7 into an analog video signal Sg. CRT (cathode ray tube) 9 is a video signal Sg and horizontal/vertical synchronization signal Sc
This is to display image data. The inverting circuit 10 is connected to the first memory 4 or the second memory 5.
The data output of one of the two is permitted and the other is not permitted. The column read control circuit 11 outputs a column read permission signal Sh in response to the column address signal Sa. The row read control circuit 12 outputs a row read permission signal Si in response to the row address signal Sb. In this case, the row/column read permission circuit 13 is composed of an OR gate, and outputs the OR of the column read and row read permission signals Sh and Si as a memory read permission/disapproval signal.

Next, the operation of the above-described configuration will be explained.

In response to the column address signal Sa output from the display control circuit 1, row addresses of the first memory 4 and the second memory 5 are generated from the column address generation circuits 2a and 2b. Further, the column address signal Sa is input to the column read control circuit 11, and the column read control circuit 11 outputs the column read permission signal Sh. Similarly,
The row address generation circuit 3 uses the row address signal Sb output from the display control circuit 1.
The row addresses of the first memory 4 and the second memory 5 are generated from a and 3b, and data is read from the first memory 4 and the second memory 5 using the row address and the column address. The output data is input to memory read selection circuits 6a and 6b. Further, the row address signal Sb is input to the row read control circuit 12, and the row read permission signal Si is output from the row read control circuit 12. The row read permission signal Si and the column read permission signal Sh are ORed by the row/column read permission circuit 13, and are input directly to the memory read selection circuit 6b on the one hand, and via the signal inversion circuit 10 on the other hand. The signal is input to the memory read selection circuit 6a. In this way, memories 4 and 5
When the data output of the first memory 4 is selected (permitted), the data read from the second memory 5 is not selected (prohibited), and conversely,
If the data output of the first memory 4 is not selected (prohibited), the data of the second memory 5 is selected (permitted). The output data of the memory read selection circuits 6a and 6b are combined and selected by the OR circuit 7 as memory read data Sf.
The signal is input to a D/A conversion circuit 8 and converted into a video signal Sg. The CRT 9 displays images using the video signal Sg and the horizontal and vertical synchronizing signals Sc output from the display control circuit 1. By changing the readout control methods of the row readout control circuit 12 and the column readout control circuit 11, displays can be performed using various display pattern methods.

A specific example of the image display method in this embodiment will be explained with reference to FIG.

Display image A is an image obtained when (only) the image data in the first memory 4 is displayed,
It is assumed that the display image B is an image obtained when (only) the image data in the second memory 5 is displayed (note the direction of the hatching in both images). The display image C is an image of this embodiment when the image data of the first memory 4 and the second memory 5 are displayed alternately row by row by the row readout control circuit 12. The display image D is an image of this embodiment when the image data of the first memory 4 and the second memory 5 are alternately displayed pixel by pixel by the column readout control circuit 11 and the row readout control circuit 12. In this case, each time the column changes, the pixel display order in the first memory 4 and the second memory 5 is changed to create a staggered or checkered pattern. Display screen E is column readout control circuit 1
1 is an image of this embodiment in which image data of the first memory 4 and the second memory 5 are displayed alternately column by column. In addition to this, by changing the timing and duty ratio of target image switching between column readout and row readout,
Depending on the combination, display methods using various display patterns such as strip-shaped display, cut-out image display, etc. can be considered.

In this way, the target images to be aligned on the display screen are combined and displayed positionally, so the mutual relationship between both images can be clearly seen, and the display gradation of each target image is not hindered. , it becomes possible to suitably and precisely match the size, positional relationship, etc. of images.

It should be noted that the present invention is not limited to the embodiments described above and shown in the drawings, but can be implemented with various modifications without changing the gist thereof.

〔Effect of the invention〕

According to the present invention, it is possible to provide an image processing apparatus that can extremely easily perform image positioning (including size adjustment), which is essential for preprocessing when processing a plurality of images.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a diagram for explaining image display according to the embodiment. 1...Display control circuit, 2a,
2b... Column address generation circuit, 3a, 3b... Row address generation circuit, 4... First memory, 5...
Second memory, 6a, 6b...Memory read selection circuit, 7...OR circuit, 8...D/A conversion circuit, 9...CRT, 10...Inversion circuit, 11...
Column readout control circuit, 12... row readout control circuit, 13... row/column readout permission circuit.

Claims (1)

[Scope of Claims] 1. A readout means for reading out a plurality of image data from a plurality of image memories storing a plurality of images of the same object under different photographing conditions; a display prohibition/permission means for prohibiting/permitting the display of image data; an image display means for displaying a composite image using the image data permitted by this means; Permits display of any one of a plurality of image data for each unit area of an image consisting of each pixel or multiple pixels, each column or multiple columns, each row or multiple rows, and any combination thereof. , and a control means for prohibiting display of the remaining parts.