JPH0377659B2 - - Google Patents
Info
- Publication number
- JPH0377659B2 JPH0377659B2 JP57228687A JP22868782A JPH0377659B2 JP H0377659 B2 JPH0377659 B2 JP H0377659B2 JP 57228687 A JP57228687 A JP 57228687A JP 22868782 A JP22868782 A JP 22868782A JP H0377659 B2 JPH0377659 B2 JP H0377659B2
- Authority
- JP
- Japan
- Prior art keywords
- temperature
- semiconductor substrate
- transparent member
- wafer
- chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 9
- 239000013307 optical fiber Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 description 25
- 238000004544 sputter deposition Methods 0.000 description 22
- 239000010408 film Substances 0.000 description 7
- 230000010355 oscillation Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 230000005856 abnormality Effects 0.000 description 2
- 238000005086 pumping Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007496 glass forming Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
【発明の詳細な説明】
(1) 発明の技術分野
本発明は半導体製造装置に係り、特に、インラ
イン型スパツタ装置またはケミカル・ベーパ・デ
ボジシヨン（CVD）装置の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to semiconductor manufacturing equipment, and particularly to improvements in in-line sputtering equipment or chemical vapor deposition (CVD) equipment.
(2) 技術の背景
近時、半導体の製造工程において、スパツタま
たはCVD等により、例えばウエハ上に形成した
各デバイスにコンタクトをとるためのコンタクト
窓を第１図の半導体の断面図に示すように形成
し、配線用の金属導電性物質、例えばアルミニウ
ム（Al）をスパツタリング法により形成する。(2) Background of the technology Recently, in the semiconductor manufacturing process, contact windows for making contact with each device formed on a wafer, for example, by sputtering or CVD, as shown in the cross-sectional view of a semiconductor in Figure 1, are being used. A metal conductive material for wiring, such as aluminum (Al), is formed by sputtering.
このような配線層のデポジツトにおいては、第
１図ａに示すようにデバイスが形成されたウエハ
１上にリンシリカガラス（PSG）等の絶縁層２
を形成してコンタクト窓３を該絶縁膜層２上に形
成し、Al等の配線パターン４を形成するときに
PSG層の厚みが1μm程度あり、コンタクト窓３の
幅ｗが極めて小さいときには、Alの配線パター
ン４のコンタクト窓３内への付着状態は凸状に形
成されPSG層のエツジ部２ａの近傍のAl配線層
厚は極めて薄くなる。 In depositing such a wiring layer, as shown in FIG.
When forming a contact window 3 on the insulating film layer 2 and forming a wiring pattern 4 of Al etc.
When the thickness of the PSG layer is about 1 μm and the width w of the contact window 3 is extremely small, the adhesion state of the Al wiring pattern 4 inside the contact window 3 is formed in a convex shape, and the Al near the edge part 2a of the PSG layer is The wiring layer thickness becomes extremely thin.
一般に理想的には、第１図ｂに示すように
PSG層及びコンタクト窓上のAl層４の厚さD1，
D2，D3は厚みが等しくなるように膜形成される
べきである。 Generally, ideally, as shown in Figure 1b,
Thickness D 1 of Al layer 4 on PSG layer and contact window,
D 2 and D 3 should be formed to have the same thickness.
第１図ａの如くAl層パツド４の付着された場
合には３ａで示す部分が薄いため電流を流したと
き抵抗が高いという弊害の他にパターン切れ等を
発生するため信頼性を著しく低下させることが多
い。 When the Al layer pad 4 is attached as shown in Fig. 1a, the part indicated by 3a is thin, which not only has the disadvantage of high resistance when current is applied, but also causes pattern breakage, which significantly reduces reliability. There are many things.
Al配線パターン層を第１図ｂに示す理想的パ
ターン形状とするためにはウエハを200〜450℃ま
で上昇させる必要があり、インライン式のスパツ
タ装置ではスパツタ室にウエハが送り込まれてス
パツタリングがなされるときのウエハ基板温度が
200〜450℃に保持されている必要があつた。これ
はAlの原子の運動速度を上げてやるために必要
なウエハ基板温度である。 In order to form the Al wiring pattern layer into the ideal pattern shape shown in Figure 1b, it is necessary to heat the wafer to 200 to 450°C, and in an in-line sputtering device, the wafer is fed into a sputtering chamber and sputtered. The wafer substrate temperature when
It was necessary to maintain the temperature between 200 and 450°C. This is the wafer substrate temperature necessary to increase the motion speed of Al atoms.
(3) 従来技術の問題点
従来の上記したインライン式のスパツタ装置の
略図的な構成を第２図に示す。第２図において、
５はセンダーでウエハ基板の出し入れが行われ、
弁６を介してロードロツク７にウエハが挿入さ
れ、スパツタ室１０と連なる弁９と該弁６を閉じ
弁８を開いてロードロツク７内を真空状態とし、
スパツタ室１０内はメインバルブ１１を介して真
空状態となされているが、弁９を開いてロードロ
ツク７内のウエハをスパツタ室１０に挿入すると
ともに弁９を閉じる。このときロードロツク１３
とスパツタ室１０を結ぶ弁１２は閉じられてい
る。(3) Problems with the Prior Art FIG. 2 shows a schematic configuration of the conventional in-line sputtering device described above. In Figure 2,
5 is a sender where wafer substrates are loaded and unloaded.
The wafer is inserted into the load lock 7 via the valve 6, and the valve 9 connected to the sputtering chamber 10 and the valve 6 are closed, and the valve 8 is opened to create a vacuum inside the load lock 7.
The interior of the sputtering chamber 10 is kept in a vacuum state via the main valve 11, and the valve 9 is opened to insert the wafer in the load lock 7 into the sputtering chamber 10, and the valve 9 is closed. At this time, load lock 13
The valve 12 connecting the sputtering chamber 10 and the sputtering chamber 10 is closed.
スパツタ室１０内でスパツタリングが終つて配
線層等が形成されたウエハはロードロツク１３に
送り込まれる。 After sputtering is completed in the sputtering chamber 10, the wafer on which wiring layers and the like have been formed is sent to a load lock 13.
この場合、ロードロツク１３とスパツタ室を結
ぶ弁１２並びにレシーバ１６とを結ぶ弁１５に閉
じられて、弁１４が開かれてロードロツク１３の
排気がなされ真空状態とした後に弁１２が開かれ
てスパツタリングされたウエハがロードロツク１
３内に送り込まれる。 In this case, the valve 12 connecting the load lock 13 and the sputtering chamber and the valve 15 connecting the receiver 16 are closed, and the valve 14 is opened to evacuate the load lock 13 and create a vacuum state, and then the valve 12 is opened to start sputtering. The loaded wafer is in load lock 1.
Sent into 3.
次に弁１２を閉じ、ロードロツク１３をN2等
の不活性ガスを用いて大気圧にした後且つ弁１５
を開いてロードロツク１３内のウエハをレシーバ
１６内に搬入して取り出す。 Next, close the valve 12, bring the load lock 13 to atmospheric pressure using an inert gas such as N2, and then close the valve 15.
The wafer in the load lock 13 is loaded into the receiver 16 and taken out.
このようなインライン式スパツタ装置では、ロ
ードロツク７においては大気をスパツタ室に入れ
ないための機能とともにウエハを200〜450℃まで
昇温させる機能を有している。 In such an in-line sputtering apparatus, the load lock 7 has the function of not allowing atmospheric air to enter the sputtering chamber, and also the function of raising the temperature of the wafer to 200 to 450 DEG C.
このロードロツク内の加熱は処理時間に見合う
ように加熱時間を設定してウエハ加熱を行つてい
るが、これが正常に動作しているときは特に問題
がないが、これのライン内でのトラブル、或いは
排気速度の変動等の異常が生じたときにウエハは
所定の基板温度に達しないままスパツタ室内に送
入されて膜形成されて不良品を発生する欠点があ
つた。 The heating time inside this load lock is set to match the processing time and the wafer is heated.When this is working normally, there is no particular problem, but if there is trouble within this line or When an abnormality such as a fluctuation in the pumping speed occurs, the wafer is sent into the sputtering chamber before reaching a predetermined substrate temperature and a film is formed, resulting in defective products.
(5) 発明の目的
本発明は上記欠点に鑑み、予備加熱室または膜
形成室内に搬入された半導体基板の温度が一定に
なるように温度制御して、上記のようなトラブル
等が発生した場合でも安定な処理の行える半導体
製造装置を提供することを目的とするものであ
る。(5) Purpose of the Invention In view of the above-mentioned drawbacks, the present invention provides a method for controlling the temperature of a semiconductor substrate carried into a preheating chamber or a film forming chamber so that the temperature thereof remains constant, so that when the above-mentioned troubles occur, However, the purpose is to provide a semiconductor manufacturing apparatus that can perform stable processing.
(5) 発明の構成
そして、この目的は本発明によれば、上面にマ
イクロ波および赤外線を透過し気密性を有する透
過部材で覆われた窓が形成され、該透過部材の周
囲部を抑え金具およびＯリングシールによつて密
封した真空槽と、該真空槽上に設置された導波管
とを有する膜形成装置の予備加熱室または膜形成
室内に搬入された半導体基板を、前記導波管、透
過部材を通してマイクロ波を照射することにより
加熱するマイクロ波加熱手段と、前記抑え金具に
光フアイバを埋設し該光フアイバの一端面を前記
透過部材に接触させ、前記半導体基板から生じる
赤外線を該光フアイバの一端面より入射して他端
面に接続される温度検出器に導くことにより非接
触で前記半導体基板の温度検出を行う温度検出手
段と、該温度検出手段の検出結果に基づき前記マ
イクロ波加熱手段のマイクロ波出力またはその出
力時間を制御して前記半導体基板を一定温度に調
整する温度制御手段とを備えたことを特徴とする
半導体製造装置を提供することで達成される。(5) Structure of the Invention According to the present invention, a window covered with a transparent member that transmits microwaves and infrared rays and is airtight is formed on the upper surface, and a metal fitting is used to suppress the surrounding area of the transparent member. A semiconductor substrate carried into a preheating chamber or a film forming chamber of a film forming apparatus having a vacuum chamber sealed with an O-ring seal and a waveguide installed on the vacuum chamber is placed inside the waveguide. , a microwave heating means for heating by irradiating microwaves through a transparent member; an optical fiber is embedded in the holding fitting, one end surface of the optical fiber is brought into contact with the transparent member, and the infrared rays generated from the semiconductor substrate are transmitted. temperature detection means for detecting the temperature of the semiconductor substrate in a non-contact manner by entering the optical fiber from one end surface and guiding it to a temperature detector connected to the other end surface; This is achieved by providing a semiconductor manufacturing apparatus characterized by comprising: temperature control means for adjusting the temperature of the semiconductor substrate to a constant temperature by controlling the microwave output or the output time of the heating means.
(6) 発明の実施例
以下、本発明の一実施例を図面について説明す
る。(6) Embodiment of the Invention An embodiment of the present invention will be described below with reference to the drawings.
第３図は本発明の第２図に示すロードロツク７
すなわち、予備室の要部の断面を示すものであ
り、１７は断面がほぼ直方形状で紙面に対し垂直
方向に延設され手前側にセンダー５が、奥にスパ
ツタ室１０が第２図のように配置され、弁６，９
並びに８の開閉によつてロードロツク内を真空に
保つたり大気に連通させたりしている真空槽であ
り、該真空槽内には同じくセンダー５側からスパ
ツタ室１０に向かつて２本のレール１８が敷設さ
れてウエハ等の試料１が該レール上に連続的に搬
送される。 FIG. 3 shows the load lock 7 shown in FIG. 2 of the present invention.
That is, it shows a cross section of the main part of the preliminary chamber, and 17 has an almost rectangular cross section and extends perpendicularly to the plane of the paper, with the sender 5 in the front and the sputtering chamber 10 in the back, as shown in Figure 2. valves 6 and 9
This is a vacuum tank that maintains a vacuum inside the load lock or communicates it with the atmosphere by opening and closing 8. Inside the vacuum tank, there are also two rails 18 running from the sender 5 side toward the sputtering chamber 10. Samples 1 such as wafers are continuously conveyed onto the rails.
この窓１９を、マイクロ波および赤外線を透過
可能で気密性を有する透過部材、例えば石英ガラ
ス２０で覆い、この石英ガラス２０の周囲部をガ
ラス抑え金具２１およびＯリングシール材２２に
よつて密封することにより、真空槽１７内を高い
真空度に保持している。 This window 19 is covered with a transparent member that can transmit microwaves and infrared rays and has an airtight property, for example, quartz glass 20, and the periphery of this quartz glass 20 is sealed with a glass holding fitting 21 and an O-ring sealing material 22. As a result, the inside of the vacuum chamber 17 is maintained at a high degree of vacuum.
ガラス抑え金具２１の上部にはフランジ部２３
を有する導波管２４を載置する。 A flange portion 23 is provided at the top of the glass holding fitting 21.
The waveguide 24 having the following characteristics is placed.
該導波管側部にはマイクロ波発振管２５を設
け、導波管壁に穿つた透孔を通してアンテナ２６
を突き出させマイクロ波出力端２７よりマイクロ
波を発振させて石英ガラス２０を通してウエハ１
を加熱させる。 A microwave oscillation tube 25 is provided on the side of the waveguide, and an antenna 26 is installed through a through hole in the waveguide wall.
The wafer 1 is emitted from the microwave output end 27 through the quartz glass 20.
heat up.
マイクロ波発振管２５から発振された電磁場は
誘電体であるウエハのみを加熱し、他の真空槽を
形成している金属部分や石英ガラスを加熱しな
い。導波管は大気にさらせるため、加熱装置を真
空槽内に設ける必要がないので加熱装置の設計の
自由度を大きくとれる。さらに金属部に当つてマ
イクロ波は接地電位に落ちるためにランプヒータ
加熱のように金属部の蓄熱による影響をウエハが
受けないという特徴がある。 The electromagnetic field oscillated from the microwave oscillation tube 25 heats only the wafer, which is a dielectric material, and does not heat the other metal parts or quartz glass forming the vacuum chamber. Since the waveguide is exposed to the atmosphere, there is no need to provide a heating device in a vacuum chamber, allowing greater flexibility in designing the heating device. Furthermore, since the microwave drops to the ground potential when it hits the metal part, the wafer is not affected by heat accumulation in the metal part, unlike lamp heater heating.
本発明ではガラス抑え金具２１及び導波管２４
のフランジ２３に透孔２１ａ，２３ａに挿通して
石英ガラス２０の表面にオプテイカルフアイバー
２８の一端を接触させ、他端面を赤外線センサの
如き温度検出器２９に結合させ、ウエハ１から生
じる赤外線３１を検出する。そして、制御回路３
０により、温度検出器２９の出力信号に基づき、
マイクロ波発振管２５から出力されるマイクロ波
のパワーまたはその出力時間をコントロールし
て、ウエハ１を一定温度に調整する。 In the present invention, the glass holding fitting 21 and the waveguide 24
The optical fiber 28 is inserted through the through holes 21a and 23a in the flange 23 of the wafer 1, one end of the optical fiber 28 is brought into contact with the surface of the quartz glass 20, and the other end surface is connected to a temperature detector 29 such as an infrared sensor. Detect. And control circuit 3
0, based on the output signal of the temperature detector 29,
The power of the microwave output from the microwave oscillation tube 25 or its output time is controlled to adjust the temperature of the wafer 1 to a constant temperature.
上記構成によれば、例えばマイクロ波の発振時
間を制御することにより、ウエハ温度を200〜450
℃の範囲に調整することが可能となる。 According to the above configuration, for example, by controlling the microwave oscillation time, the wafer temperature can be adjusted between 200 and 450.
It becomes possible to adjust the temperature within the range of ℃.
すなわち、ウエハ温度が所定の温度より低けれ
ば発振を継続させ、所定温度より高ければ発振を
停止させるようにする。 That is, if the wafer temperature is lower than a predetermined temperature, the oscillation is continued, and if the wafer temperature is higher than the predetermined temperature, the oscillation is stopped.
なお、上記実施例ではインライン式膜形成装置
としてスパツタ装置によりAl配線パターンを形
成する場合について予備室内部での実施例につい
て述べたが、膜形成室においても同様の構成によ
りウエハ温度の制御は可能である。さらに本発明
はこれに限定されることなく、例えばCVD装置
によつて各種薄膜を形成する場合に適用し得るこ
とは勿論である。 In addition, in the above example, an example was described in which an Al wiring pattern is formed using a sputtering device as an in-line film forming apparatus inside a preparatory chamber, but the wafer temperature can also be controlled in a film forming chamber with a similar configuration. It is. Further, the present invention is not limited thereto, and can of course be applied to the case where various thin films are formed by, for example, a CVD apparatus.
(7) 発明の効果
以上、詳細に説明したように本発明の半導体製
造装置によれば、インライン式薄膜形成装置内の
トラブル或いは排気速度変動等の異常に対して、
従来のように時間だけで温度制御をしている場合
に比べて試料の表面温度を非接触状態で計測でき
ること、並びに加熱手段にフイードバツクを掛け
て時間または出力をコントロールできるので安定
な処理を行い得る特徴を有するものである。(7) Effects of the Invention As described above in detail, the semiconductor manufacturing apparatus of the present invention can prevent troubles in the in-line thin film forming apparatus or abnormalities such as fluctuations in pumping speed.
Compared to the conventional case where temperature is controlled only by time, the surface temperature of the sample can be measured without contact, and the time or output can be controlled by applying feedback to the heating means, making it possible to perform stable processing. It has characteristics.
第１図ａ，ｂは従来の半導体装置のAl配線パ
ターン状態を説明するための側断面図、第２図は
従来のインライン式スパツタ装置の概略的構成を
示す排気系統図、第３図は第２図の予備室に本発
明の一実施例を適用した場合の側断面図である。
１……Si基板（ウエハ）、２……絶縁層、３…
…コンタクト窓、４……配線層（Al等）、５……
センダー、６，８，９，１１，１２，１４，１５
……弁、７，１３……ロードロツク、１０……ス
パツタ室、１６……レシーバ、１７……真空槽、
１８……レール、１９……窓、２０……石英ガラ
ス、２１……ガラス抑え金具、２２……Ｏ−リン
グシール、２３……フランジ部、２４……導波
管、２５……マイクロ波発振管、２６……アンテ
ナ、２７……マイクロ波出力端、２８……オプテ
イカルフアイバー、２９……温度検出器、３０…
…制御回路、３１……赤外線。
Figures 1a and b are side sectional views for explaining the Al wiring pattern state of a conventional semiconductor device, Figure 2 is an exhaust system diagram showing the schematic configuration of a conventional in-line sputtering device, and Figure 3 is an FIG. 3 is a side sectional view when an embodiment of the present invention is applied to the preliminary chamber shown in FIG. 2; 1... Si substrate (wafer), 2... Insulating layer, 3...
...Contact window, 4...Wiring layer (Al, etc.), 5...
Sender, 6, 8, 9, 11, 12, 14, 15
... Valve, 7, 13 ... Load lock, 10 ... Sputter chamber, 16 ... Receiver, 17 ... Vacuum chamber,
18...Rail, 19...Window, 20...Quartz glass, 21...Glass holding fitting, 22...O-ring seal, 23...Flange section, 24...Waveguide, 25...Microwave oscillation Tube, 26... Antenna, 27... Microwave output end, 28... Optical fiber, 29... Temperature detector, 30...
...control circuit, 31...infrared rays.
Claims (1)
性を有する透過部材で覆われた窓が形成され、該
透過部材の周囲部を抑え金具およびＯリングシー
ルによつて密封した真空槽と、該真空槽上に設置
された導波管とを有する膜形成装置の予備加熱室
または膜形成室内に搬入された半導体基板を、前
記導波管、透過部材を通してマイクロ波を照射す
ることにより加熱するマイクロ波加熱手段と、 前記抑え金具に光フアイバを埋設し該光フアイ
バの一端面を前記透過部材に接触させ、前記半導
体基板から生じる赤外線を該光フアイバの一端面
より入射して他端面に接続される温度検出器に導
くことにより非接触で前記半導体基板の温度検出
を行う温度検出手段と、 該温度検出手段の検出結果に基づき前記マイク
ロ波加熱手段のマイクロ波出力またはその出力時
間を制御して前記半導体基板を一定温度に調整す
る温度制御手段とを備えたことを特徴とする半導
体製造装置。[Claims] 1. A window covered with a transparent member that transmits microwaves and infrared rays and has an airtight property is formed on the upper surface, and a vacuum sealed by a metal fitting and an O-ring seal is formed around the transparent member. A semiconductor substrate carried into a preheating chamber or a film forming chamber of a film forming apparatus having a tank and a waveguide installed on the vacuum tank is irradiated with microwaves through the waveguide and the transparent member. an optical fiber is embedded in the holding fitting, one end surface of the optical fiber is brought into contact with the transparent member, and infrared rays generated from the semiconductor substrate are incident on the one end surface of the optical fiber; temperature detection means for detecting the temperature of the semiconductor substrate in a non-contact manner by guiding the temperature to a temperature detector connected to an end face; and a microwave output of the microwave heating means or its output time based on the detection result of the temperature detection means. and temperature control means for controlling the temperature of the semiconductor substrate to a constant temperature.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22868782A JPS59125621A (en) | 1982-12-28 | 1982-12-28 | Device for manufacturing semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22868782A JPS59125621A (en) | 1982-12-28 | 1982-12-28 | Device for manufacturing semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59125621A JPS59125621A (en) | 1984-07-20 |
| JPH0377659B2 true JPH0377659B2 (en) | 1991-12-11 |
Family
ID=16880226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22868782A Granted JPS59125621A (en) | 1982-12-28 | 1982-12-28 | Device for manufacturing semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59125621A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4796081A (en) * | 1986-05-02 | 1989-01-03 | Advanced Micro Devices, Inc. | Low resistance metal contact for silicon devices |
| JP2611434B2 (en) * | 1989-06-23 | 1997-05-21 | 富士電機株式会社 | Schottky barrier diode manufacturing method |
| SE465100B (en) * | 1989-06-30 | 1991-07-22 | Inst Mikroelektronik Im | PROCEDURE AND DEVICE TO PROCESS IN A COLD WALL REACTOR |
| JP2638311B2 (en) * | 1991-01-10 | 1997-08-06 | 動力炉・核燃料開発事業団 | Heating temperature measuring device in microwave high electric field |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5691436A (en) * | 1979-12-26 | 1981-07-24 | Fujitsu Ltd | Method for heating semiconductor substrate |
| JPS5754315A (en) * | 1980-09-19 | 1982-03-31 | Matsushita Electric Ind Co Ltd | Preparation of semiconductor device |
| JPS57178316A (en) * | 1981-04-27 | 1982-11-02 | Hitachi Ltd | Manufacture of semiconductor element and device therefor |
-
1982
- 1982-12-28 JP JP22868782A patent/JPS59125621A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5691436A (en) * | 1979-12-26 | 1981-07-24 | Fujitsu Ltd | Method for heating semiconductor substrate |
| JPS5754315A (en) * | 1980-09-19 | 1982-03-31 | Matsushita Electric Ind Co Ltd | Preparation of semiconductor device |
| JPS57178316A (en) * | 1981-04-27 | 1982-11-02 | Hitachi Ltd | Manufacture of semiconductor element and device therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59125621A (en) | 1984-07-20 |
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