JPH0373027U - - Google Patents
Info
- Publication number
- JPH0373027U JPH0373027U JP13416189U JP13416189U JPH0373027U JP H0373027 U JPH0373027 U JP H0373027U JP 13416189 U JP13416189 U JP 13416189U JP 13416189 U JP13416189 U JP 13416189U JP H0373027 U JPH0373027 U JP H0373027U
- Authority
- JP
- Japan
- Prior art keywords
- output
- current
- differential amplifier
- input
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 239000000284 extract Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
Description
第１図は本考案回路を示す回路図、第２図は従
来回路を示す回路図、第３図はコンプレツサの一
般回路を示す回路図である。
Ｑ１，Ｑ２，Ｑ３，Ｑ４……トランジスタ、Ｑ
５……第１のトランジスタ、Ｑ６……第２のトラ
ンジスタ、Ｒ５……電流変換抵抗。
FIG. 1 is a circuit diagram showing the circuit of the present invention, FIG. 2 is a circuit diagram showing a conventional circuit, and FIG. 3 is a circuit diagram showing a general circuit of a compressor. Q 1 , Q 2 , Q 3 , Q 4 ...transistor, Q
5 ...First transistor, Q6 ...Second transistor, R5 ...Current conversion resistor.
Claims (1)
幅器と、 前記差動増幅器の他方の入力と電源との間に接
続された電流変換抵抗と、 前記差動増幅器の出力に基づいて、前記電流変
換抵抗を流れる電流を、負の温度係数を持つ出力
として取り出す出力回路と、 を備えたことを特徴とする電流発生回路。 (2) 一方の入力に基準電圧が印加される差動増
幅器と、 第１電源と前記差動増幅器の出力との間に接続
された電流ミラー回路と、 前記差動増幅器の他方の入力と第２電源との間
に接続された電流変換抵抗と、 前記差動増幅器の出力に基づいて、前記電流変
換抵抗を流れる電流を、負の温度係数を持つ出力
として取り出す出力回路と、 を備えたことを特徴とする電流発生回路。 (3) 前記基準電圧は、周囲温度の変化に依存し
ない電圧であることを特徴とする請求項(1)又は(
2)記載の電流発生回路。 (4) 前記出力回路は、入力が前記差動増幅器の
出力と接続されると共に出力路が前記第１電源と
前記差動増幅器の他方の入力との間に接続された
第１のトランジスタと、入力が前記差動増幅器の
出力と接続されると共に出力路が前記第１電源と
接続された第２のトランジスタとを備えて成り、
前記第２のトランジスタから出力電流を取り出す
ことを特徴とする請求項(2)記載の電流発生回路
。 (5) 前記第１電源の最小電圧は、前記基準電圧
と前記第１のトランジスタの飽和電圧とを加算し
た値で定まることを特徴とする請求項(4)記載の
電流発生回路。[Claims for Utility Model Registration] (1) A differential amplifier to which a reference voltage is applied to one input; a current conversion resistor connected between the other input of the differential amplifier and a power supply; A current generation circuit comprising: an output circuit that extracts the current flowing through the current conversion resistor as an output having a negative temperature coefficient based on the output of the dynamic amplifier. (2) a differential amplifier to which a reference voltage is applied to one input; a current mirror circuit connected between a first power supply and the output of the differential amplifier; a current conversion resistor connected between two power supplies; and an output circuit that extracts the current flowing through the current conversion resistor as an output having a negative temperature coefficient based on the output of the differential amplifier. A current generation circuit featuring: (3) Claim (1) or (1) characterized in that the reference voltage is a voltage that does not depend on changes in ambient temperature.
2) Current generating circuit described. (4) The output circuit includes a first transistor whose input is connected to the output of the differential amplifier and whose output path is connected between the first power supply and the other input of the differential amplifier; a second transistor having an input connected to the output of the differential amplifier and having an output path connected to the first power supply;
3. The current generating circuit according to claim 2, wherein the output current is extracted from the second transistor. (5) The current generating circuit according to claim 4, wherein the minimum voltage of the first power supply is determined by the sum of the reference voltage and the saturation voltage of the first transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13416189U JPH0373027U (en) | 1989-11-17 | 1989-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13416189U JPH0373027U (en) | 1989-11-17 | 1989-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0373027U true JPH0373027U (en) | 1991-07-23 |
Family
ID=31681519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13416189U Pending JPH0373027U (en) | 1989-11-17 | 1989-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0373027U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61147610A (en) * | 1984-12-21 | 1986-07-05 | Nec Corp | Amplification factor stabilizing circuit |
-
1989
- 1989-11-17 JP JP13416189U patent/JPH0373027U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61147610A (en) * | 1984-12-21 | 1986-07-05 | Nec Corp | Amplification factor stabilizing circuit |
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