JPH0371353A - Data processor - Google Patents

Abstract

PURPOSE:To improve the working ratio of a central arithmetic processing unit and also to increase the data access speed by providing a data buffer between the central arithmetic processing unit and a local memory to hold the data. CONSTITUTION:A data processor is provided with a central processing unit 1 and its accessory local memory unit 3. Then a data buffer 4 having the data holding function is added between the unit 1 and the memory 3 so that the data having an access to the memory 3 is held by the buffer 4. Thus, the unit 1 produces no holding time and improves greatly its working ratio. Furthermore the data written right before or approximately right before a due process can be immediately read again. Then the data access speed is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data processing device including a central processing unit and a local memory attached thereto.

[Conventional technology]

In such data processing devices, a data buffer is provided between the central processing unit and the local memory to facilitate the exchange of data between them, but generally the data buffer does not have the function of holding data. Things that are not equipped are being used.

Additionally, in some cases, devices with a retention function are used, but the purpose of this is to improve data setup and hold time, and is not intended to retain data for the required period. .

[Problem to be solved by the invention]

Therefore, when the central processing unit writes data to the local memory, if the local memory is continuing the previous operation, the central processing unit must hold the data until the previous operation is completed. However, the occurrence of this waiting time has the disadvantage that the operating efficiency of the central processing unit is reduced.

The same applies when reading data from the local memory.

Furthermore, even if the data buffer has a retention function, the data is not retained for the required period, and when reading data that was written immediately before or in the vicinity of the local memory, data buffer 7 It is impossible to use the data therein, and reading from the local memory is always required, resulting in a disadvantage that data access is slow.

[Means to solve the problem]

In order to solve the above-mentioned problems, the present invention is accomplished by the following means.

That is, a data buffer is provided between the central processing unit and the local memory and has a data holding function.

[Effect]

Therefore, even if the data is retained in the data buffer for the required period of time and the local memory continues its previous operation, data can be accessed immediately to utilize the data buffer. In addition to eliminating the need for waiting time for the arithmetic processing unit, the data that was written to the local memory in the previous case or in the vicinity is held in the data buffer, so it can be freely read using this data. Data can be accessed at high speed.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to block diagrams showing embodiments.

In the figure, the central processing unit (hereinafter referred to as CPU)
) 1, a local memory (hereinafter referred to as LCM) 3 is attached via a memory controller (hereinafter referred to as MCT) 2, and a data buffer (hereinafter referred to as DBF) that has a data holding function between the CPU 1 and LCM3. ) 4 is interposed, and an address bus 11 is connected between CPU 1 and MCT 2.
and control bus 12, control bus 13 between MCT2 and LCM3, data bus 14 and 1 between SLCM3 and DBF4, and between CPU1 and DBF4.
5 are connected to each other.

Moreover, the control line 16 is connected between the MCT2 and the DBF4, and the DB
F4 holds and sends data.

After this, when the CPU 1 writes data to the LCM 3, the address signal via the address bus 11 and the write command via the control bus 12 are output. The state of the LCM 3 is detected via the control bus 13 according to the
If the LCM 3 is continuing the previous operation, such as the previous data write, the sending of a new write control signal to the LCM 3 is suspended, and a write permission signal is sent to the CPU 1 via the control bus 12 .

Then, the CPU 1 sends data to the data bus 15 in response to this, so the MCT 2 detects this and provides a holding signal to the DBF 4, so that the data from the CPU 1 is held in the DBF 4.

Note that the DBF 4 has a plurality of addresses, and when one or more operations are repeated, each data is sequentially held at each address of the DBF 4.

Then, when LCM3 finishes its previous operation, MCT2
In response, the DBF4 provides a data sending signal to the DBF4, and also sends a pending write control signal to the LCM3 via the control bus 13, so that the data held in the DBF4 is transferred to the data bus 14. LCMa via
1 is written to the specified address inside.

Therefore, even if the LCM 3 continues its previous operation, the CPU 1 can perform the data writing process without waiting, and the operating efficiency of the CPU 1 is improved.

The same goes for data reading from LCM3 by CPU1; reading is performed after LCM3 finishes its previous operation, and this data is held in DBF4 and then sent to CPU1, so CPU1 is on standby. You can move on to the next process without doing anything.

Also, the data in the DBFJ is held at 1 when new data is given to each address, and 9. If the data read by CPU1 is the data written immediately before, or if it is an address near the address of this data, it is still held in the DBFJ, so the MCT2 judges this and writes the data from the DBF4. Since the data is sent to the CPU 1, read control to the LCM 3 is omitted, and data access is performed at high speed.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, a data buffer having a data holding function is interposed between the central processing unit and the local memory, so that data accessed to the local memory is The data is stored in the data buffer, which eliminates the waiting time of the central processing unit, greatly improving the operating efficiency of the central processing unit, and making it possible to read data written just before or in the vicinity. The data can be accessed immediately and the data can be accessed at high speed, resulting in remarkable effects in data processing devices for various purposes.

[Brief explanation of drawings]

The figure is a block diagram showing an embodiment of the present invention. 1...Central processing unit, 3...Local memory, 4...Data buffer, 14°15...
・Data bus.

Claims (1)

[Claims] A data processing device comprising a central processing unit and a local memory attached thereto, characterized in that a data buffer is provided between the central processing unit and the local memory and has a data holding function. Data processing equipment.