JPH0370877B2 - - Google Patents

Info

Publication number
JPH0370877B2
JPH0370877B2 JP59113742A JP11374284A JPH0370877B2 JP H0370877 B2 JPH0370877 B2 JP H0370877B2 JP 59113742 A JP59113742 A JP 59113742A JP 11374284 A JP11374284 A JP 11374284A JP H0370877 B2 JPH0370877 B2 JP H0370877B2
Authority
JP
Japan
Prior art keywords
bit line
sense amplifier
memory cell
potential
vcc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59113742A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60256998A (ja
Inventor
Toshio Mitsumoto
Yoshinori Oota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP59113742A priority Critical patent/JPS60256998A/ja
Priority to US06/738,870 priority patent/US4715015A/en
Publication of JPS60256998A publication Critical patent/JPS60256998A/ja
Publication of JPH0370877B2 publication Critical patent/JPH0370877B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
JP59113742A 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置 Granted JPS60256998A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59113742A JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置
US06/738,870 US4715015A (en) 1984-06-01 1985-05-29 Dynamic semiconductor memory with improved sense signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59113742A JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS60256998A JPS60256998A (ja) 1985-12-18
JPH0370877B2 true JPH0370877B2 (fr) 1991-11-11

Family

ID=14619973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59113742A Granted JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS60256998A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0731909B2 (ja) * 1986-06-20 1995-04-10 富士通株式会社 半導体記憶装置の動作方法
US5339274A (en) * 1992-10-30 1994-08-16 International Business Machines Corporation Variable bitline precharge voltage sensing technique for DRAM structures

Also Published As

Publication number Publication date
JPS60256998A (ja) 1985-12-18

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees