JPH0370272B2 - - Google Patents
Info
- Publication number
- JPH0370272B2 JPH0370272B2 JP19620684A JP19620684A JPH0370272B2 JP H0370272 B2 JPH0370272 B2 JP H0370272B2 JP 19620684 A JP19620684 A JP 19620684A JP 19620684 A JP19620684 A JP 19620684A JP H0370272 B2 JPH0370272 B2 JP H0370272B2
- Authority
- JP
- Japan
- Prior art keywords
- sheet
- chip
- base material
- card
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000463 material Substances 0.000 claims description 36
- 229920005989 resin Polymers 0.000 claims description 23
- 239000011347 resin Substances 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 21
- 238000004519 manufacturing process Methods 0.000 claims description 18
- 239000004020 conductor Substances 0.000 claims description 17
- 238000005266 casting Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 4
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 description 11
- 239000000843 powder Substances 0.000 description 6
- 238000007639 printing Methods 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 239000011230 binding agent Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229920005992 thermoplastic resin Polymers 0.000 description 3
- 238000007731 hot pressing Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 1
- 229920002554 vinyl polymer Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、シート状基材中にICチツプを埋め
込んで実装して構成されるICカードの製造方法
に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing an IC card in which an IC chip is embedded and mounted in a sheet-like base material.
ICカードは樹脂等により形成されるシート状
基材中に記憶・演算機能等を有するICチツプを
埋め込んで実装したカードである。このような
ICカードの製造方法として、従来より薄いプリ
ント基板に裸のICチツプをチツプオンボードで
ワイヤボンデイングにより実装し樹脂封止した
後、このプリント基板をカード基材中にラミネー
トする方法や、プリント基板に開口を切欠してそ
の部分にTABによりICチツプを実装し、これを
シート状基材中にラミネートする方法等が知られ
ている。これらの方法は、従来一般のIC実装技
術をそのままICカードの実装に適用したものに
他ならない。
An IC card is a card in which an IC chip with storage, calculation functions, etc. is embedded in a sheet-like base material made of resin or the like. like this
Conventional methods for manufacturing IC cards include mounting a bare IC chip on a thin printed circuit board using chip-on-board wire bonding, sealing it with resin, and then laminating this printed circuit board into a card base material; A known method is to cut out an opening, mount an IC chip in that part using TAB, and laminate this into a sheet-like base material. These methods are nothing but the application of conventional general IC mounting techniques to IC card mounting.
しかしながら、これらの製造方法はICカード
の仕様および用途からくる要求を必ずしも満たす
ものではない。すなわち、ワイヤボデイングを用
いる方法では、基材とICチツプの厚み（0.29〜
0.45mm程度）に加えてワイヤのループハイト
（0.3mm程度）を計算に入れねばならず、実質的に
0.76±0.08mmという、ISOで規定された厚み以内
でICカードを製造することは極めて困難である。
また、ICカードの用途としては、キヤツシユカ
ード，クレジツトカード等が考えられるが、IC
カードがこれらの金融カードとして採用されるに
当たつては、低コストということが必須条件であ
り、プリント基板等の配線基板の作製とICチツ
プの電気的接続が別個に行なわれる上記の製造方
法では、この条件を満たすことが難しい。 However, these manufacturing methods do not necessarily satisfy the requirements arising from the specifications and uses of IC cards. In other words, in the method using wire boding, the thickness of the base material and the IC chip (0.29~
In addition to the wire loop height (about 0.45 mm), the wire loop height (about 0.3 mm) must be taken into account, and the
It is extremely difficult to manufacture IC cards within the thickness specified by ISO, which is 0.76±0.08mm.
In addition, IC cards can be used as cash cards, credit cards, etc.
For cards to be adopted as these financial cards, low cost is a prerequisite, and the above-mentioned manufacturing method, in which the fabrication of a wiring board such as a printed circuit board and the electrical connection of an IC chip are performed separately. However, it is difficult to satisfy this condition.
一方、ICチツプをプリント基板に実装せずに
シート状基材に埋め込み、シート状基材上に導体
パターンを形成して回路網の形成とICチツプの
電気的接続を行なう方法が提案されている（特開
昭58−20923号公報）。しかしながら、この方法で
はシート状基材の凹部に入れたICチツプ上に、
ICチツプのメタライズ部分（ボンデイングパツ
ド部）上方部分を開口したテープキヤリア状の支
持体を配置し、この支持体上に導体ペーストを印
刷し導体路を形成すると同時に導体ペーストを開
口部に入れることにより、導体路とボンデイング
パツドとの接続をとるようにしているため、製造
工程が複雑であるばかりでなく、支持体の厚さが
ICカード全体を薄くする上で障害となる。この
支持体がなければ、導体ペーストを印刷したとき
ペーストの一部がシート状基材と裸のICチツプ
との間隙に侵入し導体路とICチツプのサブスト
レート間の絶縁を損なうので、支持体の使用は必
須である。 On the other hand, a method has been proposed in which an IC chip is embedded in a sheet-like base material without being mounted on a printed circuit board, and a conductive pattern is formed on the sheet-like base material to form a circuit network and electrically connect the IC chip. (Japanese Unexamined Patent Publication No. 58-20923). However, in this method, on the IC chip placed in the recess of the sheet-like base material,
A tape carrier-like support with an opening above the metallized part (bonding pad part) of the IC chip is arranged, and a conductor paste is printed on this support to form a conductor path, and at the same time, the conductor paste is poured into the opening. This method not only complicates the manufacturing process but also increases the thickness of the support.
This becomes an obstacle in making the entire IC card thinner. Without this support, when printing the conductor paste, some of the paste would enter the gap between the sheet-like substrate and the bare IC chip, damaging the insulation between the conductor traces and the substrate of the IC chip. The use of is mandatory.
本発明の目的は、ICカードの薄型化が容易で、
かつ製造工程が簡単なICカードの製造方法を提
供することにある。
The purpose of the present invention is to easily reduce the thickness of an IC card.
Another object of the present invention is to provide a method for manufacturing an IC card with a simple manufacturing process.
本発明に係るICカードの製造方法は、表面の
少なくともボンデイングパツド部が露出したIC
チツプを絶縁性のシート状基材中にその表面がシ
ート状基材表面と同一平面上に露出し、かつ側面
がシート状基材に密着するように埋め込んだ後、
前記シート状基材上に少なくとも前記ICチツプ
のボンデイングパツドに接続される導体パターン
を形成する工程を含むことを特徴とする。
The method for manufacturing an IC card according to the present invention includes an IC card in which at least the bonding pad portion on the surface is exposed.
After embedding the chip in an insulating sheet-like base material so that its surface is exposed on the same plane as the sheet-like base material surface and the side surface is in close contact with the sheet-like base material,
The method is characterized in that it includes a step of forming at least a conductor pattern connected to a bonding pad of the IC chip on the sheet-like base material.
ここで、シート状基材としては塩化ビニル等の
熱可塑性樹脂や、エポキシ等の網状化反応を起こ
して硬化する硬化性樹脂を用いることができる。
ICチツプの埋め込み工程については、シート状
基材に熱可塑性樹脂を用いる場合には例えばシー
ト状基材の凹部にICチツプを収納し、熱プレス
によりシート状基材を塑性変形させればよく、ま
たシート状基材に硬化性樹脂を用いる場合は、例
えば平板状の支持体の上にICチツプをボンデイ
ングパツドが形成された面が支持体に接するよう
に配置し、その上に硬化性樹脂を注型して、それ
を網状化反応により硬化させて全体をモールドす
ればよい。 Here, as the sheet-like base material, a thermoplastic resin such as vinyl chloride, or a curable resin such as epoxy that hardens by causing a reticulation reaction can be used.
Regarding the process of embedding the IC chip, if thermoplastic resin is used for the sheet-like base material, for example, the IC chip may be housed in the recess of the sheet-like base material, and the sheet-like base material may be plastically deformed by heat pressing. In addition, when using a curable resin for the sheet-like base material, for example, place the IC chip on a flat support so that the surface on which the bonding pad is formed is in contact with the support, and then apply the curable resin on top of the IC chip. The entire material may be molded by casting and curing it through a reticulation reaction.
この場合、導体パターンの形成はICチツプの
表面とシート状基材の表面とが同一平面上にあ
り、かつICチツプの側面が絶縁性のカード基材
で被覆されているため、スクリーン印刷、オフセ
ツト印刷、またはデイスペンサー方式等の所望の
図形となるようにインクを吐出するノズルを移動
させながら描画する方式により、ICチツプとの
接続部分の導体路形成，回路網の形成、あるいは
導体路および回路網の同時形成を行なうことがで
きる。導体パターンに使用する導体材料として
は、例えば樹脂中に導電性粉末を含有させたペー
ストを用いることができる。導電性粉末として
は、通常の金属粉末，半導電性粉末，金属酸化物
粉末等が挙げられる。例えばAg，Au，Pt，Cu，
Ni，Sn，Ｗ，Mo，Pd，SiC，Ｃ，RuO2等であ
る。粉末の種類によつて異なるが、例えばAgの
場合は70［wt％］以上の含有率で導電性を示し、
他の材料もほぼ同様であり、少なくとも導電性を
示す程度に含ませればよい。 In this case, the surface of the IC chip and the surface of the sheet-like base material are on the same plane, and the sides of the IC chip are covered with an insulating card base material, so the conductor pattern can be formed using screen printing or offset. Forming conductor paths at the connection part with an IC chip, forming a circuit network, or forming conductor paths and circuits by printing or a method such as a dispenser method that draws while moving a nozzle that discharges ink to form a desired shape. Simultaneous formation of the net can be performed. As the conductor material used for the conductor pattern, for example, a paste containing conductive powder in resin can be used. Examples of the conductive powder include ordinary metal powder, semiconductive powder, and metal oxide powder. For example, Ag, Au, Pt, Cu,
These include Ni, Sn, W, Mo, Pd, SiC, C, RuO2, etc. Although it varies depending on the type of powder, for example, in the case of Ag, it shows conductivity at a content of 70 [wt%] or more,
Other materials are also substantially the same, and may be included to the extent that they exhibit at least electrical conductivity.
本発明によれば、シート状基材そのものを配線
基板とし、かつ搭載されるICチツプも基板の中
に埋め込まれた形でマウントされるため、印刷に
よるICチツプの端子接続および回路網の形成が
可能となり、薄型化が極めて容易でかつ簡単な工
程で製造可能なICカードを得ることができる。
According to the present invention, the sheet-like base material itself is used as a wiring board, and the mounted IC chip is also mounted embedded in the board, making it possible to connect the terminals of the IC chip and form a circuit network by printing. This makes it possible to obtain an IC card that can be extremely easily made thin and manufactured through a simple process.
実施例 １
第１図は本発明の一実施例の製造工程を示す断
面図である。まず第１図ａに示すようにICチツ
プと同じ厚み、すなわち0.45mm程度の厚さを持つ
第１の塩化ビニル樹脂シート１を用意し、これに
縦横寸法がICチツプのそれより100μm程度大きい
開口２を形成する。
Example 1 FIG. 1 is a sectional view showing the manufacturing process of an example of the present invention. First, as shown in Figure 1a, a first vinyl chloride resin sheet 1 having the same thickness as the IC chip, that is, about 0.45 mm, is prepared, and an aperture with vertical and horizontal dimensions about 100 μm larger than that of the IC chip is prepared. form 2.
次に、第１図ｂに示すように第１の塩化ビニル
シート１に対し厚さ0.1mm程度の第２の塩化ビニ
ル樹脂シート３を裏打ちすることによつて、開口
２の部分に第２の塩化ビニルシート３を底面とす
る凹部４を形成し、この凹部４内にICチツプ５
をその表面、すなわちボンデイングパツド部６の
形成された面を上側にして収納する。ICチツプ
５は表面が全て露出した裸の状態のものでもよい
し、ボンデイングパツド部６のみが露出し他の部
分は絶縁性のの被覆が施されたものでもよい。 Next, as shown in FIG. 1b, by lining the first vinyl chloride sheet 1 with a second vinyl chloride resin sheet 3 having a thickness of approximately 0.1 mm, a second vinyl chloride resin sheet 3 is formed in the opening 2. A recess 4 is formed with the vinyl chloride sheet 3 as the bottom surface, and an IC chip 5 is placed in the recess 4.
is stored with its surface, that is, the surface on which the bonding pad portion 6 is formed, facing upward. The IC chip 5 may be in a bare state with the entire surface exposed, or may be one in which only the bonding pad portion 6 is exposed and the other portions are coated with an insulating material.
次に、全体を熱プレスして第１および第２の塩
化ビニル樹脂シート１，３を塑性変形させること
により、第１図Ｃに示すように凹部４とICチツ
プ５との間の空隙に塩化ビニル樹脂を充填させる
と共に、塩化ビニル樹脂シート１，３を互いに融
着させ、ICチツプ５の表面と同一平面を持つシ
ート状基材７を得る。この時、プレス条件として
は熱プレス用の熱盤温度190℃、冷却圧力
18.6Kgf／cm2を用いたが、前述の現象が得られる
ならば、特にこの条件に拘泥するものではない。 Next, by hot-pressing the whole to plastically deform the first and second vinyl chloride resin sheets 1 and 3, the chloride is added to the gap between the recess 4 and the IC chip 5, as shown in FIG. 1C. While filling with vinyl resin, the vinyl chloride resin sheets 1 and 3 are fused together to obtain a sheet-like base material 7 having the same plane as the surface of the IC chip 5. At this time, the pressing conditions were a hot press platen temperature of 190℃, and a cooling pressure.
Although 18.6Kgf/cm 2 was used, this condition is not particularly restrictive as long as the above-mentioned phenomenon can be obtained.
そして、次に第１図ｄに示すようにシート状基
材７上に、導電性ペーストとして例えば塩化ビニ
ル樹脂をバインダとする銀ペーストを印刷し、溶
剤を揮散させて導体パターン８，９を形成する。
この時、ICチツプ３との接続部分の導体パター
ン８と回路網部分の導体パターン９とは、一回の
印刷で形成しても良いし、二回の印刷に分けて形
成しても良い。また、必要に応じてこの上にさら
に導体層を形成して多層にすることも可能であ
る。 Then, as shown in FIG. 1d, a conductive paste such as a silver paste using vinyl chloride resin as a binder is printed on the sheet-like base material 7, and the solvent is evaporated to form conductive patterns 8 and 9. do.
At this time, the conductor pattern 8 in the connection portion with the IC chip 3 and the conductor pattern 9 in the circuit network portion may be formed by one printing or may be formed by two printings. Moreover, it is also possible to further form a conductor layer on top of this to form a multilayer structure, if necessary.
この後、シート状基材７の表裏面にデザインの
印刷を施した塩化ビニル樹脂よりなるカバーシー
トを仮止めし、熱プレスすることによりカバーシ
ートをシート状基材７と融着させ、さらに外形の
打ち抜き加工をすることにより、厚さ0.76mmのIC
カードが得られた。 After this, a cover sheet made of vinyl chloride resin with a design printed on the front and back sides of the sheet-like base material 7 is temporarily attached, and the cover sheet is fused to the sheet-like base material 7 by hot pressing, and the outer shape is 0.76mm thick IC by punching
Got the card.
実施例 ２
第２図は本発明の他の実施例の製造工程を示す
断面図である。この実施例においては、まず第２
図ａに示すようにガラス板等の表面が平滑で、か
つ透明性のある平板上に粘着性と離型性とを備え
た被覆、例えばシリコーン樹脂（東芝シリコン社
製TSE3051）をコーテイングした第１の支持体
１１を用意し、その上にICチツプ５をボンデイ
ングパツド部６の形成された面が第１の支持体１
１の表面と接触するように載せる。Embodiment 2 FIG. 2 is a sectional view showing the manufacturing process of another embodiment of the present invention. In this example, first the second
As shown in Figure a, a first coated flat plate with a smooth and transparent surface such as a glass plate is coated with a coating having adhesiveness and releasability, such as silicone resin (TSE3051 manufactured by Toshiba Silicon Corporation). A support 11 is prepared, and the IC chip 5 is placed on it so that the surface on which the bonding pad portion 6 is formed is the first support 11.
Place it so that it is in contact with the surface of 1.
次いで、第２図ｂに示すように第１の支持体１
１の周囲に厚さが0.5mmで最終的に得たいICカー
ドの外形に等しい形状に内部が打ち抜かれたスペ
ーサ１３を配置し、このスペーサ１３の内側にエ
ポキシ樹脂を主体とする紫外線硬化樹脂１４を注
型し、さらに上側を第１の支持体１１と同様の第
２の支持体１２で覆つた後、紫外線照射炉等の強
力な紫外線源の下にさらすことにより、紫外線硬
化樹脂１４に網状化反応を起こさせ硬化させる。
そして、さらに150℃のオーブン中に15分間放置
することにより、紫外線硬化性樹脂１４を完全に
硬化させる。その後、第１および第２の支持体１
１，１２を剥がし、スペーサ１３を除去すること
により、第２図ｃに示すようなICチツプ５の表
面と同一平面を持つシート状基材１５を得る。 Next, as shown in FIG. 2b, the first support 1 is
A spacer 13 having a thickness of 0.5 mm and whose inside is punched out in a shape equal to the outer shape of the IC card to be finally obtained is placed around the spacer 1, and an ultraviolet curing resin 14 mainly made of epoxy resin is placed inside the spacer 13. After casting and further covering the upper side with a second support 12 similar to the first support 11, the ultraviolet curable resin 14 is exposed to a strong ultraviolet source such as an ultraviolet ray irradiation furnace to form a reticulated resin. It causes a chemical reaction and hardens.
Then, the ultraviolet curable resin 14 is completely cured by leaving it in an oven at 150° C. for 15 minutes. After that, the first and second supports 1
1 and 12 and remove the spacer 13, a sheet-like base material 15 having the same plane as the surface of the IC chip 5 as shown in FIG. 2c is obtained.
そして、第２図ｄに示すようにシート状基材１
５の上に、導電性ペーストとして平均分子量2500
のエポキシ樹脂をバインダとするAgペーストを
デイスペンサ１６により描画し、さらに150℃で
１時間キユアーすることにより、バインダである
エポキシ樹脂を硬化させて導体パターンを８，９
を形成した。 Then, as shown in FIG. 2d, the sheet-like base material 1
5 with an average molecular weight of 2500 as a conductive paste.
An Ag paste with epoxy resin as a binder is drawn with the dispenser 16, and further cured at 150°C for 1 hour to harden the epoxy resin as a binder and form conductor patterns 8 and 9.
was formed.
この後、シート状基材１５の表裏面にカードの
外形寸法と等しく、かつデザインの印刷を適宜施
した厚さ0.13mmの熱可塑性樹脂より成るカバーシ
ートを接着したところ、厚さ0.76mmのICカードが
得られた。 After that, a cover sheet made of thermoplastic resin with a thickness of 0.13 mm and having the same external dimensions as the card and appropriately printed with a design was adhered to the front and back surfaces of the sheet-like base material 15. Got the card.
実施例 ３
本発明のさらに別の実施例として、実施例２に
おいて注型した樹脂として前記紫外線硬化樹脂に
代えてエポキシ樹脂を用い、150℃、４時間の条
件で熱硬化せしめたところ、実施例２と同様の結
果が得られた。Example 3 As yet another example of the present invention, an epoxy resin was used instead of the ultraviolet curable resin as the cast resin in Example 2, and was thermally cured at 150°C for 4 hours. Results similar to those of 2 were obtained.
なお、本発明は上記した実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変
形実施することが可能である。 Note that the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the spirit of the invention.
第１図ａ〜ｄは本発明の一実施例に係るICカ
ードの製造工程を説明するための断面図、第２図
ａ〜ｄは本発明の他の実施例に係るICカードの
製造工程を説明するための断面図である。
１，３…塩化ビニルシート、２…開口、４…凹
部、５…ICチツプ、６…ボンデイングパツド部、
７，１５カード状基体、８，９…導体パターン、
１１，１２…支持体、１３…スペーサ、１４…紫
外線硬化樹脂。
1A to 1D are cross-sectional views for explaining the manufacturing process of an IC card according to one embodiment of the present invention, and FIGS. 2A to 2D are sectional views for explaining the manufacturing process of an IC card according to another embodiment of the present invention. It is a sectional view for explanation. DESCRIPTION OF SYMBOLS 1, 3... Vinyl chloride sheet, 2... Opening, 4... Recessed part, 5... IC chip, 6... Bonding pad part,
7, 15 card-like substrate, 8, 9... conductor pattern,
11, 12... Support, 13... Spacer, 14... Ultraviolet curing resin.
Claims (1)
出したICチツプを絶縁性のシート状基材中に、
表面が該シート状基材表面と同一平面上に露出
し、かつ側面がシート状基材に密着するように埋
め込んだ後、前記シート状基材上に少なくとも前
記ICチツプのボンデイングパツドに接続される
導体パターンを形成する工程を含むことを特徴と
するICカードの製造方法。 ２ 前記シート状基材への前記ICチツプの埋め
込み工程に熱プレスを用いることを特徴とする特
許請求の範囲第１項記載のICカードの製造方法。 ３ 前記シート状基材へのICチツプの埋め込み
工程に注型法を用いることを特徴とする特許請求
の範囲第１項記載のICカードの製造方法。 ４ 注型法に用いる樹脂として、網状化反応によ
り硬化する硬化性樹脂を用いることを特徴とする
特許請求の範囲第３項記載のICカードの製造方
法。[Claims] 1. An IC chip with at least the bonding pad portion exposed on the surface is placed in an insulating sheet-like base material,
After embedding so that the surface is exposed on the same plane as the surface of the sheet-like base material and the side surface is in close contact with the sheet-like base material, the IC chip is connected to at least the bonding pad of the IC chip on the sheet-like base material. A method for manufacturing an IC card, comprising the step of forming a conductor pattern. 2. The method for manufacturing an IC card according to claim 1, wherein a heat press is used in the step of embedding the IC chip in the sheet-like base material. 3. The method for manufacturing an IC card according to claim 1, wherein a casting method is used in the step of embedding the IC chip in the sheet-like base material. 4. The method for manufacturing an IC card according to claim 3, wherein a curable resin that is cured by a reticulation reaction is used as the resin used in the casting method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59196206A JPS6175488A (en) | 1984-09-19 | 1984-09-19 | Manufacture of ic card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59196206A JPS6175488A (en) | 1984-09-19 | 1984-09-19 | Manufacture of ic card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6175488A JPS6175488A (en) | 1986-04-17 |
| JPH0370272B2 true JPH0370272B2 (en) | 1991-11-07 |
Family
ID=16353959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59196206A Granted JPS6175488A (en) | 1984-09-19 | 1984-09-19 | Manufacture of ic card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6175488A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH074995B2 (en) * | 1986-05-20 | 1995-01-25 | 株式会社東芝 | IC card and method of manufacturing the same |
| JP4056360B2 (en) | 2002-11-08 | 2008-03-05 | 沖電気工業株式会社 | Semiconductor device and manufacturing method thereof |
| JP6128495B2 (en) * | 2012-07-04 | 2017-05-17 | パナソニックＩｐマネジメント株式会社 | Electronic component mounting structure, IC card, COF package |
-
1984
- 1984-09-19 JP JP59196206A patent/JPS6175488A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6175488A (en) | 1986-04-17 |
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