JPH0366656B2 - - Google Patents

Info

Publication number
JPH0366656B2
JPH0366656B2 JP6137284A JP6137284A JPH0366656B2 JP H0366656 B2 JPH0366656 B2 JP H0366656B2 JP 6137284 A JP6137284 A JP 6137284A JP 6137284 A JP6137284 A JP 6137284A JP H0366656 B2 JPH0366656 B2 JP H0366656B2
Authority
JP
Japan
Prior art keywords
film
mask
etching
glass substrate
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP6137284A
Other languages
Japanese (ja)
Other versions
JPS60202441A (en
Inventor
Yaichiro Watakabe
Hiroaki Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59061372A priority Critical patent/JPS60202441A/en
Publication of JPS60202441A publication Critical patent/JPS60202441A/en
Publication of JPH0366656B2 publication Critical patent/JPH0366656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/54Absorbers, e.g. of opaque materials

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、半導体装置の製造に使用するパタ
ーン形成マスクの改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to improvements in pattern forming masks used in the manufacture of semiconductor devices.

〔従来技術〕[Prior art]

第1図は従来の半導体装置の製造に使用するパ
ターン形成マスクの被着状態を示すもので、この
図において、1は石英等からなる透明のガラス基
板、2はクロム(Cr)等の金属薄膜で、これは
蒸着またはスパツタリング法により前記ガラス基
板1上に600Åないし800Åの膜厚に形成されてい
る。
Figure 1 shows how a pattern forming mask used in the manufacture of conventional semiconductor devices is applied. This is formed on the glass substrate 1 to a thickness of 600 Å to 800 Å by vapor deposition or sputtering.

従来の半導体装置用パターン形成マスクは、上
記のようにCrを使用したハードマスクが一般に
使用されている。しかしながら、このCrのウエ
ツトエツチングでは高精度マスクの製造が困難で
あり、また、ドライエツチングでは高精度のもの
が得られるが、Crエツチング速度が約100Å/
min以下で能率が悪く、かつ、併用されるレジス
トの選択比も悪いため量産に適していなかつた。
As a conventional pattern forming mask for a semiconductor device, a hard mask using Cr as described above is generally used. However, with wet etching of Cr, it is difficult to manufacture a high-precision mask, and with dry etching, a high-precision mask can be obtained, but the Cr etching rate is about 100 Å/
It was not suitable for mass production because the efficiency was poor when it was less than min, and the selectivity of the resist used in combination was also poor.

〔発明の概要〕[Summary of the invention]

この発明は、上記従来のものの欠点を除去する
ためになされたもので、具体的には石英等からな
るガラス基板上に、膜厚が500Åないし1000Åで
ある、モリブデン(Mo)またはタングステン
(W)あるいはタンタル(Ta)のシリサイド化膜
を形成し、これをパターン形成マスクとして使用
することを特徴とするものである。
This invention was made in order to eliminate the drawbacks of the above-mentioned conventional methods. Specifically, molybdenum (Mo) or tungsten (W) having a film thickness of 500 Å to 1000 Å is deposited on a glass substrate made of quartz or the like. Alternatively, a tantalum (Ta) silicide film is formed and this is used as a pattern forming mask.

ところで、半導体装置の製造に使用されるパタ
ーン形成マスクは、初期においてはガラス基板を
用いた写真乳剤乾板を利用していたが、高集積
化、微細化が進むにつれて、現在ではガラス基板
上にCr等の金属薄膜からなる、いわゆるハード
マスクが広く使用されている。このようなCr等
の金属薄膜は蒸着またはスパツタリング法により
約600Åないし800Åの膜厚に形成され、その所要
のマスク化には、この金属薄膜上にフオトレジス
トまたは電子ビーム(EB)用レジスト等を適宜
塗布した後、これに光またはEBにより所要のパ
ターンを描画した後、現像、エツチング等の工程
を経て作られる。
By the way, pattern forming masks used in the manufacture of semiconductor devices initially used photographic emulsion dry plates with glass substrates, but as higher integration and miniaturization progress, they are now made using Cr on glass substrates. So-called hard masks, which are made of metal thin films such as these, are widely used. Such a metal thin film such as Cr is formed to a thickness of approximately 600 Å to 800 Å by vapor deposition or sputtering, and to create the required mask, photoresist or electron beam (EB) resist, etc., is applied on this metal thin film. After applying the appropriate coating, a desired pattern is drawn on it using light or EB, and then it is created through processes such as development and etching.

なお、この際のエツチングは金属薄膜がCrの
場合、ウエツト法では硝酸第二セリウムアンモン
と過塩素酸で行い、また、ドライ法では四塩化炭
素(CCl4)と酸素(O2)の混合ガスで行うが、
半導体装置が特にVLSI等のように高集積化、微
細パターンを有する場合にはドライエツチング法
が有利であることが知られている。以下、この発
明について説明する。
Note that if the metal thin film is Cr, etching is performed using ceric ammonium nitrate and perchloric acid in the wet method, or with a mixed gas of carbon tetrachloride (CCl 4 ) and oxygen (O 2 ) in the dry method. I will do it with
It is known that the dry etching method is advantageous especially when the semiconductor device is highly integrated and has a fine pattern, such as VLSI. This invention will be explained below.

〔発明の実施例〕[Embodiments of the invention]

第2図はこの発明の一実施例を示すもので、こ
の図において、1は石英等からなる透明のガラス
基板、3はスパツタリング法等で形成したモリブ
デン(Mo)またはタングステン(W)あるいは
タンタル(Ta)のシリサイド化膜であり、その
膜厚を500Åないし1000Å程度の薄膜にしたもの
であり、この範囲の膜厚に形成する場合には、特
にICB(Ionized Cruster Beam)法で行えば高精
度のものが得られる。
FIG. 2 shows an embodiment of the present invention. In this figure, 1 is a transparent glass substrate made of quartz or the like; 3 is molybdenum (Mo), tungsten (W), or tantalum ( It is a silicided film of Ta) with a thickness of about 500 Å to 1000 Å, and when forming a film with a thickness in this range, it can be formed with high accuracy, especially if performed using the ICB (Ionized Cluster Beam) method. You can get the following.

上記のようにして、ガラス基板1上に被着させ
たシリサイド化膜3上にフオトレジストまたは
EBレジストを約500Å程度の厚さに塗布した後、
光またはEBで所定のパターンを描画する。その
後、現像処理を経て当該シリサイド化膜3のエツ
チングを行う。この場合のエツチングはドライ法
で容易に行える。
As described above, photoresist or
After applying EB resist to a thickness of about 500Å,
Draw a predetermined pattern with light or EB. Thereafter, the silicided film 3 is etched through a development process. Etching in this case can be easily performed using a dry method.

具体的には、Moのシリサイド化膜3の場合に
はCF4+O2(2%)の混合ガスを使用し、0.2Torr
の真空度とし、300Wの条件下でエツチングを行
うと約1000Å/minのエツチングスピードで所期
の加工が終了する。このエツチングスピードは、
従来のCrのドライエツチングスピードに比べ約
1/10になつている。
Specifically, in the case of the Mo silicide film 3, a mixed gas of CF 4 +O 2 (2%) is used, and the temperature is 0.2 Torr.
When etching is performed at a vacuum level of 300 W, the desired processing is completed at an etching speed of approximately 1000 Å/min. This etching speed is
The dry etching speed is approximately 1/10 compared to conventional Cr dry etching speed.

この様に膜厚が500Å〜1000Åのシリサイド化
膜をエツチング除去してパターン化したマスク
は、マスクとしての所望の光学濃度が得られたと
ともに、膜厚が500Å以上であるため、シリサイ
ド化膜にピンホールなどの欠陥も生じることがな
く、かつ膜厚が1000Å以下であるので、微細パタ
ーンが形成できた。
In this way, the patterned mask obtained by etching away the silicide film with a thickness of 500 Å to 1000 Å has the desired optical density as a mask, and since the film thickness is 500 Å or more, the silicide film is Since defects such as pinholes did not occur and the film thickness was less than 1000 Å, fine patterns could be formed.

以上はMoのシリサイド化膜3の場合について
説明したが、WあるいはTaのシリサイド化膜3
の場合であつてもよく、同様の効果が得られる。
The case of the Mo silicide film 3 has been explained above, but the W or Ta silicide film 3 has been explained above.
It is also possible to obtain the same effect.

その他、これらこの発明のシリサイド化膜3は
ガラス基板1との接着性も従来の場合に比べ極め
てよい。
In addition, the silicided film 3 of the present invention has extremely good adhesion to the glass substrate 1 compared to the conventional case.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、この発明は、ガラス基板
上に、膜厚が500Åないし1000Åである、Moま
たはWあるいはTa等のシリサイド化膜を形成し、
これをパターン形成マスクとして使用するように
しているので、マスクとしての所望の光学濃度が
得られ、エツチング速度が従来のCrの金属薄膜
に比べ極めて早く、しかも、微細パターンが容易
に得られ、かつ、ガラス基板に対する接着強度も
大きいので、信頼性の高いものが得られるという
利点がある。
As explained above, the present invention forms a silicided film of Mo, W, Ta, etc. with a film thickness of 500 Å to 1000 Å on a glass substrate,
Since this is used as a pattern forming mask, the desired optical density as a mask can be obtained, the etching speed is extremely fast compared to conventional Cr metal thin films, and fine patterns can be easily obtained. Since the adhesion strength to the glass substrate is also high, there is an advantage that a highly reliable product can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は金属薄膜を使用した従来の半導体装置
用パターン形成マスクの被着状態を示す断面図、
第2図はシリサイド化膜を使用したこの発明の半
導体装置用パターン形成マスクの被着状態を示す
断面図である。 図中、1はガラス基板、2は金属薄膜、3はシ
リサイド化膜、4はポリシリコン膜である。な
お、図中の同一符号は同一または相当部分を示
す。
FIG. 1 is a cross-sectional view showing the deposition state of a conventional pattern forming mask for semiconductor devices using a metal thin film;
FIG. 2 is a sectional view showing a state in which a pattern forming mask for a semiconductor device of the present invention using a silicided film is applied. In the figure, 1 is a glass substrate, 2 is a metal thin film, 3 is a silicided film, and 4 is a polysilicon film. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 ガラス基板と、このガラス基板上に設けられ
たマスクブランク材とを有し、このマスクブラン
ク材が500Åないし1000Åの膜厚でモリブデンま
たはタンタルあるいはタングステンのシリサイド
化膜よりなる半導体装置用マスクブランク。
1. A mask blank for a semiconductor device, which includes a glass substrate and a mask blank material provided on the glass substrate, and the mask blank material is made of a silicided film of molybdenum, tantalum, or tungsten with a film thickness of 500 Å to 1000 Å.
JP59061372A 1984-03-27 1984-03-27 Mask for forming pattern for semiconductor device Granted JPS60202441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59061372A JPS60202441A (en) 1984-03-27 1984-03-27 Mask for forming pattern for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59061372A JPS60202441A (en) 1984-03-27 1984-03-27 Mask for forming pattern for semiconductor device

Publications (2)

Publication Number Publication Date
JPS60202441A JPS60202441A (en) 1985-10-12
JPH0366656B2 true JPH0366656B2 (en) 1991-10-18

Family

ID=13169271

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59061372A Granted JPS60202441A (en) 1984-03-27 1984-03-27 Mask for forming pattern for semiconductor device

Country Status (1)

Country Link
JP (1) JPS60202441A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62153957A (en) * 1985-12-27 1987-07-08 Hoya Corp Photomask blank and photomask
JPH0650387B2 (en) * 1986-03-31 1994-06-29 アルバツク成膜株式会社 Photomask and manufacturing method thereof
JPH0650388B2 (en) * 1986-04-04 1994-06-29 アルバツク成膜株式会社 Photomask and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157247A (en) * 1981-03-23 1982-09-28 Nec Corp Optical exposure mask

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157247A (en) * 1981-03-23 1982-09-28 Nec Corp Optical exposure mask

Also Published As

Publication number Publication date
JPS60202441A (en) 1985-10-12

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