JPH0365819A - Automatic frequency control circuit - Google Patents

Automatic frequency control circuit

Info

Publication number
JPH0365819A
JPH0365819A JP1202466A JP20246689A JPH0365819A JP H0365819 A JPH0365819 A JP H0365819A JP 1202466 A JP1202466 A JP 1202466A JP 20246689 A JP20246689 A JP 20246689A JP H0365819 A JPH0365819 A JP H0365819A
Authority
JP
Japan
Prior art keywords
frequency
clock
crystal oscillator
phase comparator
recovery section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1202466A
Other languages
Japanese (ja)
Inventor
Takahiro Chihara
千原 隆宏
Masao Miyazaki
正夫 宮崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1202466A priority Critical patent/JPH0365819A/en
Publication of JPH0365819A publication Critical patent/JPH0365819A/en
Pending legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To exclude the effect onto a demodulation characteristic due to a temperature change without need of an exclusive reference crystal oscillator by providing a phase comparator using an oscillated output from a voltage controlled crystal oscillator used at a clock recovery section of a demodulation circuit as a reference frequency. CONSTITUTION:An oscillated output of a voltage controlled crystal oscillator (VCXO) 12 used in a PLL of a clock recovery section 11 recovering a clock for demodulating an MSK (Minimum Shift Keying) signal from the standpoint of frequency stability is used for a reference frequency of a phase comparator 8. Then the PLL of the clock recovery section 11 follows the clock at the sender side with highly stable state when the clock is recovered. Thus, no exclusive reference oscillator is required and the frequency stability of the recovered clock is equal to that at the sender side and the effect due to temperature change is not affected.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、復調回路の前段に設けられた自動周波数制御
回路(以下、’ A F C(Autosatic F
requency Control) Jという)に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an automatic frequency control circuit (hereinafter referred to as 'AFC) provided before a demodulation circuit.
This is related to the requency control (referred to as J).

藍朱立致恵 従来、無線によるディジタル信号の伝送方式の1つとし
てM S K (Minis+uw 5hift Ke
ying)方式がtl案されている。即ち、このMSK
方式は位相が連続な変調指数0.5のF S K (F
requency 5hift Keying)であり
、クロックを0.1のディジタル信号で周波数変調して
いるため、定包絡線となって非線形歪に強いと謂う長所
を持っている。そして、従来ではこのM S K信号の
復調を行なうために、送信側のクロックに位相同期した
クロック再生を受信側で行なって復調する同期検波方式
の復調回路を設けており、そのクロック再生に使用され
るPLL回路の周波数引き込み範囲を狭くしてループ雑
音を抑える必要性から、復調回路の前段にAFC回路を
設けて周波数誤差を小さくするようにし、ノイズに対す
る復調特性を向上させていた。
Chie Aishutachi Traditionally, one of the wireless digital signal transmission methods was MSK (Minis+uw 5hift Ke
ying) method has been proposed. That is, this MSK
The method is FSK (F
Since the clock is frequency-modulated with a digital signal of 0.1, it has a constant envelope and has the advantage of being resistant to nonlinear distortion. Conventionally, in order to demodulate this MSK signal, a demodulation circuit using a synchronous detection method is provided, which performs clock recovery on the receiving side that is phase-synchronized with the clock on the transmitting side and demodulates it. Because of the need to narrow the frequency pull-in range of the PLL circuit to suppress loop noise, an AFC circuit was provided before the demodulation circuit to reduce frequency errors and improve demodulation characteristics against noise.

具体的に、斯るAFC回路は第2図に示す如く構成され
ており、(1)は高い周波数f、、4のMSK信号が入
力される信号入力端子、(2)は後述する電圧制御発振
器の発振周波数fLoの出力と混合して中間の周波数f
、に周波数変換する混合器、(3)は中間の周波数re
−l fi、 fLolのMSK信号を取り出すための
帯域通過フィルター、(4)はMSK信号を同期検波方
式で復調するMSK復調器。
Specifically, such an AFC circuit is configured as shown in Fig. 2, where (1) is a signal input terminal into which a high frequency MSK signal of f, 4 is input, and (2) is a voltage controlled oscillator which will be described later. The intermediate frequency f is mixed with the output of the oscillation frequency fLo of
, (3) is the intermediate frequency re
-l fi, a bandpass filter for extracting the MSK signal of fLol; (4) is an MSK demodulator that demodulates the MSK signal using a synchronous detection method;

(5)は周波数f、のMSK信号を1/m分周する第1
分周器、(6)は基準周波数f IEFを出力する基準
水晶発振器、(7)はその基準周波数f l1tFを1
/nに分周する第2分周器、(8)は第1.第2分周器
(5) (7)からの分周出力を比較してその周波数の
ズレ、即ち位相差を検出する位相比較器、(9)はルー
プフィルター(10)を通して供給される位相比較器(
8)の出力に基づいてその発振周波数が制御される電圧
制御発振器(以下、rVcOJという)である。
(5) is the first frequency dividing the MSK signal of frequency f by 1/m.
Frequency divider, (6) is a reference crystal oscillator that outputs the reference frequency f IEF, (7) is the reference frequency f l1tF that is 1
/n, the second frequency divider (8) is the first frequency divider. A phase comparator that compares the divided outputs from the second frequency divider (5) and (7) to detect a frequency shift, that is, a phase difference, and (9) is a phase comparator that is supplied through the loop filter (10). vessel(
This is a voltage controlled oscillator (hereinafter referred to as rVcOJ) whose oscillation frequency is controlled based on the output of 8).

従って、MSK復調器(4)に入力される周波数f、の
MSK信号は一旦第1分周器(5)で1/m分周された
後、位相比較器(8)により1 / n分周された基準
周波数f ltFと比較されてその周波数ズレが検出さ
れることになり、この検出された周波数ズレに基づいて
V CO(9)の発振周波数を変化させることで、MS
K信号が常に一定の周波数foに保たれるようになって
いる。
Therefore, the MSK signal of frequency f input to the MSK demodulator (4) is once divided by 1/m by the first frequency divider (5), and then divided by 1/n by the phase comparator (8). The MS
The K signal is always kept at a constant frequency fo.

例えば、信号入力端子(1)に入力されるM S K信
号の周波数foがΔf変動してf’IN””flN+Δ
fになった場合、その変動分Δfに比例した位相比較器
(8)からの出力により、V CO(9)の発振周波数
が直ちにrtoからr’toになるので、帯域通過フィ
ルター(3)から取り出される周波数fl はto” 
=lf’+w  f’Lol=l  (f+N+Δf)
   (f、。+Δf)l −l f+N−fLol 
xf、となる、従って、MSK復調器(4)に入力され
るMSK信号の周波数は常にf、に保たれ、基準水晶発
振器(6)と同等な安定度が得られることになる。
For example, the frequency fo of the MSK signal input to the signal input terminal (1) fluctuates by Δf, resulting in f'IN""flN+Δ
f, the output from the phase comparator (8) proportional to the variation Δf causes the oscillation frequency of the V CO (9) to immediately change from rto to r'to. The extracted frequency fl is to”
=lf'+w f'Lol=l (f+N+Δf)
(f,.+Δf)l −l f+N−fLol
Therefore, the frequency of the MSK signal input to the MSK demodulator (4) is always maintained at f, and stability equivalent to that of the reference crystal oscillator (6) is obtained.

B < ゛ しよ゛と る昔 ところが、斯る従来構成のAFC回路では、それ専用の
基準水晶発振器を必要とし、またこの基準水晶発振器の
温度変化に対する周波数安定度も問題となり、コストの
上昇と復調特性の劣化を招いていた。
In the past, AFC circuits with such conventional configurations required a dedicated reference crystal oscillator, and the frequency stability of this reference crystal oscillator against temperature changes also became a problem, leading to increased costs and This resulted in deterioration of demodulation characteristics.

本発明はこのような点に鑑み威されたものであって、専
用の基準発振器を必要とせず、しかも温度変化に左右さ
れない復調特性が得られるAFC回路を提供することを
目的とする。
The present invention has been developed in view of these points, and it is an object of the present invention to provide an AFC circuit that does not require a dedicated reference oscillator and can obtain demodulation characteristics that are not affected by temperature changes.

゛ るための 上記の目的を達成するため本発明では、復調回路の前段
に設けられ、その復調回路に入力される被変調信号の周
波数制御を行なう自動周波数制御回路において、前記復
調回路のクロック再生部で用いられる電圧制御水晶発振
器からの発振出力を基準周波数として用いる位相比較器
を備えたものである。
In order to achieve the above object, the present invention provides an automatic frequency control circuit that is provided before a demodulation circuit and controls the frequency of a modulated signal input to the demodulation circuit. It is equipped with a phase comparator that uses the oscillation output from the voltage-controlled crystal oscillator used in the section as a reference frequency.

止−里 このような構成のAFC回路によると、位相比較器で用
いる基準信号の安定度は、送信側のクロックの周波数安
定度と同等になり、また専用の基準水晶発振器が不要に
なる。
According to the AFC circuit configured as described above, the stability of the reference signal used in the phase comparator becomes equal to the frequency stability of the clock on the transmitting side, and a dedicated reference crystal oscillator is not required.

大」(班 以下、本発明のAFC回路について図面と共に説明する
。尚、従来と同一部分については同一符号を付すと共に
その説明を省略する。
Hereinafter, the AFC circuit of the present invention will be explained with reference to the drawings.The same parts as those of the conventional one will be given the same reference numerals and the explanation thereof will be omitted.

本実施例では第1図に示すようにMSK信号の復調のた
めのクロックを再生するクロック再生部(11)のPL
Lで周波数安定度の点から使用される電圧制御水晶発振
器(以下、rvcxo、という) (12)の発振出力
を、位相比較器(8)の基準周波数として用いるように
したものである。
In this embodiment, as shown in FIG.
The oscillation output of a voltage controlled crystal oscillator (hereinafter referred to as rvcxo) (12) used in L from the viewpoint of frequency stability is used as the reference frequency of the phase comparator (8).

即ち、クロック再生部(11)のPLLはそのクロック
再生が確立されると高安定な送信側のクロックに追従す
ることになるので、再生されたクロックの周波数安定度
は送信側と同等になり温度変化による影響を受けなくな
るからである。従って、このvCX○(12)の出力信
号を位相比較器(8)の基準周波数に用いると、温度変
化によって周波数変動を起こす虞れがなくなり、温度変
化に対する復調特性の劣化が妨げることになる。
In other words, once the clock regeneration is established, the PLL of the clock regeneration unit (11) will follow the highly stable clock on the transmitting side, so the frequency stability of the regenerated clock will be the same as that on the transmitting side, and the temperature will change. This is because they are no longer affected by change. Therefore, if the output signal of this vCX○ (12) is used as the reference frequency of the phase comparator (8), there is no risk of frequency fluctuation due to temperature changes, and deterioration of demodulation characteristics due to temperature changes is prevented.

尚、クロック再生部(11)のクロック再生が確立され
るまで(即ち、同期状態になるまで)、VCX O(1
2)の発振出力の周波数f CLllは変動することに
なるが、V CX O(12)は制御電圧に対する発振
周波数の変化、即ち変換利得が小さくてほとんど変化し
ないので、また1 / n分周したものを基準周波数と
して用いるようにしているので、その変動分もL/nさ
れて更に小さくなり、AFC回路にほとんど影響を及ぼ
すことがない。
Note that until the clock regeneration of the clock regeneration unit (11) is established (that is, until the synchronization state is reached), the VCX O(1
The frequency f CLll of the oscillation output in 2) will fluctuate, but the oscillation frequency of V CX O (12) changes with respect to the control voltage, that is, the conversion gain is small and hardly changes, so it was divided by 1/n again. Since the reference frequency is used as the reference frequency, its fluctuation is also reduced by L/n, and has little effect on the AFC circuit.

又男立豊来 上述した如く本発明のAFC回路に依れば、専用の基準
水晶発振器を必要とせず、また温度変化による復調特性
への影響を排除することが出来る。
Furthermore, as mentioned above, according to the AFC circuit of the present invention, there is no need for a dedicated reference crystal oscillator, and the influence of temperature changes on the demodulation characteristics can be eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す図、第2図は従来例を
示す図である。 (8)・・−位相比較器、(9)・−・電圧制御発振器
。 (11)・−クロy り再生部、 (12)−−V C
X O。
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional example. (8)...-phase comparator, (9)...-voltage controlled oscillator. (11)--Black reproducing section, (12)--V C
XO.

Claims (1)

【特許請求の範囲】[Claims] (1)復調回路の前段に設けられ、その復調回路に入力
される被変調信号の周波数制御を行なう自動周波数制御
回路において、前記復調回路のクロック再生部で用いら
れる電圧制御水晶発振器からの発振出力を基準周波数と
して用いる位相比較器を備えたことを特徴とする自動周
波数制御回路。
(1) In an automatic frequency control circuit that is provided before a demodulation circuit and controls the frequency of a modulated signal input to the demodulation circuit, an oscillation output from a voltage-controlled crystal oscillator used in the clock regeneration section of the demodulation circuit. An automatic frequency control circuit characterized in that it is equipped with a phase comparator that uses as a reference frequency.
JP1202466A 1989-08-04 1989-08-04 Automatic frequency control circuit Pending JPH0365819A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1202466A JPH0365819A (en) 1989-08-04 1989-08-04 Automatic frequency control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1202466A JPH0365819A (en) 1989-08-04 1989-08-04 Automatic frequency control circuit

Publications (1)

Publication Number Publication Date
JPH0365819A true JPH0365819A (en) 1991-03-20

Family

ID=16457994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1202466A Pending JPH0365819A (en) 1989-08-04 1989-08-04 Automatic frequency control circuit

Country Status (1)

Country Link
JP (1) JPH0365819A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08162947A (en) * 1994-12-09 1996-06-21 Nec Corp Microcomputer-controlled piezoelectric oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08162947A (en) * 1994-12-09 1996-06-21 Nec Corp Microcomputer-controlled piezoelectric oscillator

Similar Documents

Publication Publication Date Title
JP3173788B2 (en) Digital transmission equipment and direct conversion receiver
US4642573A (en) Phase locked loop circuit for demodulating suppressed carrier signals
JPH06104941A (en) Fsk receiver
JPS5825746A (en) Carrier wave reproducing circuit
KR890004218B1 (en) Synchronizing picture signal detecting circuit
JPH0365819A (en) Automatic frequency control circuit
US6879815B2 (en) Apparatus for extracting a carrier frequency
JPS6225543A (en) Frequency stabilizing system for local oscillator
US3798550A (en) Fm receiver
JP2687851B2 (en) Receiving machine
JP3254009B2 (en) Circuit including phase locked loop
JP3274203B2 (en) Clock recovery circuit of MSK demodulator
JPH0345048A (en) Automatic frequency control circuit
JPH073706Y2 (en) Demodulator
JP3396047B2 (en) Receiver
US4766391A (en) Video demodulator system
JPH0715482A (en) Automatic frequency controller
JPH05244212A (en) Demodulator
JPH01160239A (en) Carrier lock detection circuit
JPS60177763A (en) Automatic frequency control circuit
JPH02141147A (en) Carrier synchronizing circuit
JPH0583310A (en) Automatic frequency control circuit
JPH07273821A (en) Demodulator
JPH06105853B2 (en) FM receiver
JPH0537577A (en) Receiver