JPH0345048A - Automatic frequency control circuit - Google Patents

Abstract

PURPOSE:To minimize an error rate at demodulation of a digital signal subject to MSK modulation by using a carrier reproduced to a loop input signal when a carrier is reproduced by a demodulator. CONSTITUTION:A changeover switch 27 is provided before a 1/m frequency divider 21 and an output (b) from a carrier recovery section 33 of an MSK (Minimum Shift Keying) demodulator 30 is inputted to the 1/m frequency divider 21 in addition to an output (a) of a band pass filter 12. The input changeover of the changeover switch 27 is controlled by a carrier recovery synchronization detection signal 32 formed by the carrier recovery section 33. When a carrier is recovered by the carrier recovery section 33 of the MSK demodulator 30 with the MSK signal, the carrier recovery synchronization detection signal 32 switches the changeover switch 27 to the position of the (b) input. Thus, the recovered carrier 31 is subject to 1/m frequency division by the frequency divider 21 and the phase is compared with the phase of a reference output of a reference crystal oscillator 22 subject to 1/n frequency division at a phase comparator 24 and the oscillating frequency of a variable frequency oscillator 26 is revised in response to the phase difference. Thus, the phase error is de creased and the occurrence of an error at demodulation is suppressed.

Description

[Detailed description of the invention] The present invention is an automatic frequency control circuit (AFC circuit) used for synchronous detection of MSK modulated waves modulated with digital codes.
Regarding.

Conventional production technology distortions In recent years, MSK (Minimum 5h
There is a method (if tKeying). This method uses FSK (Freque
ncy 5hift Keying.

Since it has a constant envelope and has a constant envelope, it has the advantage of being resistant to nonlinear distortion.

One of the methods for demodulating MSK signals is a synchronous detection method. In this method, a carrier wave whose phase is synchronized with the carrier wave on the transmitting side is regenerated in a carrier wave regenerating section configured with, for example, a Costas loop inside the demodulator, and the MSK signal is demodulated using this as a reference carrier wave. Further, generally, this carrier wave regeneration unit is also provided with a circuit for detecting whether or not carrier wave regeneration is established, and this carrier liquid regeneration synchronization detection signal is used for various control signals and the like.

In this synchronous detection method, PLL (Phase Locked
Loop) It is necessary to narrow the frequency pull-in range of the circuit to suppress loop noise. For this purpose, an AFC circuit is provided before the demodulation circuit.

An example of the configuration of a conventional AFC circuit is shown in FIG. Input terminal 1
The MSK signal of frequency FIN input to mixer 1
1, the output of the voltage controlled oscillator (VCO) 26 (frequency fL
o) and mixed with the bandpass filter 12 as ".=
An MSK signal of l flN −fLOl is extracted. This MSK signal is sent to the MSK demodulator 30 and synchronously detected.

On the other hand, the MSK signal of frequency f0 is frequency-divided by 1/m by the 1/m frequency divider 21. Further, the output (frequency fREF) of the reference crystal oscillator 22 is also 1/1 by the 1/n frequency divider 23.
/n, and both are input to the phase comparator 24.

Then, a voltage proportional to the phase difference between the two is applied to the phase comparator 24.
It passes through the loop filter 25 and is applied to the VC026 to control the oscillation frequency fL of the VCO26. That is, this circuit forms a PLL, and in a steady state, the frequency of the re-input signal to the phase comparator 24 is lost, and the relationship f o/m - f REF/ n is established.

The frequency flN of the input signal to the terminal 10 changes from the steady state to Δ
When f changes by f and becomes f IN' = f IN + Δf, the PLL circuit also follows this, and the VCO 26 is controlled by a voltage proportional to Δf and its oscillation frequency rLO"
becomes fLo"-fLO+Δf. Therefore, the output of the bandpass filter 12 is f,'-1fTN'-fLO'-l (flN+Δf)-(fLO+Δf)-FIN
-fL.

=f0, and the frequency of the MSK signal input to the MSK demodulator 30 is always kept at 10.

In the above AFC circuit, the phase of the signal obtained by dividing the MSK signal is compared with the frequency-divided signal of the reference crystal oscillator 22. When the input MSK signal is divided by l/-, Its frequency deviation amount Δ
Although fs is also 1/-, this Δfs/m remains as pulse jitter even after frequency division, and becomes a steady phase error of the PLL circuit.

This value can be almost ignored when the C/N (carrier/noise) ratio of the input signal to terminal 10 is good, but when the C/N
As the ratio worsens, pulse jitter due to noise is added and becomes larger, causing a problem during demodulation. That is, since the output voltage of the phase comparator 24 fluctuates, VC02
As a result, the phase error increases and the demodulation characteristics of the demodulator 30 deteriorate.

One way to deal with this problem is to increase the value of the frequency division ratio m to reduce the error ΔIs/m, but in this case, the frequency compared by the phase comparator 24 becomes smaller, so the loop The time constant of filter 25 must be set large. As a result, although the S/N ratio of the PLL circuit is improved, there is a problem that the PLL pull-in time becomes longer.

Alternatively, as shown in FIG. 3, there is a method to improve the C/N ratio by inserting a narrowband bandpass filter 28 before the 1/m frequency divider 21 to limit the band. In some cases, narrowband bandpass filters 28 typically suffer from the difficulty of flattening the delay characteristics within the passband. That is, the MSK signal that has passed through the band-pass filter 28 causes delay distortion, and as shown in FIG. 4, amplitude fluctuation occurs, causing the problem that the 1/m frequency divider 21 does not operate correctly. .

SUMMARY OF THE INVENTION An object of the present invention is to solve such problems and provide an automatic frequency control circuit that stabilizes the input frequency to a demodulation circuit while minimizing phase errors.

In order to achieve the above object, the automatic frequency control circuit of the present invention mixes the phase continuous digital modulation wave and the output wave of the variable frequency oscillator, and then separates the detection signal obtained through the bandpass filter. the output wave of the variable frequency oscillator as the first input of the phase comparator, the output of the reference frequency oscillator as the second input of the phase comparator, and changing the frequency of the output wave of the variable frequency oscillator according to their phase difference. , in an automatic frequency control circuit that stabilizes the input frequency of the detection signal to the synchronous detection demodulation circuit, the first input of the phase comparator is connected to the recovered carrier wave when the carrier wave regeneration unit of the demodulation circuit is regenerating the carrier wave. The apparatus is characterized in that a changeover switch is provided to select the detection signal when the signal is not being reproduced.

When the reproduced carrier wave and the input wave are synchronized in the shell demodulation circuit and the carrier wave regenerator is reproducing the synchronization signal, the reproduced carrier wave becomes the first input of the phase comparator, and the second input from the reference frequency oscillator becomes the first input of the phase comparator. The oscillation frequency of the variable frequency oscillator is changed according to the result of phase comparison with the input. In other words, since the reproduced carrier signal closer to the normal phase of the input signal is used as the calibration signal, the phase error is reduced. When the demodulation circuit is not synchronized, the first input of the phase comparator is switched to the input modulated wave.

In addition, the detection signal and the output signal of the reference frequency oscillator are as follows:
The signal may be frequency-divided by a frequency divider before being input to the phase comparator.

Practical benefit group Embodiments of the present invention will be described below with reference to FIG.

In the circuit of this embodiment, a changeover switch 27 is provided in front of the 1/+ frequency divider 21 of the conventional circuit (FIG. 2) described earlier.
In addition to the conventional output (a) of the bandpass filter 12, the input to the 1/m frequency divider 21 can also be input from the carrier wave regenerator 33 of the MSK demodulator 30 (b). It is. This input switching of the changeover switch 27 is controlled by a carrier wave regeneration synchronization detection signal 32 generated by a carrier wave regeneration section 33.

With this configuration, the input M
When the carrier wave is being regenerated by the carrier wave reproducing unit 33 of the MSK demodulator 30 based on the SK signal, the carrier wave regeneration synchronization detection signal 32 becomes, for example, rHtghJ, and the changeover switch 27
Switch to the 6-input position. Therefore, the frequency of the reproduced carrier wave 31 is divided by 17II1 by the frequency divider 21, and the phase is compared with the reference output of the reference crystal oscillator 22 whose frequency is divided by 1/n by the phase comparator 24, and the VCO 26 is adjusted according to the phase difference. controlled. In this case, the regenerated carrier wave 31 has a frequency deviation amount Δ“
Since S is almost 0, the jitter of the frequency-divided pulse is extremely small compared to the case where the MSK signal itself (a signal obtained by frequency-dividing the MSK signal) is used as an input to the phase comparator 24. Therefore, the phase error is reduced, and the occurrence of errors during demodulation is suppressed. Moreover, since the noise of the recovered carrier wave 31 is suppressed by the PLL circuit of the carrier wave recovery unit 33, when the recovered carrier wave 31 is used as an input to the AFC circuit, the MS
Even when the C/N ratio of the K signal is low, the S/N of the AFC loop is
The ratio is improved, and the amount of deterioration in demodulation characteristics is small.

Note that when the carrier wave regeneration unit 33 becomes out of synchronization and the carrier wave is no longer regenerated, the carrier wave regeneration synchronization detection signal 32
becomes, for example, r Low J, and the input of the selector switch 27 passes through the band pass filter 12 of a (frequency f
O-I FIN-fLOI) MSK signal. Even in this case, since the gAFc circuit 20 operates as in the conventional case, demodulation characteristics comparable to the conventional one are ensured.

As explained above, in the present invention, when the carrier wave is regenerated by the demodulator, the regenerated carrier wave is used as the input signal of the AFC loop, so the phase error is reduced and the MSK modulated digital The error rate during signal demodulation can be minimized.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an embodiment of the AFC circuit according to the present invention, Fig. 2 is a circuit diagram of a conventional AFC circuit, Fig. 3 is a circuit diagram of another conventional example, and Fig. 4 is a narrow band band pass. FIG. 2 is an explanatory diagram showing how an MSK signal is distorted when passing through a filter. 11... Mixer 24... Phase comparator 25... Loop filter 26... VCO (voltage controlled oscillator) 27... Changeover switch 31... Regenerated carrier wave 32... Carrier wave synchronization detection signal 33 ...Carrier Regeneration Department Applicant Sharp Corporation Shizuo Sano Figure n Figure 0 Figure

Claims (1)

[Claims] The detection signal obtained by mixing the phase continuous digital modulated wave and the output wave of the variable frequency oscillator and passing it through a bandpass filter is used as the first input of the phase comparator, and the output of the reference frequency oscillator is used as the second input of the phase comparator. , an automatic frequency control circuit that stabilizes the input frequency of the detection signal to the synchronous detection demodulation circuit by changing the frequency of the output wave of the variable frequency oscillator according to the phase difference between them, An automatic frequency control circuit characterized in that an automatic frequency control circuit is provided with a changeover switch that inputs the recovered carrier wave when the carrier wave reproducing section of the demodulation circuit is reproducing the carrier wave, and inputs the detection signal when the carrier wave is not being regenerated.