JPH0364894B2 - - Google Patents

Info

Publication number
JPH0364894B2
JPH0364894B2 JP59181155A JP18115584A JPH0364894B2 JP H0364894 B2 JPH0364894 B2 JP H0364894B2 JP 59181155 A JP59181155 A JP 59181155A JP 18115584 A JP18115584 A JP 18115584A JP H0364894 B2 JPH0364894 B2 JP H0364894B2
Authority
JP
Japan
Prior art keywords
bus
activation
gate
microprogram
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59181155A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6159562A (ja
Inventor
Haruhiko Tsunoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59181155A priority Critical patent/JPS6159562A/ja
Publication of JPS6159562A publication Critical patent/JPS6159562A/ja
Publication of JPH0364894B2 publication Critical patent/JPH0364894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Information Transfer Systems (AREA)
JP59181155A 1984-08-30 1984-08-30 インタフエ−ス制御方式 Granted JPS6159562A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59181155A JPS6159562A (ja) 1984-08-30 1984-08-30 インタフエ−ス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59181155A JPS6159562A (ja) 1984-08-30 1984-08-30 インタフエ−ス制御方式

Publications (2)

Publication Number Publication Date
JPS6159562A JPS6159562A (ja) 1986-03-27
JPH0364894B2 true JPH0364894B2 (OSRAM) 1991-10-08

Family

ID=16095848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59181155A Granted JPS6159562A (ja) 1984-08-30 1984-08-30 インタフエ−ス制御方式

Country Status (1)

Country Link
JP (1) JPS6159562A (OSRAM)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531784B1 (en) 2000-06-02 2003-03-11 Amkor Technology, Inc. Semiconductor package with spacer strips

Also Published As

Publication number Publication date
JPS6159562A (ja) 1986-03-27

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