JPH0361321B2 - - Google Patents

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Publication number
JPH0361321B2
JPH0361321B2 JP55175440A JP17544080A JPH0361321B2 JP H0361321 B2 JPH0361321 B2 JP H0361321B2 JP 55175440 A JP55175440 A JP 55175440A JP 17544080 A JP17544080 A JP 17544080A JP H0361321 B2 JPH0361321 B2 JP H0361321B2
Authority
JP
Japan
Prior art keywords
oxide
oxide semiconductor
varistor
layers
types
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55175440A
Other languages
Japanese (ja)
Other versions
JPS5797602A (en
Inventor
Shuichi Onabeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP55175440A priority Critical patent/JPS5797602A/en
Publication of JPS5797602A publication Critical patent/JPS5797602A/en
Publication of JPH0361321B2 publication Critical patent/JPH0361321B2/ja
Granted legal-status Critical Current

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  • Laminated Bodies (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Thermistors And Varistors (AREA)

Description

【発明の詳細な説明】 本発明は、薄膜型の積層バリスタに関する。バ
リスタは電極間に加えられる印加電圧によつて抵
抗値が非直線的に変化し、印加電圧がバリスタ電
圧を超える範囲で、抵抗値が激減して電流が急増
する電圧−電流特性を示し、従来より、音響機器
に関する小形直流モータのノイズ防止、リレー接
点の保護、カラーテレビブラウン管回路の放電吸
収等の手段として広く利用されている。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin film type multilayer varistor. Varistors exhibit voltage-current characteristics in which the resistance value changes non-linearly depending on the applied voltage applied between the electrodes, and in the range where the applied voltage exceeds the varistor voltage, the resistance value decreases sharply and the current increases rapidly. Therefore, it is widely used as a means for noise prevention in small DC motors related to audio equipment, protection of relay contacts, and discharge absorption in color TV cathode ray tube circuits.

バリスタの種類としては、焼結体自体は直線性
抵抗体で、これに特別の電極を付与することによ
り、焼結体と電極の界面に電位障壁を形成し、そ
の整流特性によりバリスタ特性を得るものと、焼
結体自身の有する電圧非直線性を利用したものの
二種類が知られている。このうち、前者のタイプ
のバリスタは、電極形成や焼結体成形などの製造
上の困難性を伴い、価格が高くなること、非直線
性の経時的劣化を招き易いこと、更にバリスタ電
圧が高く、低電圧用の用途に適さないこと等の欠
点があるため、最近は、このような欠点を持たな
い後者のタイプのバリスタ、すなわち焼結体自身
の有する電圧非直線性を利用したバリスタが注目
されている。この後者のタイプのバリスタとして
は、酸化亜鉛(ZnO)、酸化チタン(TiO2)、チ
タン酸ストロンチウム(SrTiO3)、チタン酸バリ
ウム(BaTiO3)等のいずれかを主成分とし、こ
れに酸化物ビスマス(Bi2O3)、酸化ニオブ
(Nb2O5)、酸化マンガン(MnO)、酸化コバルト
(CoO)等を微量添加して焼結させたバリスタが
知られている。たとえばZNR(商品名)として知
られるバリスタは、Bi2O3添加のZnO焼結体であ
る。
As for the type of varistor, the sintered body itself is a linear resistor, and by adding a special electrode to it, a potential barrier is formed at the interface between the sintered body and the electrode, and its rectification properties provide varistor characteristics. Two types are known: one that utilizes the voltage nonlinearity of the sintered body itself, and one that utilizes the voltage nonlinearity of the sintered body itself. Among these, the former type of varistor involves manufacturing difficulties such as electrode formation and sintered compact molding, is expensive, tends to cause deterioration of nonlinearity over time, and has a high varistor voltage. However, recently, the latter type of varistor, which does not have these drawbacks, that is, a varistor that utilizes the voltage nonlinearity of the sintered body itself, has attracted attention. has been done. This latter type of varistor has a main component of zinc oxide (ZnO), titanium oxide (TiO 2 ), strontium titanate (SrTiO 3 ), barium titanate (BaTiO 3 ), etc. Varistors are known in which small amounts of bismuth (Bi 2 O 3 ), niobium oxide (Nb 2 O 5 ), manganese oxide (MnO), cobalt oxide (CoO), etc. are added and sintered. For example, the varistor known as ZNR (trade name) is a sintered body of ZnO with Bi 2 O 3 added.

これらのZNR等のバリスタ特性は、多結晶体
中で隣り合つた結晶粒子間の粒界層におけるI−
V特性の非直線性に依存している。非直線性を生
じる機構は、大別して、厚い粒界層に依存するも
のと、薄い粒界層に依存するものとがある。つま
り、前者の場合は、粒界に結晶粒内とは異なつた
相があり、この異なつた2つの相間の接合で非直
線性が生じるものと考えられ、一方、後者の場合
は、粒界層は非常に薄く、結晶粒間に薄い絶縁層
が形成され、そのバリヤを超えることにより非直
線性が出るものと考えられる。
The varistor characteristics of these ZNRs, etc. are due to the I-
It depends on the nonlinearity of the V characteristic. The mechanisms that cause nonlinearity can be roughly divided into two types: those that depend on thick grain boundary layers, and those that depend on thin grain boundary layers. In other words, in the former case, there is a phase different from that inside the grain at the grain boundary, and nonlinearity is thought to occur at the junction between these two different phases.On the other hand, in the latter case, the grain boundary layer is very thin, and it is thought that a thin insulating layer is formed between the crystal grains, and nonlinearity occurs by exceeding this barrier.

しかし、一つの粒界では、それぞれ理想的な接
合特性が形成できても、多結晶体全体の非直線性
を考えると、粒径の不均一性等によつて、結晶構
造的に必然的に非直線性の低下や劣化を招き、各
種の耐量が低下するという欠点がある。また、粒
界層が添加物や焼成温度等に依存して定まつてし
まうため、バリスタ特性、サージ耐量等の改善に
限界を生じるという欠点もある。
However, even if ideal bonding characteristics can be formed at a single grain boundary, considering the nonlinearity of the entire polycrystalline body, it is inevitable that the crystal structure will This has the disadvantage that it causes a decrease in non-linearity and deterioration, and various tolerances are reduced. Furthermore, since the grain boundary layer is determined depending on additives, firing temperature, etc., there is also a drawback that there is a limit to the improvement of varistor characteristics, surge resistance, etc.

本発明はこの欠点を除去し、粒径の不均一によ
るバリスタ特性の低下、各種耐量の低下等を生じ
る余地がなく、しかも熱容量、サージ耐量等を高
くとることができ、小型化、チツプ化の可能な高
品質、高性能の積層バリスタを提供することを目
的とする。
The present invention eliminates this drawback, eliminates the possibility of deterioration of varistor characteristics or deterioration of various withstand capacities due to non-uniformity of particle size, and allows high heat capacity, surge withstand capacity, etc., and facilitates miniaturization and chipping. Our aim is to provide the highest quality, high performance multilayer varistors possible.

この目的を達成するため、本発明に係る積層バ
リスタは、境界層に電圧非直線性を生じ得る少な
くとも二種類の酸化物半導体磁器層を、少なくと
も2つの境界層が生じるよう交互に積層して一体
に焼結させ、両外側の酸化物半導体層の表面に対
の電極を被着させたことを特徴とする。
In order to achieve this object, the multilayer varistor according to the present invention is made by laminating at least two types of oxide semiconductor porcelain layers that can cause voltage nonlinearity in the boundary layer alternately so as to form at least two boundary layers. It is characterized in that it is sintered and counter electrodes are deposited on the surfaces of both outer oxide semiconductor layers.

すなわち、従来のBi2O3添加のZnO焼結体等に
おいては、ZnO結晶とこれを取り囲むBi2O3相と
の間に粒界層を形成し、この粒界層でバリスタ特
性を得る結晶構造となつていたが、本発明におい
ては、第1図に示すように、ZnO等を主成分とす
る酸化物半導体磁器層1と、Bi2O3等を主成分と
する酸化物半導体磁器層2とを、平面状に必要層
数だけ交互に積層して焼結し、両酸化物半導体磁
器層1−2間の境界層でバリスタ特性を得るもの
である。
In other words, in conventional Bi 2 O 3- added ZnO sintered bodies, a grain boundary layer is formed between the ZnO crystal and the surrounding Bi 2 O 3 phase, and this grain boundary layer creates a crystal that obtains varistor properties. However , in the present invention, as shown in FIG . 2 are alternately stacked in a planar manner by the required number of layers and sintered to obtain varistor characteristics at the boundary layer between both oxide semiconductor ceramic layers 1-2.

このような積層構造であると、電圧非直線性を
生じる境界層の数を自由にコントロールすること
ができると共に、酸化物半導体磁器層1,2の層
数、厚みを自由にコントロールすることができる
から、焼結体の粒径の不均一性による悪影響を受
けることなく、バリスタ特性を改善し、熱容量、
サージ耐量等を向上させることができる。
With such a laminated structure, the number of boundary layers that cause voltage nonlinearity can be freely controlled, and the number and thickness of the oxide semiconductor ceramic layers 1 and 2 can be freely controlled. This improves the varistor properties and increases the heat capacity and
Surge resistance etc. can be improved.

酸化物半導体磁器層1,2は、少なくとも2つ
の境界層が生じるように交互に積層し、両外側の
酸化物半導体層1,2の表面に対の電極4,5を
被着させる。第1図の参照符号3はAl2O3等で構
成された基板である。
The oxide semiconductor ceramic layers 1 and 2 are alternately laminated so that at least two boundary layers are formed, and a pair of electrodes 4 and 5 are deposited on the surfaces of both outer oxide semiconductor layers 1 and 2. Reference numeral 3 in FIG. 1 is a substrate made of Al 2 O 3 or the like.

バリスタは前述したようなノイズ防止、リレー
接点保護、放電吸収の手段等に利用されるもので
あり、ダイオード等と異なつて、電極4,5の双
方向において、対称性のある電圧−電流特性が要
求される。酸化物半導体磁器層1,2を、少なく
とも2つの境界層が生じるよう交互に積層する
と、対称に近い電圧−電流特性を得ることができ
る。
Varistors are used for noise prevention, relay contact protection, discharge absorption, etc. as mentioned above, and unlike diodes, etc., they have symmetrical voltage-current characteristics in both directions of the electrodes 4 and 5. required. By alternately stacking the oxide semiconductor ceramic layers 1 and 2 so as to form at least two boundary layers, nearly symmetrical voltage-current characteristics can be obtained.

前記酸化物半導体磁器層1としては、ZnOを主
成分とするもののほか、TiO2、SrTiO3
BaTiO3等のいずれか一種を主成分とするもので
あつても良い。また酸化物半導体磁器層2は、
Bi2O3、Nb2O5、MnO、CoO等のいずれか一種以
上を主成分とするものによつて構成することがで
きる。この場合、酸化物半導体磁器層1,2を構
成する各成分は、独立に選択できるから、たとえ
ば一つのバリスタで、ZnO、TiO2、SrTiO3また
はBaTiO3等の合成特性を有する等も実現するこ
とができる。
The oxide semiconductor ceramic layer 1 may contain ZnO as a main component, as well as TiO 2 , SrTiO 3 ,
The main component may be one of BaTiO 3 or the like. Further, the oxide semiconductor ceramic layer 2 is
It can be composed of one or more of Bi 2 O 3 , Nb 2 O 5 , MnO, CoO, etc. as a main component. In this case, each component constituting the oxide semiconductor ceramic layers 1 and 2 can be selected independently, so that, for example, one varistor can have synthetic characteristics of ZnO, TiO 2 , SrTiO 3 or BaTiO 3 . be able to.

酸化物半導体磁器層1,2は、前述の諸成分を
含有させた磁器ペーストのスクリーン印刷法また
はイオンプレーテイング法等によつて薄膜状に形
成することが望ましい。
The oxide semiconductor ceramic layers 1 and 2 are preferably formed into thin films by screen printing or ion plating of a ceramic paste containing the various components described above.

以上述べたように、本発明によれば次のような
効果が得られる。
As described above, according to the present invention, the following effects can be obtained.

(a) 境界層に電圧非直線性を生じ得る少なくとも
二種類の酸化物半導体磁器層を交互に積層した
から、電圧非直線性を生じる境界層の数、焼結
体の層数、厚み等をコントロールし、焼結体の
粒径の不均一性による悪影響を受けることな
く、バリスタ特性、熱容量、サージ耐量等を向
上させた高品質、高信頼度の積層バリスタを提
供できる。
(a) Since at least two types of oxide semiconductor ceramic layers that can cause voltage nonlinearity in the boundary layer are alternately laminated, it is difficult to determine the number of boundary layers that cause voltage nonlinearity, the number of layers of the sintered body, the thickness, etc. It is possible to provide a high-quality, highly reliable multilayer varistor with improved varistor characteristics, heat capacity, surge resistance, etc., without being adversely affected by the non-uniformity of the grain size of the sintered body.

(b) 二種類の酸化物半導体磁器層を、少なくとも
2つの境界層が生じるよう交互に積層し、両外
側の酸化物半導体層の表面に対の電極を被着さ
せたから、電極間より対称に近い電圧−電流特
性を得ることができる。このため、ノイズ防
止、リレー接点保護、及び放電吸収手段として
有効な積層バリスタを提供できる。
(b) Two types of oxide semiconductor ceramic layers are stacked alternately so that at least two boundary layers are formed, and a pair of electrodes is deposited on the surfaces of both outer oxide semiconductor layers, so that the electrodes are more symmetrical than each other. Similar voltage-current characteristics can be obtained. Therefore, it is possible to provide a multilayer varistor that is effective for noise prevention, relay contact protection, and discharge absorption means.

(c) 二種類の酸化物半導体磁器層を積層して一体
に焼結させたから、薄型で機械的強度が大き
く、しかも量産性に優れた積層バリスタを提供
できる。
(c) Since two types of oxide semiconductor ceramic layers are laminated and sintered together, it is possible to provide a laminated varistor that is thin, has high mechanical strength, and is excellent in mass production.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る積層バリスタの正面図で
ある。 1……ZnO等を主成分とする酸化物半導体磁器
層、2……Bi2O3等を主成分とする酸化物半導体
磁器層、3……基板、4,5……電極。
FIG. 1 is a front view of a laminated varistor according to the present invention. DESCRIPTION OF SYMBOLS 1... Oxide semiconductor ceramic layer containing ZnO etc. as a main component, 2... Oxide semiconductor ceramic layer containing Bi 2 O 3 etc. as a main component, 3... Substrate, 4, 5... Electrode.

Claims (1)

【特許請求の範囲】 1 境界層に電圧非直線性を生じ得る少なくとも
二種類の酸化物半導体磁器層を、少なくとも2つ
の境界層が生じるよう交互に積層して一体に焼結
させ、両外側の酸化物半導体層の表面に対の電極
を被着させたことを特徴とする積層バリスタ。 2 前記二種類の酸化物半導体磁器層の一方に酸
化亜鉛、酸化チタン、チタン酸ストロンチウムの
いずれか一種を主成分とすることを特徴とする特
許請求の範囲第1項に記載の積層バリスタ。 3 前記二種類の酸化物半導体磁器層の他方に酸
化ビスマス、酸化ニオブ、酸化コバルト、酸化マ
ンガンのいずれか一種以上を主成分とすることを
特徴とする特許請求の範囲第1項または第2項に
記載の積層バリスタ。
[Claims] 1. At least two types of oxide semiconductor porcelain layers capable of causing voltage nonlinearity in the boundary layer are alternately stacked and sintered to form at least two boundary layers, and both outer A multilayer varistor characterized in that a counter electrode is deposited on the surface of an oxide semiconductor layer. 2. The multilayer varistor according to claim 1, wherein one of the two types of oxide semiconductor ceramic layers contains one of zinc oxide, titanium oxide, and strontium titanate as a main component. 3. Claims 1 or 2, characterized in that the other of the two types of oxide semiconductor ceramic layers contains at least one of bismuth oxide, niobium oxide, cobalt oxide, and manganese oxide as a main component. The laminated varistor described in .
JP55175440A 1980-12-11 1980-12-11 Laminated varistor Granted JPS5797602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55175440A JPS5797602A (en) 1980-12-11 1980-12-11 Laminated varistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55175440A JPS5797602A (en) 1980-12-11 1980-12-11 Laminated varistor

Publications (2)

Publication Number Publication Date
JPS5797602A JPS5797602A (en) 1982-06-17
JPH0361321B2 true JPH0361321B2 (en) 1991-09-19

Family

ID=15996120

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55175440A Granted JPS5797602A (en) 1980-12-11 1980-12-11 Laminated varistor

Country Status (1)

Country Link
JP (1) JPS5797602A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2666605B2 (en) * 1991-05-02 1997-10-22 株式会社村田製作所 Stacked varistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55150203A (en) * 1979-05-10 1980-11-22 Matsushita Electric Ind Co Ltd Nonnlinear voltage resistor
JPS5771102A (en) * 1980-10-20 1982-05-01 Matsushita Electric Ind Co Ltd Voltage nonlinear resistor and method of producing same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55150203A (en) * 1979-05-10 1980-11-22 Matsushita Electric Ind Co Ltd Nonnlinear voltage resistor
JPS5771102A (en) * 1980-10-20 1982-05-01 Matsushita Electric Ind Co Ltd Voltage nonlinear resistor and method of producing same

Also Published As

Publication number Publication date
JPS5797602A (en) 1982-06-17

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