JPH0359875A - Semiconductor memory - Google Patents

Abstract

PURPOSE:To reduce the area of a chip by providing a switch which changes over a bit line precharge potential supply line from a precharge potential supply source to a flash light data supply source at the time of flash-lighting. CONSTITUTION:The switch which changes over the potential supply source of the bit line precharge potential supply line 3 from the precharge potential supply source 2 to the flash light data supply source 1 is provided. The bit line precharge potential supply line 3 is connected with the flash light data supply source 1 through a transfer switch which is opened and closed by a signal phi1. It is furthermore connected with a precharge power source 2 through the transfer switch by a signal phi2. Thus, the increase of the size of the chip owing to the addition of a flash light data bus, following gates and contacts can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory, and particularly to a semiconductor memory having a flashlight function.

[Prior Art] Conventionally, semiconductor memories have been manufactured that have a flash write function that allows the same data to be simultaneously written into a plurality of memory cells connected to a selected word line. To realize this flashlight function, it is necessary to simultaneously transfer data from the data manual buffer to multiple bit lines, and for this purpose, the flashlight It was equipped with a dedicated bus and dedicated switches for transmitting write data to multiple bit lines.

[Problems to be Solved by the Invention] However, in the above-mentioned conventional semiconductor memory having a flashlight function, in addition to column switches and the like used in the normal mode, there are also data buses and switches dedicated to realizing the flashlight function. Furthermore, contacts and the like associated with these are required, which has the disadvantage of increasing the chip area.

[Means for Solving the Problems] The gist of the present invention is to reduce the bit line precharge potential in a semiconductor memory having a flash write function for writing the same data into all of a plurality of memory cells connected under a selected word line. A switch is provided to switch the potential supply source of the supply line from a precharge potential supply source to a flash write data supply source during flash writing.

[Operation of the Invention] As described above, when realizing the flash write function, the switch connects the flash write supply source to the bit line precharge potential supply source and simultaneously writes the flash write to the selected memory cells.

[Example code] Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 10 is a circuit diagram of one embodiment of the present invention, and the structure and function of the circuit operation will be explained using the timing chart of FIG. 2. In the figure, 1 is a flash write data supply source, 2 is a precharge potential supply source, 3 is a bit line precharge potential supply source, 4 is a memory cell group,
5 is a sense amplifier, 6 is a bit line group, 7 is a column address decoder, WL is a word line, and Ilo is an input/output bus. φ1 is a signal that opens and closes a transfer switch that transmits information to be flashed to the bit line precharge potential supply source, φ2 is a signal that opens and closes a transfer switch that precharges and balances the bit line group, and φ3 is a precharge potential for the bit line group. ,
The signal φ4 that opens and closes the transfer switch that transmits flashlight data is a sense amplifier activation signal.

As shown in FIG. 1, the conventional bit line precharge potential supply R3 is connected to the flashlight data supply source 1 via a transfer switch that is opened and closed by a signal φ1. It is also connected to the precharge power supply 2 via a transfer switch that is opened and closed by the signal φ2.

First, in FIG. 2, when the signal φ1=signal WL=signal φ4=low level and the signal φ2=signal φ3=high level, the bit line group is precharged to 1/2 VCC.

Next, signal φ1 = signal φ2 = signal φ3 = signal WL = signal φ
4=Low level causes bit line 6 to be in a floating state.

Signal φ2=signal φ4=low level, signal φl=signal φ3:
When the signal WL becomes high level, flash write data is transmitted to one bit line and then to the cell.

Signal φ1 = Signal φ2 = Signal φ3 = Signal φ4 = Low level,
WL = high level and bit line is floating. Signal φ1
= Signal φ2 = Signal φ3 = Low level, Signal WL = Signal φ4
= Sense amplifier is activated at high level. Flash write data is written to the cell.

Finally, when signal WL=signal φ4=low level, the cell becomes a floating state and holds data.

Signal φ2=signal φ3=high level, and the bit line is again precharged to 1/2 VCC and becomes the initial state.

[Effects of the Invention] As explained above, the present invention can supply the bit line precharge level and flash write data to the bit line through one signal line, so that the flash write data bus and associated gates, contacts, etc. This has the effect of suppressing the increase in chip size due to addition.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, and Fig. 2 is an operation timing chart of the embodiment (when writing reverse data).
It is. 1...Flashlight data source, 2...
...Precharge potential supply source, 3...Bit line precharge potential supply source, 4...Conflict◆...Memory cell group, 5...Sense amplifier, 6... ... Bit line group, 7... Column address decoder, ~VL...
・・・ ・Word line, Ilo ・ ・ ・ ・ I10 bus, φ1... Signal to open/close the transfer switch that conveys information to flash write to the bit line precharge potential supply source, φ2... Precharges the bit line group. Signal to open and close the transfer switch to charge and balance, φ3...Precharge potential to bit line group. Signal to open/close the transfer switch that transmits flashlight data, φ4...Sense amplifier activation signal.

Claims (1)

[Claims] In a semiconductor memory that has a flash write function that writes the same data to all memory cells connected under a selected word line, the potential supply source for the bit line precharge potential supply line is changed from the precharge potential supply source during flash writing. A semiconductor memory characterized by being provided with a switch for switching to a flashlight data supply source.