JPH0356223U - - Google Patents
Info
- Publication number
- JPH0356223U JPH0356223U JP11742989U JP11742989U JPH0356223U JP H0356223 U JPH0356223 U JP H0356223U JP 11742989 U JP11742989 U JP 11742989U JP 11742989 U JP11742989 U JP 11742989U JP H0356223 U JPH0356223 U JP H0356223U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- connection point
- channel fet
- gates
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11742989U JPH0356223U (cs) | 1989-10-05 | 1989-10-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11742989U JPH0356223U (cs) | 1989-10-05 | 1989-10-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0356223U true JPH0356223U (cs) | 1991-05-30 |
Family
ID=31665644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11742989U Pending JPH0356223U (cs) | 1989-10-05 | 1989-10-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0356223U (cs) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4836024B2 (ja) * | 2000-07-10 | 2011-12-14 | エスティー‐エリクソン、ソシエテ、アノニム | ディジタル信号と逆信号との間の遅延差を最小にしてディジタル信号の逆信号を生成する回路 |
-
1989
- 1989-10-05 JP JP11742989U patent/JPH0356223U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4836024B2 (ja) * | 2000-07-10 | 2011-12-14 | エスティー‐エリクソン、ソシエテ、アノニム | ディジタル信号と逆信号との間の遅延差を最小にしてディジタル信号の逆信号を生成する回路 |
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