JPH0354888A - Mounting method for electronic component - Google Patents
Mounting method for electronic componentInfo
- Publication number
- JPH0354888A JPH0354888A JP1190975A JP19097589A JPH0354888A JP H0354888 A JPH0354888 A JP H0354888A JP 1190975 A JP1190975 A JP 1190975A JP 19097589 A JP19097589 A JP 19097589A JP H0354888 A JPH0354888 A JP H0354888A
- Authority
- JP
- Japan
- Prior art keywords
- conductive paste
- vacuum
- component
- anaerobic
- paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 10
- 239000000853 adhesive Substances 0.000 claims description 5
- 230000001070 adhesive effect Effects 0.000 claims description 5
- 238000009461 vacuum packaging Methods 0.000 abstract description 3
- 239000000945 filler Substances 0.000 abstract description 2
- 238000002156 mixing Methods 0.000 abstract description 2
- 239000002245 particle Substances 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/281—Applying non-metallic protective coatings by means of a preformed insulating foil
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、電気機器に使用されている高密度実装基板に
有効な電子部品の実装方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for mounting electronic components that is effective on high-density mounting boards used in electrical equipment.
従来の技術
従来、この種の電子部品の実装技術では、第４図で１は
プリント基板、２は配線部においてまず、接着剤３をプ
リント基板ｌ上に塗布し、第５図で電子部品４を装着す
る。次に、第６図で接着剤を硬化させ、第７図のように
プリント基板１をハンダディップ槽に浸漬することによ
って、ハンダ５を付着させ、電気的接続および物理的接
続を可能にするものであった。2. Description of the Related Art Conventionally, in this type of electronic component mounting technology, adhesive 3 is first applied onto the printed circuit board l, 1 is a printed circuit board in FIG. Attach. Next, as shown in FIG. 6, the adhesive is cured, and as shown in FIG. 7, the printed circuit board 1 is immersed in a solder dip bath to adhere the solder 5, thereby enabling electrical and physical connection. Met.
発明が解決しようとする課題
しかしながら、上記従来の電子部品の実装方法では、部
品形状が近年バラエティーに富む傾向にあって、その接
続時における抑圧方法が問題となり、密着性などの面で
今一つ信頼性の欠けるものであった。又、半田耐熱性が
要求されるため、実装可能な電子部品も限定されていた
。Problems to be Solved by the Invention However, with the above-mentioned conventional electronic component mounting methods, the shapes of components have tended to be more varied in recent years, and the method of suppressing them during connection has become a problem, resulting in poor reliability in terms of adhesion, etc. It was something that was lacking. Furthermore, since solder heat resistance is required, the electronic components that can be mounted are also limited.
本発明はこのような従来の課題を解決するものであり、
嫌気性の導電ペーストを使用し、実装基板全体を真空バ
ックすることにより、バラエティーに富んだどのような
形状の電子部品に対しても全て同じように圧力をかける
ことが可能となり、それと同時に嫌気性導電ペーストを
低温硬化させることによって、接続性において極めて信
頼性の高い電子部品の実装方法を提供することを目的と
するものである。The present invention solves these conventional problems,
By using an anaerobic conductive paste and vacuum-backing the entire mounting board, it is possible to apply the same pressure to a wide variety of electronic components of any shape. The object of the present invention is to provide a method for mounting electronic components with extremely high reliability in terms of connectivity by curing a conductive paste at a low temperature.
課題を解決するための手段
上記課題を解決するために、本発明は、フィルムで実装
基板全体を真空バックし、全ての電子部品に対して均一
な圧力が加わるようにしたものである。さらには、接着
剤として嫌気性の導電ペーストを使用し、この真空状態
を利用して低温硬化させ、導通接続と密着を同時に行う
ものである。Means for Solving the Problems In order to solve the above problems, the present invention vacuum-backs the entire mounting board with a film so that uniform pressure is applied to all electronic components. Furthermore, an anaerobic conductive paste is used as the adhesive, and the vacuum state is used to cure it at a low temperature, thereby achieving conductive connection and adhesion at the same time.
作用
本発明は上記のような構戊により次のような作用、又は
効果を有する。すなわち、電子部品の実装個所に嫌気性
の導電ペーストを塗布し、その上に電子部品をのせた後
、フィルムで実装基板全体を真空バックすると、電子部
品全体に均一な圧力が加わり、さらに、真空バックされ
たことによって、嫌気性の導電ペーストの硬化が開始さ
れる。Effects The present invention has the following effects or effects due to the above structure. In other words, after applying an anaerobic conductive paste to the mounting area of the electronic component and placing the electronic component on top of it, the entire mounting board is vacuum-backed using a film. By being backed up, the anaerobic conductive paste starts to harden.
均一な圧力が加わっている条件下での硬化であるため、
電子部品の形状にとらわれることなく非常に信頼性の高
い接続性が得られるという効果を有する。又、嫌気性の
硬化タイプであるため、導電性粉体を含んでいても低温
硬化できるという利点がある。Because it is cured under conditions where uniform pressure is applied,
This has the effect of providing extremely reliable connectivity regardless of the shape of the electronic component. Furthermore, since it is an anaerobic curing type, it has the advantage of being able to be cured at low temperatures even if it contains conductive powder.
実施例
第１図〜第３図は本発明の一実施例の構或を示すもので
ある。第１図において６はプリント基板であり、７は配
線部であり、８は嫌気性の導電ペーストである。Embodiment FIGS. 1 to 3 show the structure of an embodiment of the present invention. In FIG. 1, 6 is a printed circuit board, 7 is a wiring section, and 8 is an anaerobic conductive paste.
第２図において９は電子部品、第３図において１０は真
空バック用フィルムである。In FIG. 2, 9 is an electronic component, and in FIG. 3, 10 is a vacuum bag film.
次に上記実施例について説明する。上記実施例において
、実装基板全体を真空バック用フィルム１０で真空バッ
クし、真空バック用フィルム１０が実装基板に押しつけ
られると、プリント基板６上の電子部品９に均一な力が
加わる。また、真空になることによって、嫌気性の導電
性ペースト８が硬化し始める。Next, the above embodiment will be explained. In the above embodiment, when the entire mounting board is vacuum-backed with the vacuum backing film 10 and the vacuum backing film 10 is pressed against the mounting board, a uniform force is applied to the electronic components 9 on the printed circuit board 6. Furthermore, due to the vacuum, the anaerobic conductive paste 8 begins to harden.
このように上記実施例によれば、真空バック用フィルム
１０が実装基板を加圧するという形になり、均一な押圧
が得られると同時に、導電ペースト８の硬化が開始され
るため、信頼性の高い接続性が得られるという効果を有
する。In this way, according to the above embodiment, the vacuum bag film 10 presses the mounting board, and at the same time uniform pressure is obtained, the conductive paste 8 starts to harden, resulting in high reliability. This has the effect of providing connectivity.
また、導電ペースト８のフィラー粒子の太きさ、配合量
などを変化させ、異方性導電ペースト化させることによ
ってファインな接続が可能となる。Further, by changing the thickness, blending amount, etc. of the filler particles in the conductive paste 8 to form an anisotropic conductive paste, a fine connection becomes possible.
発明の効果
本発明は上記実施例より明らかなように、フイルムで真
空バックすることにより、どのような形状の電子部品に
対しても同様の押圧を与えながら接続できるという利点
を有する。そして、更に、接着剤である導電性ペースト
が嫌気性であるため、真空バックされ、均一な圧力がか
かっている時に硬化が開始され、高い信頼性のある接続
性が得られるという効果を有する。Effects of the Invention As is clear from the above embodiments, the present invention has the advantage that electronic components of any shape can be connected while applying the same pressure by vacuum-backing with a film. Furthermore, since the conductive paste that is the adhesive is anaerobic, it starts to harden when it is vacuum-backed and uniform pressure is applied, which has the effect of providing highly reliable connectivity.
第１図〜第３図は、本発明の実施例の嫌気性導電ペース
トと真空バックを利用した電子部品の実装方法を示した
各工程の説明図、第４図〜第７図は、従来の電子部品の
実装方法を示した各工程の説明図である。
６・・・・・・プリント基板、７・・・・・・配線部、
８・・・・・・嫌気性導電ペースト、９・・・・・・チ
ップ部品、１０・・・・・・真空パッ
ク用フィルム。FIGS. 1 to 3 are explanatory diagrams of each process showing a method for mounting electronic components using an anaerobic conductive paste and a vacuum bag according to an embodiment of the present invention, and FIGS. FIG. 3 is an explanatory diagram of each process showing a method for mounting electronic components. 6... Printed circuit board, 7... Wiring section,
8...Anaerobic conductive paste, 9...Chip parts, 10...Vacuum packing film.
Claims (1)
ーストを使用して、電子部品の接着を行い、さらにフィ
ルムでおおい、実装基板全体を真空バックすることによ
って、上記導電ペーストを低温硬化させ、電気的，物理
的に接続を行う電子部品の実装方法。An anaerobic conductive paste is used as an adhesive to be applied on a printed circuit board to bond electronic components, and the conductive paste is cured at a low temperature by covering it with a film and vacuuming the entire mounting board. A mounting method for electronic components that is physically and physically connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1190975A JPH0354888A (en) | 1989-07-24 | 1989-07-24 | Mounting method for electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1190975A JPH0354888A (en) | 1989-07-24 | 1989-07-24 | Mounting method for electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0354888A true JPH0354888A (en) | 1991-03-08 |
Family
ID=16266786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1190975A Pending JPH0354888A (en) | 1989-07-24 | 1989-07-24 | Mounting method for electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0354888A (en) |
-
1989
- 1989-07-24 JP JP1190975A patent/JPH0354888A/en active Pending
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