JPH0353388A - Two-dimensional encoded data decoding and reducing device - Google Patents

Abstract

PURPOSE:To increase the continuous processing speed by using line memory for reference line generation, which decodes two-dimensional encoded data, as a line memory for original picture upper line generation which reduces picture data by the four-point interpolation method. CONSTITUTION:Two-dimensional encoded data is inputted to a decoding circuit 14, and this circuit refers to a line memory 12 or 13, where picture data of the like just preceding the decoding object line is stored, to decode inputted two-dimensional encoded data to picture data. Decoded picture data is written in the line memory 12 or 13, where picture data of the line just preceding the decoding object line is not stored, and is sent to a reduction circuit 15 and an interface 16 to an external bus 19. Thus, the processing to decode encoded data to picture data and the processing to reduce decoded picture data are performed at a high speed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a process for decoding encoded data into image data.
The present invention relates to a two-dimensional code Z data decoding/reducing device that successively performs a process of reducing decoded image data.

[Conventional technology]

An example of a conventional device is shown in FIG.

The decoding device 21 includes a decoding circuit 24 for decoding two-dimensional printing data into image data, and a reference line generation or line memory 2.
2, 23, and interface 2 with external bus 202
It is composed of 5.

The reduction device 26 includes a reduction circuit 29 that reduces image data;
Line memory for upper line generation of 4-point interpolation method 27.28
, and an interface 200 with an external bus 202.

Up. ? i! The reproducing device 21 and the reduction device 26 are each connected to the memory 201 via an external bus 202.

When the two-dimensional code data is decoded by the above device and the decoded image data is reduced, the two-dimensional code data is first converted into image data by the decoding device 21.

The decoded image data is stored in the memory 201 by the interface 25 via the external bus 202 .

The image data stored in the memory 201 is input to the reduction device 26 through the interface 200 of the reduction device 26 and subjected to reduction processing.

Thereafter, the data is stored in the memory 201 by the interface 200 via the external bus 202.

In the above-mentioned conventional device, when decoding two-dimensional code data and further reducing the decoded image data, the two-dimensional code data is decoded into image data by a decoding device, and the decoded image data is once stored in memory. After that, the image data is sent from the memory to the reduction device, subjected to reduction processing, and then stored in the memory again.

For this reason, there are problems in that the number of accesses to the memory is large, the overhead for this is large, and the bus is used frequently. As described above, there is a problem in that no consideration is given to speeding up the processing time, and the number of devices becomes large and large.

In order to solve this problem, for example,
Japanese Patent No. 9768 discloses an apparatus that performs decoding processing and reduction processing in parallel to reduce the number of memory accesses, thereby increasing processing speed.

[Problem to be solved by the invention]

The present invention provides an apparatus that performs continuous processing of decoding hakama code data into image data and reducing the decoded image data.
Furthermore, it is an object of the present invention to provide a two-dimensional encoded data review/reduction device that can speed up continuous processing and reduce the size of the device.

[Means to solve the problem]

In order to achieve the above object, the present invention incorporates a reduction circuit for reducing two-dimensional encoded data into the same device without using a bus, pipelines it, and generates a reference line for decoding the two-dimensional encoded data. The line memory for generating the upper line of the original image for reducing the image data using the four-point interpolation method is shared.

[Effect]

The above means converts two-dimensional mark data into image data.
The process of decoding and the process of reducing the decoded image data using the four-point interpolation method can be performed almost simultaneously.
It is possible to perform continuous processing at high speed in which the dimensional code data is converted to image data, and the Z-converted image data is further reduced by the four-point interpolation method.

Furthermore, the line memory for the reference line for decoding the two-dimensional Fuchin data and the line memory for generating the upper line of the original image for reducing the image data by the four-point interpolation method are made common. This allows a small-scale circuit structure.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

The two-dimensional code data decoding/reducing device↓1 is a device that decodes two-dimensional code data into image data and simultaneously reduces the decoded image data using a four-point interpolation method. This device consists of a decoding circuit 14 that decodes two-dimensional encoded data into image data, a reduction circuit 15 that reduces the decoded image data using four-point interpolation, and a line memory that stores one line of decoded image data. 12, upper 3 and external bus 19
and interfaces 16 and 17, and are connected to the memory 18.

The decoding circuit 14 inputs the two-dimensional code data and outputs the image data of one line before decoding to the line memory 12 or the line memory 1 in which the image data is stored.
3, the input two-dimensional code data is reconstructed into image data.

The decoded image data is written to one of the line memories 2 and 13 that does not store the image data before the line to be revisited, and is also written to the reduction circuit 15.
and is sent to the interface 16 with the external bus 19.

Line memory 12 in which image data before input is stored
Or input from 13, and input 2 bits of the lower line of the original image from the image data sent out from the decoding circuit 14. The reduction circuit 15 converts the 2 bits of the upper line of the original image into
2 bits 1- of the lower line of the original image are used to generate reduced data using a 4-point interpolation method. This reduced data is sent to the interface 7 with the external bus 19.

The interface l6 accumulates the image data sent from the decoding circuit l4 for the data width of the external bus 19, and writes it to the memory 18 via the external bus 19.The interface 17 stores the reduced data sent from the reduction circuit 15. , the data width of the external bus l9 is accumulated and written to the memory l8 via the external bus l9.

In this embodiment, almost at the same time as two-dimensional code data is decoded into image data, the decoded image data can be reduced by the four-point interpolation method.

Furthermore, by making eight line memories for generating reference lines for decoding two-dimensional encoded data and line memories for generating upper lines of the original image for reducing image data by four-point interpolation, A two-dimensional encoded data reconstruction/reduction device can be realized with a small-scale circuit.

〔Effect of the invention〕

According to the present invention, the process of decoding the code s} data into image data and the decoded image data t! : In a device that continuously performs reduction processing, there is an effect that the processing of decoding encoded data into image data and the processing of reducing the decoded image data can be performed at high speed.

In addition, the line memory for generating the fishing line for decoding the two-dimensional code data and the line memory for generating the upper line of the original image for reducing the image data by the four-point interpolation method are made common. As a result, a two-dimensional code data decoding/111δ small device can be realized using a small-scale circuit.

In this way, decoding of two-dimensional code data into image data,
Continuous processing from reduction to decoded image data can be performed at high speed with a small-scale circuit.

[Brief explanation of drawings]

Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 2 is a block diagram showing an example of conventional equipment. 11... Two-dimensional encoded data decoding/reducing device, 12,1
3, 22, 23, 27. 28... line memory, ↓4
, 24...Decoding circuit, 15.29...Reducing circuit, I
G, 17, 25, 200...Interface, 19, 2
02...External bus, 18, 201...Memory, 21
...Decoding device, 26 - Reduction device. 1st Seki

Claims (1)

[Claims] 1. Decoding means for decoding two-dimensional code data, reduction means for performing reduction processing on the decoded image data by four-point interpolation, and reference line generation for decoding the two-dimensional code data. Two-dimensional encoded data decoding and line memory for
In the reduction device, the line memory for generating a reference line for decoding the two-dimensional encoded data is made common with the line memory for generating the upper line of the original image for reducing the image data by a four-point interpolation method. Two-dimensional encoded data decoding and
Reduction device. 2. The reduction means inputs two bits of the upper line of the original image from the line memory, and inputs the two bits of the lower line of the original image from the image data output from the decoding means. The two-dimensional encoded data decoding/reducing device according to claim 1.