JPH0351840U - - Google Patents

Info

Publication number
JPH0351840U
JPH0351840U JP11307989U JP11307989U JPH0351840U JP H0351840 U JPH0351840 U JP H0351840U JP 11307989 U JP11307989 U JP 11307989U JP 11307989 U JP11307989 U JP 11307989U JP H0351840 U JPH0351840 U JP H0351840U
Authority
JP
Japan
Prior art keywords
back side
chip
semiconductor device
conductive material
penetrating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11307989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11307989U priority Critical patent/JPH0351840U/ja
Publication of JPH0351840U publication Critical patent/JPH0351840U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の縦断面図、第2図
は従来の半導体チツプの断面図である。 1……半導体チツプ、2……パツド部、3……
導電性材料、4……バンプ、5……絶縁層、更に
第3図は、本考案の半導体装置を封止した実施例
の上面図、第4図は本考案の半導体装置を封止し
た実施例の部分斜視図である。
FIG. 1 is a longitudinal sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor chip. 1... Semiconductor chip, 2... Pad portion, 3...
Conductive material, 4... Bump, 5... Insulating layer, and FIG. 3 is a top view of an embodiment in which the semiconductor device of the present invention is sealed, and FIG. 4 is a top view of an embodiment in which the semiconductor device of the present invention is sealed. FIG. 3 is a partial perspective view of an example.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リードフレームを使つた樹脂封止において、半
導体チツプの裏面を取付面とし、表面のパツドか
ら垂直方向に導電性材料を貫通させる事によりチ
ツプ裏面に接続バンプを有する事を特徴とする半
導体装置。
A semiconductor device characterized in that, in resin encapsulation using a lead frame, the back side of a semiconductor chip is used as a mounting surface, and connection bumps are provided on the back side of the chip by penetrating a conductive material in a vertical direction from a pad on the front side.
JP11307989U 1989-09-26 1989-09-26 Pending JPH0351840U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11307989U JPH0351840U (en) 1989-09-26 1989-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11307989U JPH0351840U (en) 1989-09-26 1989-09-26

Publications (1)

Publication Number Publication Date
JPH0351840U true JPH0351840U (en) 1991-05-20

Family

ID=31661505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11307989U Pending JPH0351840U (en) 1989-09-26 1989-09-26

Country Status (1)

Country Link
JP (1) JPH0351840U (en)

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