JPH0347327Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) This invention relates to a multilayer capacitor, and particularly to a multilayer capacitor having an additional electrode for capacitance adjustment near the main surface of a dielectric unit.

(Prior art) Conventional examples of this type of multilayer capacitor are, for example, Japanese Utility Model Application No. 56-141440 or Japanese Utility Model Application No. 59-
It is disclosed in Publication No. 173328.

In the former type, an additional electrode for capacitance adjustment is formed on the main surface of a dielectric unit, and a stray capacitance is generated between this additional electrode and the internal electrode. This stray capacitance is connected in parallel to other capacitances formed by internal electrodes included in the dielectric unit. Therefore, by trimming this additional electrode, the area facing the internal electrode is reduced, thereby changing the stray capacitance and adjusting the capacitance of the entire capacitor.

In the latter case, internal electrodes that form a capacitance are formed alternately, and an additional electrode for capacitance adjustment is formed at a sufficient distance from the internal electrode that forms the capacitance, and an additional electrode is connected to an electrode at the end of the internal electrode. The electrodes are electrically connected to different connection electrodes. Therefore, by trimming the surface area including the additional electrodes, the area facing the internal electrodes can be reduced and the capacitance of the entire capacitor can be adjusted.

(Problem to be solved by the invention) In the multilayer capacitor disclosed in Utility Model Application No. 56-141440, migration occurs in the electrode metal due to the electric field generated between the additional electrode for capacitance correction and the external electrode. Not only is there a danger that this may occur, but since the additional electrode is exposed, if dirt or condensed water adheres between the additional electrode and the external electrode, there is a possibility of a short circuit between the electrodes. be.

On the other hand, in the multilayer capacitor disclosed in Japanese Utility Model Application Publication No. 59-173328, the internal electrodes forming the capacitance and the additional electrodes for adjusting the capacitance are formed alternately, so directionality occurs during trimming. In particular, trimming using an automatic machine is difficult.

Therefore, the main purpose of this invention is to provide a multilayer capacitor in which the reliability, insulation properties, moisture resistance, etc. do not deteriorate due to trimming, and furthermore, directionality does not become a problem.

(Means for Solving the Problems) This invention consists of a dielectric unit, which is arranged side by side at intervals on the same main surface inside the dielectric unit, and each of which is exposed to a corresponding side surface of the dielectric unit. a counter electrode, a floating internal electrode facing both of the counter electrodes, a pair of external electrodes formed on both sides of the dielectric unit and connected to corresponding ones of the counter electrodes; In a multilayer capacitor including an additional electrode formed near the main surface of the unit without being connected to the external electrode and for forming a capacitance together with the counter electrode, the total capacitance between the capacitor and the counter electrode is The additional electrodes are formed to face both of the counter electrodes, and the distance between the additional electrodes and the end counter electrode or the floating internal electrode is adjusted to
The multilayer capacitor is characterized in that the distance is greater than the distance between the counter electrode at the end and the floating internal electrode.

(Function) The additional electrode faces both of the counter electrodes with the dielectric unit in between, so that a stray capacitance is formed between the counter electrode and the additional electrode. By processing (trimming) this additional electrode, the capacitance of the entire multilayer capacitor obtained between a pair of external electrodes is adjusted.

(Effects of the invention) According to this invention, since the distance between the additional electrode for capacitance correction and the counter electrode forming the capacitance is increased,
Even without minutely adjusting the depth of trimming, the counter electrode and dielectric unit for forming capacitance will not be damaged more than necessary due to trimming, and short circuits between internal electrodes and reduction in dielectric strength voltage can be prevented. This increases reliability. Furthermore, since the additional electrode for capacitance correction is formed within the dielectric unit, short circuits due to migration of the electrode metal and adhesion of dust or condensed water to the electrodes can be prevented.

Furthermore, the arrangement of the electrodes can be made symmetrical front to back and left to right, thereby eliminating directional trimming. Therefore, it is possible to handle a large amount of trimming processing using an automatic machine. Furthermore, the capacitance can be adjusted even after the capacitor is connected to the electric circuit board.

The above objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

(Embodiment) FIG. 1 is a sectional view showing an embodiment of this invention. This multilayer capacitor 10 includes a dielectric unit 11. Inside this dielectric unit 11, internal electrodes 12a, 12b, 12c and 12
d is formed. The internal electrodes 12a and 12c and the internal electrodes 12b and 12d are respectively arranged at intervals on substantially the same plane and constitute counter electrodes. The internal electrodes 12a and 12b and the internal electrodes 12c and 12d, which are to be paired, are exposed on corresponding side surfaces of the dielectric unit 11, respectively. Furthermore, internal electrode 1
Floating internal electrodes 13a are formed between each pair of electrodes 2a to 12d at appropriate intervals. The floating internal electrodes 13a are insulated from each other and from other electrodes. A part of this floating internal electrode 13a is connected to the internal electrode 12a,
It is opposed to each end of 12b, 12c and 12d. Therefore, capacitance is formed between these electrodes.

External electrodes 15a and 15b are formed on the side surfaces of the dielectric unit 11, respectively. The outer electrode 15a is connected to the inner electrodes 12a and 12.
b and the other external electrode 15b are electrically connected to internal electrodes 12c and 12d, respectively. Therefore, the capacitance of this multilayer capacitor 10 is formed between this pair of external electrodes 15a and 15b.

Near one main surface of the dielectric unit 11,
An additional electrode 14a for capacitance correction is formed spaced apart from both external electrodes 15a and 15b. This additional electrode 14a for capacitance correction is arranged so as to face the internal electrodes 12a and 12c by a predetermined width at each end.
Its additional electrode 14a and internal electrodes 12a and 12
A stray capacitance is formed between C and C. This stray capacitance is connected in parallel to the capacitance formed between internal electrodes 12a and 12c and between internal electrodes 12b and 12d through floating internal electrode 13a. Therefore, the additional electrode 14a is processed (trimmed)
Then, the area of the additional electrode 14a facing the internal electrode is reduced, thereby changing the stray capacitance, and the capacitance of the multilayer capacitor 10 occurring between the external electrodes 15a and 15b can be adjusted. .

Further, the distance between the additional electrode 14a for capacitance correction and the internal electrodes 12a and 12c at the end of the counter electrode layer is formed to be larger than the distance between the internal electrodes 12a and 12c for capacitance formation and the floating internal electrode 13a. ing. Therefore, the capacitance can be adjusted even by rough trimming, the capacitance can be easily adjusted, and short circuits between internal electrodes and reduction in dielectric strength voltage due to trimming can be prevented. Further, since the additional electrode 14a for capacitance correction is formed within the dielectric unit 11, it is possible to prevent migration of the electrode metal and short circuit due to dust or condensed water adhering to the electrode.

Note that this embodiment can be obtained, for example, as follows. First, two
Two electrodes are formed and this is used as a first dielectric layer. A second dielectric layer is placed on top of the first dielectric layer. At this time, the thickness of the first dielectric layer is the same as that of the second dielectric layer.
A dielectric layer is used that is two to three times as large as the dielectric layer of . In addition, two electrodes formed on the first dielectric layer and their ends are opposed to each other by a predetermined width at approximately the center of the main surface of the second dielectric layer, thereby creating a predetermined electrostatic charge. An electrode is formed such that a capacitance is formed. Then, on this second dielectric layer, electrodes are formed in the same arrangement as the first dielectric layer, and a third dielectric layer having the same thickness as the second dielectric layer is placed. be done. Furthermore, a fourth dielectric layer is placed on the third dielectric layer, with electrodes formed in the same arrangement as the second dielectric layer, and having the same thickness as the first dielectric layer. be done. Finally, a fifth dielectric layer without electrodes and having the same thickness as the second dielectric layer is placed on the fourth dielectric layer, and is baked in an electric furnace or the like to be integrated. become External electrodes are formed on the sides of this fired product, for example, of silver or silver-palladium alloy.

FIG. 1B is an illustrative diagram showing an example of trimming in the capacitor 10 of this embodiment. Trimming is performed only on a part of the additional electrode 14a for capacitance correction. The distance between the additional electrode 14a for capacitance correction and the internal electrodes 12a and 12c for forming a capacitance is, for example, two to three times wider than the distance between the internal electrode 12a for forming a capacitance and the floating internal electrode 13a. Therefore, even rough trimming does not damage the capacitance forming internal electrodes 12a and 12c.
That is, the part 16 trimmed into an inverted conical shape
However, the capacitance forming internal electrode 12a or 12c is not achieved.

FIG. 2A is a sectional view showing a modification of the embodiment of FIG. 1. The multilayer capacitor 10 in FIG. 2A is the same as the multilayer capacitor shown in FIG.
It is formed so as to face d. In this modification, since the capacitance correction additional electrodes 14a and 14b are formed near both main surfaces of the dielectric unit 11, there is no directionality during mounting, so that the mounting can be facilitated. FIG. 2B is an illustrative diagram showing an example of trimming in the capacitor 10 of FIG. 2A. As shown in the figure, trimming is performed only on the capacitance correction additional electrode 14a, as indicated by the trimming portion 16.

FIG. 3A is a sectional view showing an embodiment different from the embodiment of FIG. 1. Capacitor 10 of this modification
Now, in the vicinity of the main surface of the dielectric unit 11, internal electrodes 14c and 14d and 14e and 1 are arranged separately on the same plane with their end faces facing each other.
4f is used as an additional electrode for capacitance correction. Internal electrodes 14c and 14d and internal electrodes 14e and 14f, which are additional electrodes to be paired with these
are exposed on corresponding side surfaces of the dielectric unit 11, and are connected to corresponding external electrodes 15a and 15.
b and are electrically connected to each other. In this example, between the floating internal electrodes 13a and 13b, a pair of internal electrodes 12a and 12c constituting a counter electrode are arranged at an appropriate interval on substantially the same plane. and are opposed to the respective ends of floating internal electrodes 13a and 13b. And additional electrode 14c
and the distance between 14d and the floating internal electrode 13a or the additional electrodes 14e and 14f and the floating internal electrode 1
3b, the floating internal electrodes 13a and 13
b and the internal electrodes 12a and 12c. Figure 3B is the third
FIG. 3 is an illustrative diagram showing an example of trimming in the capacitor 10 in FIG. As shown in the figure, trimming is performed only on the internal electrode 14c, as indicated by the trimming region 16. Also in this embodiment, since there is no directionality during mounting, the mounting can be facilitated.

As described above, in this invention, the most effective trimming method is inverted conical trimming using a laser or the like. Further, in this embodiment, the arrangement of the electrodes is symmetrical in the front and rear and left and right directions, so that the directionality does not become a problem during trimming, and therefore, it is possible to handle a large amount of trimming processing by an automatic machine.

[Brief explanation of the drawing]

FIG. 1A is a sectional view showing an embodiment of this invention. FIG. 1B is an illustrative view showing an example of trimming in the embodiment of FIG. 1A. Figure 2A is the first
FIG. 3 is a cross-sectional view showing a modification of the embodiment shown in FIG. 2nd B
The figure is an illustrative view showing an example of trimming in a modification of the embodiment of FIG. 1A. FIG. 3A is a sectional view showing an embodiment different from the embodiment of FIG. 1A. FIG. 3B is an illustrative view showing an example of trimming in an embodiment different from the embodiment in FIG. 1A. In the figure, 10 is a multilayer capacitor, 11 is a dielectric unit, 12a, 12b, 12c and 1
2d is an internal electrode constituting a counter electrode, 13a and 13b are floating internal electrodes, 14a, 14b, 14
c, 14d, 14e and 14f are additional electrodes, 1
5a and 15b indicate external electrodes.

Claims (1)

[Claims for Utility Model Registration] A dielectric unit, counter electrodes arranged at intervals on the same main surface inside the dielectric unit, and each of which is exposed to a corresponding side surface of the dielectric unit; floating internal electrodes facing both of the counter electrodes, a pair of external electrodes formed on both sides of the dielectric unit and connected to corresponding ones of the counter electrodes, and a pair of external electrodes formed near the main surface of the dielectric unit. A multilayer capacitor including an additional electrode formed without being connected to the external electrode and forming a capacitance together with the counter electrode, the additional electrode adjusting the overall capacitance with the counter electrode. are formed to face both of the counter electrodes, respectively, and the distance between the additional electrode and the counter electrode or floating internal electrode at the end is larger than the distance between the counter electrode at the end and the floating internal electrode. A multilayer capacitor featuring: