JPH0346348A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To switch whether a buffer outputs an output of a logic circuit after inverting it or without inverting it by a method whether a control-signal input pad is connected selectively to a first external connection terminal or a second external connection terminal. CONSTITUTION:A buffer 7 which can output an output of a logic circuit 2 after inverting it or without inverting it according to a control signal from a control-signal input pad 6 is installed. The output of the logic circuit 2 is given to EX.OR gates 7a; when the control signal given to the control-signal input pad 6 is at H, the EX.OR gates 7a function as an inverter. On the other hand, when the control signal is at L, the EX.OR gates 7a function as a noninverted buffer. When the control-signal input pad is connected selectively to a first external connection terminal or a second external connection terminal in this manner, it is possible to switch whether the buffer outputs the output of the logic circuit after inverting it or without inverting it.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device in which electrode pads of a semiconductor chip are connected to external connection terminals using bonding wires, and in particular relates to a semiconductor integrated circuit device in which electrode pads of a semiconductor chip are connected to external connection terminals using bonding wires. The present invention relates to a semiconductor integrated circuit device capable of switching between inverting and non-inverting output.

[Conventional technology]

FIG. 4 is a block diagram showing a chip 10 of a conventional semiconductor integrated circuit device having a function of inverting and outputting the output of the logic circuit 2. The signal input to input pad 1 is given to logic circuit 2. The logic circuit 2 becomes “H” (power supply voltage V.0) or “L” (
(ground potential).

The outputs of the logic circuits 2 are respectively given to inverters 3. The inverter 3 provides an inverted signal of the output of the logic circuit 2 to the output pad 4.

FIG. 5 shows a chip 1 of a conventional semiconductor integrated circuit device which has a function of directly outputting the output of a logic circuit 2 without inverting it.
FIG. 2 is a block diagram showing 0. In this circuit, the fourth
The inverter 3 in the circuit shown in the figure is replaced with a buffer 5. In other words, the output of the logic circuit 2 is directly output to the output pad 4.

Conventionally, in order to realize the two types of circuits shown in FIGS. 4 and 5, a semiconductor chip having the circuit configuration shown in FIG. 4 and a semiconductor chip having the circuit configuration shown in FIG. 5 have been separately prepared.

[Problem to be solved by the invention]

A conventional semiconductor integrated circuit device is configured as described above, and semiconductor chips having respective functions are separately prepared for inverting and non-inverting the output of the logic circuit 2 and for non-inverting the output. This poses a problem in that it requires high costs, and it takes a long time to deliver the order.

This invention was made to solve the above-mentioned problems, and it is a semiconductor that can switch between inverting and outputting the output of a logic circuit and outputting it without inverting it using a single semiconductor chip. The purpose is to obtain an integrated circuit device.

[Means to solve the problem]

A semiconductor integrated circuit device according to the present invention includes a logic circuit that derives a predetermined output according to an input signal, an output pad, and a control circuit that receives a control signal at a first or second voltage level.
connected to the first control signal input pad, the logic circuit, the output pad and the control signal input pad, and inverting the output of the logic circuit in response to a first voltage level of the control signal to the first control bone input pad; a semiconductor integrated circuit chip having a buffer that non-inverts the output pad in response to the second voltage level;
A first external connection terminal to which a first voltage level is supplied from the outside, and a second external connection terminal to which a second voltage level is supplied from the outside, and the control signal input pad is connected to the first or second external connection terminal. By selectively connecting the buffer to the terminal, the buffer can switch between inverting and non-inverting the output of the logic circuit.

[Effect]

In this invention, by selectively connecting the control signal input pad to the first or second external connection terminal, the buffer switches between inverting and non-inverting the output of the logic circuit. Therefore, there is no need to prepare separate semiconductor chips depending on whether the output of the logic circuit is output without being inverted or when it is output after being inverted.

〔Example〕

FIG. 1 shows a chip 1 of a semiconductor integrated circuit device according to the present invention.
FIG. 2 is a block diagram showing an example of the configuration of 0.

In the figure, a conventional chip 1 shown in FIGS. 4 and 5 is shown.
The difference from 0 is that a control signal input pad 6 to which a control signal is input is newly provided, and a control signal input pad 6 is newly provided.
FIG. 4 shows a buffer 7 that can output the output of the logic circuit 2 in an inverted or non-inverted state according to a control signal from the logic circuit 2.

Inverter 3 in Figure 5. This is because it is provided in place of buffer 5. Buffer 7 is an exclusive OR (hereinafter referred to as EX
, OR) gate 7a, the -10,000 input is connected to the control signal input pad 6, the other input is connected to the output of the logic circuit 2, and the output is connected to the output pad 4. Other configurations are the same as before.

Next, the operation will be explained. A signal applied to input pad 1 is applied to logic circuit 2. The logic circuit 2 outputs “H” (1 source voltage voo) or “H” depending on the applied signal.
Derive L” (ground potential).

The output of the logic circuit 2 is given to EX, OR gate 7a. The control signal given to the control signal input pad 6 is “H”
At this time, the EX, OR gate 7a functions as an inverter and becomes equivalent to the circuit shown in FIG. On the other hand, when the control signal is "L", EX.

The OR gate 7a functions as a non-inverting buffer and is equivalent to the circuit shown in FIG.

2 and 3 are plan views when the chip 10 shown in FIG. 1 is mounted. In FIG. 2, a chip 10 is placed on a die pad 20. As shown in FIG. The input pad 1 on the chip 10 is connected to the input lead 1a, and the output pad 4 is connected to the output lead 4a by a wiring method.
Connected via 0. In addition, power supply voltage pad 30
is connected to the power supply voltage lead 30a, the ground potential pad 35 is connected to the ground potential lead 35a, and the control signal input pad 6 is connected to the ground potential lead 35a through a metal wire 40a by a wiring method. In this connection, since the ground potential (“L”) is input to the control signal input pad 6, the circuit becomes equivalent to the circuit shown in FIG. 5, and the output of the logic circuit 2 is output without being inverted. .

In FIG. 3, the control signal input pad 6 is connected to the power supply voltage lead 30a via the die pad 20. Other connection relationships are the same as those shown in FIG. In this connection relationship, the control signal input pad 6 has an electric R voltage vc.
Since c (“H”) is input, the circuit is equivalent to the circuit shown in FIG. 4, and the output of the logic circuit 2 is inverted and output.

As described above, since the buffer 7 is provided which switches between inverting and non-inverting the output of the logic circuit 2 according to the voltage level of the signal applied to the control signal input pad 6, the logic circuit 2 There is no need to provide separate chips 10 for inverting and non-inverting the output.

Therefore, when mounting a semiconductor chip, semiconductor integrated circuit devices having different characteristics can be easily obtained by selectively connecting the control signal input pad 6 to the ground potential lead 35a or the power supply voltage lead 30a using a wiring method. be able to.

In the above embodiment, the buffer 7 is composed of the EX and OR gates 7a, but depending on the voltage level of the control signal, it is possible to switch between outputting the output of the logic circuit 2 in an inverted state or in a non-inverted state. If possible, it is not limited to the EX and OR gates 7a.

In addition, in the above embodiment, when applying a ground potential to the control signal input pad 6, the control signal input pad 6 must be directly connected to the ground potential lead 35a (FIG. 2), and the power supply potential V
. 0, it is indirectly connected to the power supply voltage lead 30a via the die pad 20 (Fig. 3), but if the control signal input pad 6 is on the power supply voltage lead 30a side, the above-mentioned indirect or direct connection is made. The connection relationship can be reversed.

〔Effect of the invention〕

As described above, according to the present invention, a logic circuit that derives a predetermined output according to an input signal, an output pad, a control signal input pad into which a control signal of the first or second voltage level is input, connected to the logic circuit, the output pad and the control signal input pad, inverting the output of the logic circuit in response to a first voltage level of the control signal to the control signal input pad;
a semiconductor integrated circuit chip having a buffer that non-inverts the output pad in response to the second voltage level; a first external connection terminal that supplies the first voltage level from the outside; and a second external connection terminal that supplies the second voltage level from the outside. By selectively connecting the control signal input pad to the first or second external connection terminal, the buffer can output the output of the logic circuit either inverted or non-inverted. Since it is possible to switch whether to output the output of the logic circuit in a non-inverted manner or to output the output in an inverted manner, there is no need to prepare separate semiconductor chips. As a result, the cost for developing a semiconductor integrated circuit device can be reduced to about 1/2, and the delivery time for an order can be shortened.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a semiconductor integrated circuit device according to the present invention, FIGS. 2 and 3 are plan views of the device shown in FIG. 1 when it is mounted, and FIGS. 4 and 5 1 is a block diagram showing the configuration of a conventional semiconductor integrated circuit device. In the figure, 2 is a logic circuit, 4 is an output pad, 6 is a control signal input pad, and 7 is a buffer. Note that the same reference numerals in each figure indicate the same or corresponding parts. 1st package 4: Output pad 6: Control signal input pad 7: Buffer Figure 3 Figure Figure 3 Authentic (self-proposed) 1999 1227 Song * State 2015 Kohi patent application @ 1-183231 3. Person making the amendment 5. ``Detailed description of the invention column'' of the specification to be amended 6. Contents of the amendment (1) Change ``metal wire 4'' to ``metal wire 40'' on page 7, line 10 of the specification. correct. aj or more

Claims (1)

[Claims] (1) a logic circuit that derives a predetermined output according to an input signal; an output pad; a control signal input pad into which a control signal of a first or second voltage level is input; the logic circuit, the output pad, and connected to the control signal input pad, inverts the output of the logic circuit in response to a first voltage level of a control signal applied to the control signal input pad, and non-inverts the output in response to a second voltage level. a semiconductor integrated circuit chip having a buffer applied to the pad, a first external connection terminal to which the first voltage level is externally supplied, and a second external connection terminal to which the second voltage level is externally supplied. , by selectively connecting the control signal input pad to the first or second external connection terminal, the buffer switches whether the output of the logic circuit is inverted or non-inverted. 1. A semiconductor integrated circuit device characterized by being able to.