JPH0346233A - Manufacture of bump - Google Patents

Manufacture of bump

Info

Publication number
JPH0346233A
JPH0346233A JP1181336A JP18133689A JPH0346233A JP H0346233 A JPH0346233 A JP H0346233A JP 1181336 A JP1181336 A JP 1181336A JP 18133689 A JP18133689 A JP 18133689A JP H0346233 A JPH0346233 A JP H0346233A
Authority
JP
Japan
Prior art keywords
bump
photoresist
bumps
substrate
barrier metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1181336A
Other languages
Japanese (ja)
Other versions
JP3027586B2 (en
Inventor
Yasunori Senkawa
保憲 千川
Katsunobu Mori
勝信 森
Atsushi Ono
敦 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP01181336A priority Critical patent/JP3027586B2/en
Publication of JPH0346233A publication Critical patent/JPH0346233A/en
Application granted granted Critical
Publication of JP3027586B2 publication Critical patent/JP3027586B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To form a mushroom type bump in the least deposition in the lateral direction of the bump by a method wherein, when the bump is formed, a substrate is coated with a photoresist in thickness exceeding 54mum but lower than the bump level. CONSTITUTION:A pad 3 is provided on the surface of a substrate 1 while a film of barrier metal 4 is provided on the surface of an insulating film 2 for passivation e.g. by sputtering process. Next, the whole surface is coated with positive or negative type photoresist 6 in thickness exceeding 5mum e.g. 15mum and then a hole reaching the barrier metal 4 is made in the part above the pad 3 by photolithography while the hole part is plated with a bump metal e.g. Au 20mum thick. Later, the photoresist 6 and the barrier metal 4 on the parts excluding the bump metal are removed to form the bump 5. At this time, the protrusion of the top of the mushroom type bump 5 will be around 5mum thick. Through these procedures, the mushroom type bump 5 in small protrusion can be formed at the least interval from the adjacent bumps.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体チップのような半導体装置を基板に取り
付ける際に使用されるバンプの製造方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing bumps used when attaching a semiconductor device such as a semiconductor chip to a substrate.

(従来の技術) テープキャリア方式、7リツプチツプ方式等にかいてチ
ップを基板に取り付ける際バンプが使用されてかり、通
常はチップのパッド上に形成されているが、フィンガー
の先端に形成される場合もある。
(Prior art) Bumps are used when attaching a chip to a substrate using the tape carrier method, 7-lip chip method, etc., and are usually formed on the pads of the chip, but in some cases they are formed on the tips of fingers. There is also.

第2図及び第8図はチップのパッド上に形成し九例であ
って、第2図はバンプの断面形状がマツシュルーム形状
の場合であり、第3図はバンプの断面の壁面が垂直の場
合である。両図に訃いて、例えばシリコンのような基板
1の表面には回路が形成され、端子の部分には例えばA
tのような金属によりパッド8が設けられ、その上にバ
リヤ金属4を介してメツキによりバンプ5が形成される
Figures 2 and 8 show nine examples of bumps formed on the pads of a chip. Figure 2 shows the case where the cross-sectional shape of the bump is a mushroom shape, and Figure 3 shows the case where the wall surface of the cross-section of the bump is vertical. It is. In both figures, a circuit is formed on the surface of a substrate 1 made of, for example, silicon, and a circuit is formed on the surface of the substrate 1, for example, A.
A pad 8 is provided with a metal such as T, and a bump 5 is formed thereon by plating with a barrier metal 4 interposed therebetween.

前記のバンプの形状は、メツキ形成するときの7オトレ
ジストの膜厚で決定される。すなわち、フォトレジスト
の膜厚がバンプの高さより小さい場合は、@2図のよう
なマツシュルーム状となり、7オトレジストの膜厚がバ
ンプの高さより大きいと第8図のような壁面が垂直のも
のとなる。なおバンプ以外の部分は絶a!2によって覆
われている。
The shape of the bump is determined by the thickness of the 7-photoresist when plating is formed. In other words, if the thickness of the photoresist is smaller than the height of the bump, it will become like a pine mushroom as shown in Figure 2, and if the thickness of the photoresist is larger than the height of the bump, the wall will be vertical as shown in Figure 8. Become. The parts other than the bumps are absolutely perfect! covered by 2.

(発明が解決しようとする課題) バンプの高さは、外部回路と接続のため、約20μm必
要であるが、5第2図のようなマツシュルーム状のもの
を形成するときは、フォトレジストの厚さが通常2〜3
μm位であり、バンプの高さより小さい。従って、パッ
ド上のフォトレジストを除去し、メツキによりバンプを
形成すると、パッド上に高さ方向に成長するが、フォト
レジストの表面にも横方向に成長する。このため、隣の
バンプとのシ璽−トを防ぐには、横方向の成長弁だけ、
すなわち、バンプ高さ20 /7 m、フォトレジスト
厚2μmとして横方向の成長弁18μmの2倍以上の約
40pm、隣のバンプとの間を離す必要がある。従って
、バンブ電極数が多くなると、チップサイズが大きくな
り不利である。また、フォトレジストが薄いため、工程
の途中で摩擦により剥離が生じる虞れがある。
(Problem to be Solved by the Invention) The height of the bump needs to be approximately 20 μm for connection with an external circuit, but when forming a mushroom-shaped bump as shown in Figure 2, the thickness of the photoresist must be Saga is usually 2-3
It is on the order of μm, which is smaller than the height of the bump. Therefore, when the photoresist on the pad is removed and a bump is formed by plating, bumps grow on the pad in the height direction, but also grow laterally on the surface of the photoresist. Therefore, in order to prevent the bump from colliding with the adjacent bump, only the lateral growth valve is required.
That is, assuming a bump height of 20/7 m and a photoresist thickness of 2 μm, it is necessary to space the adjacent bumps by about 40 pm, which is more than twice the horizontal growth valve of 18 μm. Therefore, as the number of bump electrodes increases, the chip size increases, which is disadvantageous. Furthermore, since the photoresist is thin, there is a risk that it may peel off due to friction during the process.

第8図のような壁面が垂直のバンプは、通常ネガタイプ
の7オトレジストの厚さをバンプの高さより大きくして
形成する。バンプの高さを20μmとすると、フォトレ
ジストの厚さは25〜80μm必要となる。この厚いフ
ォトレジストに穴ヲ明けてパッドの上にメツキするので
あるが、このとき、メツキ液が穴明けされた部分に十分
に入り込めず、メツキが付着しないことがある。またフ
ォトレジストを現像し不要な部分を除去して穴を明ける
とき、フォトレジストがう1く除去されず、スカムと呼
ばれるレジスト残渣が残る。そのため、現像の後に通常
スカム除去工程が必要となる。
Bumps with vertical walls as shown in FIG. 8 are usually formed by using negative type 7 photoresist with a thickness greater than the height of the bumps. If the bump height is 20 μm, the photoresist needs to have a thickness of 25 to 80 μm. Holes are drilled in this thick photoresist and plated onto the pads, but at this time, the plating solution may not be able to fully penetrate into the drilled areas, and the plating may not adhere. Furthermore, when the photoresist is developed and unnecessary portions are removed to create holes, the photoresist is not removed any further and a resist residue called scum remains. Therefore, a scum removal step is usually required after development.

以上のようにマツシュルーム状のバンプは、接続される
部分の面積は広くなるが、チップサイズが大きくなり、
工程上の事故の危険性があり、壁面垂直のバンプは横方
向に成長しないので、チップサイズは小さくなるが、工
程が多くなりかつ事故の危険性がある。
As mentioned above, the pine mushroom-shaped bump increases the area of the connected part, but it also increases the chip size.
There is a risk of an accident during the process, and since bumps perpendicular to the wall surface do not grow laterally, the chip size becomes smaller, but the number of steps increases and there is a risk of an accident.

(課題を解決するための手段) バンプを形成するとき基板上に塗布する7オトレジスト
の厚さを5μm以上でかつバンプの高さより小さくした
(Means for Solving the Problems) When forming bumps, the thickness of the 7-photoresist coated on the substrate was set to 5 μm or more and smaller than the height of the bumps.

(作 用) 以上のようにすることにより、バンプの横方向の成長を
小さくすることができ、しかもマツシュルーム状のバン
プを形成することができる。
(Function) By doing as described above, it is possible to reduce the growth of the bump in the lateral direction, and moreover, it is possible to form the bump in the shape of a pine mushroom.

(実施例) w、1図は本発明の一実施例の断面図である。基板真の
表面のパッド8及びパシベイシ璽ン用の絶縁膜2の表面
に例えばスパッタリングによりバリヤ金M4の被膜を設
ける。次にポジタイプ又はネガタイプの7オトレジスト
6を全面に例えば15μmの厚さに塗布し、フォトリン
グラフィによりパッド8の上部にバリヤ金属4に達する
穴を明け、この部分にバンブ金属例えばAuを20μm
の厚さにメツキする。その後点線で示されるフォトレジ
スト6及びバンプ以外の部分のバリヤ金属4を除去する
と、第1図の実線で示されるようなバンプ5が形成され
る。この場合マツシュルーム状のバンプ5の頂部の張り
出しは約5μmとなる。張り出しの大きさが小さ過ぎる
と、接触面積が小さくなるので、約5μm以上が望まし
い。
(Embodiment) Figure 1 is a sectional view of an embodiment of the present invention. A film of barrier gold M4 is provided on the pad 8 on the real surface of the substrate and on the surface of the insulating film 2 for passivation by sputtering, for example. Next, a positive type or negative type 7 photoresist 6 is applied to a thickness of, for example, 15 μm over the entire surface, a hole is made in the upper part of the pad 8 to reach the barrier metal 4 by photolithography, and a bump metal such as Au is applied to this part to a thickness of 20 μm.
Plate to the thickness of . Thereafter, by removing the photoresist 6 shown by dotted lines and the barrier metal 4 in areas other than the bumps, bumps 5 as shown by solid lines in FIG. 1 are formed. In this case, the protrusion of the top of the pine mushroom-shaped bump 5 is about 5 μm. If the size of the protrusion is too small, the contact area will become small, so it is preferably about 5 μm or more.

(発明の効果) 従来の方法であれば、マツシュルーム状のバンプを形成
するとき、隣のバンプとの間隔を約5μm以上離さなけ
ればならなかったものを、本発明によれば約5μm以上
迄短かくすることができる。また、本発明によれば、7
オトレジストの厚さが比較的大きいため、剥離すること
が少なく、また、穴が浅いのでメツキ液が穴に入り易く
、また、スカム除去の必要もなくなる。
(Effects of the Invention) With the conventional method, when forming a bump in the shape of a pine mushroom, the distance between adjacent bumps had to be approximately 5 μm or more, but according to the present invention, the distance between adjacent bumps has been reduced to approximately 5 μm or more. It is possible to do this. Further, according to the present invention, 7
Since the thickness of the photoresist is relatively large, it is less likely to peel off, and since the holes are shallow, the plating solution can easily enter the holes, and there is no need to remove scum.

更に、現在主流であるマツシュルーム状バンプ用のポジ
タイプフォトレジストの既存設備がその11使用できる
。すなわち、フォトレジストの厚さを20μm以上とす
る場合、レジストの種類はネガタイプとなるが、151
t m程度筐でであればポジタイプのレジストで対応で
きる。従って、従来のマツシュルーム状のバンプ形成に
用いられていたポジタイプ用の設備が利用できる。
Furthermore, existing equipment for positive type photoresist for pine mushroom bumps, which is currently the mainstream, can be used. In other words, when the thickness of the photoresist is 20 μm or more, the type of resist is negative type, but 151
If the case is about tm, a positive type resist can be used. Therefore, it is possible to use the positive type equipment that has been used in the conventional formation of bumps in the form of pine mushrooms.

な釦、本発明によれば、例えば400ビンのチップでは
、チップサイズが一辺あたり約3IIII+も小さくで
き、大幅なコストダウンとなる。
According to the present invention, for example, in a 400-bin chip, the chip size can be reduced by about 3III+ per side, resulting in a significant cost reduction.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例によるバンプの断面図、第2
図及び第3図は従来のバンプの断面図である。
FIG. 1 is a sectional view of a bump according to an embodiment of the present invention, and FIG.
3 and 3 are cross-sectional views of conventional bumps.

Claims (1)

【特許請求の範囲】[Claims] 1、バンプを形成するとき、基板上に塗布するフォトレ
ジストの厚さを5μm以上でかつバンプの高さより小さ
くしたことを特徴とするバンプの製造方法。
1. A method for manufacturing a bump, characterized in that when forming the bump, the thickness of the photoresist applied on the substrate is 5 μm or more and smaller than the height of the bump.
JP01181336A 1989-07-13 1989-07-13 Manufacturing method of bump Expired - Fee Related JP3027586B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP01181336A JP3027586B2 (en) 1989-07-13 1989-07-13 Manufacturing method of bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01181336A JP3027586B2 (en) 1989-07-13 1989-07-13 Manufacturing method of bump

Publications (2)

Publication Number Publication Date
JPH0346233A true JPH0346233A (en) 1991-02-27
JP3027586B2 JP3027586B2 (en) 2000-04-04

Family

ID=16098917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP01181336A Expired - Fee Related JP3027586B2 (en) 1989-07-13 1989-07-13 Manufacturing method of bump

Country Status (1)

Country Link
JP (1) JP3027586B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100382377B1 (en) * 1999-06-10 2003-05-01 엔이씨 일렉트로닉스 코포레이션 Bump transfer plate, manufacturing method thereof, semiconductor device, and manufacturing method thereof
KR100534219B1 (en) * 1999-07-02 2005-12-08 후지쯔 가부시끼가이샤 Semiconductor device and method of producing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266851A (en) * 1986-05-14 1987-11-19 Nec Corp Forming method for solder bump electrode
JPS6329940A (en) * 1986-07-23 1988-02-08 Nec Corp Manufacture of semiconductor device
JPS63119550A (en) * 1986-11-07 1988-05-24 Seiko Instr & Electronics Ltd Formation of solder bump
JPS63237445A (en) * 1987-03-25 1988-10-03 Nec Corp Manufacture of semiconductor device
JPS6417449A (en) * 1987-07-10 1989-01-20 Fuji Electric Co Ltd Formation of bump electrode of semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266851A (en) * 1986-05-14 1987-11-19 Nec Corp Forming method for solder bump electrode
JPS6329940A (en) * 1986-07-23 1988-02-08 Nec Corp Manufacture of semiconductor device
JPS63119550A (en) * 1986-11-07 1988-05-24 Seiko Instr & Electronics Ltd Formation of solder bump
JPS63237445A (en) * 1987-03-25 1988-10-03 Nec Corp Manufacture of semiconductor device
JPS6417449A (en) * 1987-07-10 1989-01-20 Fuji Electric Co Ltd Formation of bump electrode of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100382377B1 (en) * 1999-06-10 2003-05-01 엔이씨 일렉트로닉스 코포레이션 Bump transfer plate, manufacturing method thereof, semiconductor device, and manufacturing method thereof
KR100534219B1 (en) * 1999-07-02 2005-12-08 후지쯔 가부시끼가이샤 Semiconductor device and method of producing the same

Also Published As

Publication number Publication date
JP3027586B2 (en) 2000-04-04

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