JPH04264733A - Formation of bump base film for integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent aluminum side etching by coating a wafer with a base film under the condition that the edge of the aluminum of the wiring film is not exposed by covering the edge of the wiring film with a protecting film so as not to expose the edge of the wiring film in the peripheral area of the wafer. CONSTITUTION:An aluminum wiring film 3 is patterned on an insulating film 2 provided on the surface of the semiconductor area of a wafer 1. The wiring film 3 in a peripheral area PZ does not reach the periphery 1a of the wafer 1. Then the wafer 1 is coated with the protecting film 4 on the whole plane. At that time, the wiring film 3 is patterned in the position aloof from a periphery 1a, and the edge is always covered with the protecting film 4. The whole plane of the wafer 1 is coated with a bottom base film 5 and a top base film 6. The top base film 6 is etched leaving the top of each window 4a of the protecting film 4 in a chip area. Since the aluminum of the wiring film 3 is completely covered with the protecting film 4 and the bottom base film 5, side etching is prevented.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a base film necessary for providing so-called bump electrodes for external connection on a flip chip of an integrated circuit device by electrolytic plating.

0002

2. Description of the Related Art As is well known, the above-mentioned bump electrode is a protruding metal electrode for connecting an integrated circuit device to the outside, and a flip chip equipped with this bump electrode is mounted after the chip is temporarily housed in a package. It has the advantage of saving space and labor required for implementation, and has come to be widely adopted for streamlining electronic devices.

[0003] Since it is of course advantageous to fabricate these bump electrodes in the wafer state before each integrated circuit device is isolated into flip chips, windows are formed at predetermined locations on a protective film made of silicon nitride or the like that covers the wafer surface. The end of the aluminum wiring film for internal connection of the integrated circuit is exposed by opening it, and solder, copper, gold, etc. It is customary to grow metal for bump electrodes by electrolytic plating. Although it is well known, the procedure for growing the bump electrode metal by electrolytic plating will be briefly explained below with reference to FIGS. 3 and 4.

FIG. 3 is an enlarged cross-sectional view of a small portion of the wafer 1 where the bump electrodes 10 are provided, and circuit elements such as transistors and diodes constituting the integrated circuit are built in locations not shown. Assume that the ends of an aluminum wiring film 3 connected to the circuit elements are disposed as shown in the figure, on an insulating film 2 such as a silicon oxide film attached to the semiconductor surface of a wafer 1. The wiring film 3 is covered with a protective film 4 made of silicon nitride or the like as usual, but in order to provide the bump electrode 10, a window 4a is opened in the upper end portion of the wiring film 3 to expose the wiring film 3.

The base film for the bump electrode 10 usually has a two-layer composite structure consisting of a lower base film 5 and an upper base film 6, both of which are extremely thin metal films. The lower base film 5 made of titanium or the like is in conductive contact with the aluminum of the wiring film 3 within each window 4a and is deposited to cover the entire surface of the wafer 1, and the upper base film 6 made of copper or the like is deposited so as to cover the entire surface of the wafer 1. It is formed only at a portion corresponding to the window 4a to have the same diameter or corner size as the bump electrode 10, approximately several tens of μm. When growing the metal 8 for the bump electrode 10 by electrolytic plating, a photoresist film 7 is first applied as a plating mask over the entire surface of the wafer 1, and then the upper base film 6 is grown by a photo process.
Then, using the lower base film 5 as a negative plating electrode, bump electrode metal 8 is electrolytically plated on thousands to tens of thousands of locations within the wafer where the upper base film 6 is exposed. The particles are grown all at once to a desired height, resulting in the state shown in the figure.

FIG. 4 shows a state during electrolytic plating of the peripheral region of the wafer 1 on which the bump electrodes 10 are formed, which is different from the chip region shown in FIG. 2. As shown in FIG. The lower base film 5 also covers this peripheral area, and a photoresist film 7 is applied thereon. In order to connect the lower base film 5 as a plating electrode to the negative terminal of the plating power supply during electrolytic plating, connectors 9 with sharp tips are distributed in the circumferential direction of the wafer 1 within this peripheral area through the photoresist film 6. It is connected to the lower base film 5 at multiple locations as shown in the figure.

In this way, the metal 8 for the bump electrode 10 is
After growing all at once within the plane of the wafer 1, first remove the photoresist film 7 from the state shown in FIG. The upper base film 6 is removed by etching using a diluted hydrofluoric acid solution as a mask, and the wafer 1 is further scribed to isolate a flip chip having bump electrodes 10.

[0008]

[Problem to be Solved by the Invention] As mentioned above, the wiring film 3
In order to grow the bump electrode metal 8 connected to the bump electrode by electrolytic plating, a lower base film 5 and an upper base film 6 are interposed between the two, with the lower base film 5 serving as a plating electrode and the upper base film 6 serving as a bump electrode. Each is used as a connection metal with the electrode metal 8, and the wiring film is removed from the periphery of the wafer 1 during etching for patterning the upper base film 6 at locations corresponding to each bump electrode 10 as described above. There is a problem that the aluminum of No. 3 is easily subjected to so-called side etching. Hereinafter, the state of this side etching will be explained with reference to FIG. 5.

FIG. 5 is a cross section of the peripheral region of the wafer 1 corresponding to FIG. 4, and shows the state when the upper base film 6 shown by the broken line on the lower base film 5 is removed by etching. Of course, during this etching, it is necessary to immerse the wafer 1 in an electrolytic etching solution, and a battery is formed at the periphery between the aluminum of the wiring film 3 and the copper of the upper base film 6, for example, via the etching solution. Due to this battery action, the aluminum is eroded considerably as shown in the figure, and side etching SE tends to occur.

This side etching SE is performed on the upper base film 6.
This is likely to occur in the aluminum of the wiring film 3, which has a particularly large difference in ionization tendency from that of copper, etc., and has little effect on the titanium, etc. of the lower base film 5. Furthermore, even within the peripheral region of the wafer 1, if there is a portion where the wiring film 3 is in direct contact with the very thin lower base film 5 without the protective film 4 as shown in the figure, side etching SE of the aluminum there may occur. It happens especially violently.

When side etching SE occurs on the aluminum of the wiring film 3 during the etching process for patterning the upper base film 6, the lower base film 5 above it is damaged.
Furthermore, since the upper base film 6 is easily peeled off during subsequent steps and adheres to unexpected places on the wafer surface, defects are likely to occur due to contamination during photoprocessing, etc. For example, the photoresist film shown in FIG. If the surface of the upper base film 6 becomes contaminated during the photo process for the bump electrode 7, the bump electrode metal 8 will not grow normally due to electrolytic plating, resulting in a defective bump electrode.

An object of the present invention is to solve these problems and form a base film for growing metal for bump electrodes of integrated circuit devices by electrolytic plating without causing side etching of the wiring film. There is a particular thing.

[0013]

[Means for Solving the Problems] According to the present invention, this object is achieved by connecting the wiring films of the integrated circuits within the windows opened in the protective film covering the surface of the wafer for integrated circuit devices as described above. When forming a composite metal base film interposed between the wiring film and the bump electrode metal in order to grow the bump electrode metal by electrolytic plating, the periphery of the wafer excluding the chip area for the integrated circuit device is Within each window, a lower base film for the plating electrode that makes conductive contact with the wiring film is covered with a protective film so that the end face of the wiring film is not exposed, and an upper base film for connecting this to the metal for the bump electrode. This is achieved by depositing a base film on the entire surface of the wafer, and removing the upper base film by etching, leaving the upper part of the window of the protective film in the chip area.

[0014] It is advantageous to use titanium or chromium as the metal for the lower base film in the composite structure base film, and to use copper or palladium as the metal for the upper base film.

[0015] Further, the removal of the upper base film referred to in the above structure may be performed by a wet etching method using an etching solution. Furthermore, in the scribe zone set at the boundary between the chip area and the peripheral area in the wafer, it is preferable to apply the lower base film with the protective film removed. The lower base film is always covered with a protective film so that the end face of the wiring film is not exposed.

[0016]

[Function] In the chip area for integrated circuit devices within a wafer, all aluminum wiring films are covered with a protective film or an insulating film not only on the top surface but also on the end faces.However, in the peripheral area of the wafer, conventionally There are some areas where even a small amount of aluminum is exposed, and when patterning the upper base film, the etching solution comes into contact with the exposed end face of the aluminum, which tends to cause side etching.

Focusing on this point, the present invention eliminates the exposed end surface of the aluminum of the wiring film by covering it with a protective film so that the end surface of the wiring film is not exposed in the peripheral area of the wafer, as described in the configuration in the previous section. By depositing the base film in this condition, it is possible to prevent the etching solution from coming into contact with the aluminum end face of the wiring film during patterning of the upper base film, and therefore prevent side etching of the aluminum from occurring. .

[0018]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a partially enlarged cross-sectional view of a wafer illustrating the method for forming a base film for bump electrodes of an integrated circuit device according to the present invention in each main step, and FIG. 2 is a wafer during electrolytic plating showing different aspects thereof. FIG. 3 is a cross-sectional view of a main part of FIG.

FIG. 1 shows a wafer 1 as shown in FIG.
This is a cross-sectional view of a portion including the peripheral area PZ and the adjacent chip area CZ. Of course, an integrated circuit is built into the chip area CZ, but the figure shows the edge where the bump electrode is to be provided. Only parts are shown. It is assumed that by scribing this wafer 1 at the scribe line SL, the chip region CZ is isolated into each flip chip.

In the process shown in FIG. 1(a), an aluminum wiring film 3 disposed on an insulating film 2 made of a silicon oxide film or a phosphorous silicate glass film attached to the surface of a semiconductor region of a wafer 1 is formed as shown in the figure. It is patterned like this. Chip area C
The wiring film 3 in Z is of course the end of the aluminum connected to the integrated circuit, and a bump electrode 10 as shown in FIG. 3 is provided thereon. The wiring film 3 in the peripheral area PZ is formed in a pattern that does not reach the peripheral edge 1a of the wafer 1, as shown in the figure, unlike the conventional wiring film.

In the process shown in FIG. 1(b), a protective film 4 made of silicon nitride or the like is deposited on the entire surface of the wafer 1 to a thickness of 0.5 to 1 μm by plasma CVD or the like, and then photoetched to form the protective film 4 shown in the figure. Form into a pattern. At this time, windows 4a for bump electrodes are formed on the wiring film 3 in the chip area CZ.
is opened, and the protective film 4 near the aforementioned scribe line SL at the boundary between the chip region CZ and the peripheral region PZ is also removed, thereby setting a so-called scribe zone SZ. The protective film 4 in the peripheral area PZ is attached to the wafer 1 as shown in the figure.
Although it is often not deposited near the peripheral edge 1a of the wiring film 3,
As described above, since it is patterned at a position recessed from the peripheral edge 1a, its end face is always covered with the protective film 4. Note that it is desirable that the protective film 4 be patterned so as to also cover the end face of the insulating film 2 as shown in the figure.

In the process shown in FIG. 1(c), a lower base film 5 of, for example, titanium with a thickness of about 0.2 μm and an upper base film 6 of, for example, copper with a film thickness of about 0.6 μm are formed on the wafer 1. It is sequentially deposited on the entire surface by sputtering or the like. Of course, at this time, the lower base film 5 is connected to the aluminum of the wiring film 3 within each window 4a of the protective film 4.

In the step shown in FIG. 1(d), the upper base film 6 is photo-etched to remove the protective film 4 in the chip region CZ.
This is patterned on the upper side of the window 4a in substantially the same shape as the bump electrode. At this time, if the upper base film 6 is copper, wet etching is carried out using a mixed aqueous solution of ammonium chloride and ammonium persulfate, for example, using a photoresist film as a mask as usual. During this etching, the wafer 1 is of course immersed in the etching solution, but since the aluminum of the wiring film 3 is completely covered by the protective film 3 and the lower base film 5, side etching cannot occur as in the conventional case. do not have.

After the step shown in FIG. 1(d), the steps shown in FIG.
Using the photoresist film 7 as a plating mask, the metal 8, such as solder, for the bump electrode 10 is grown on the upper base film 6 by electrolytic plating in the same manner as described above. As mentioned above, the lower base film 5 is used as a plating electrode during this electrolytic plating, and the connector 9 shown briefly in FIG. The earth's membrane 5 is contacted.

FIG. 2 shows an advantageous embodiment for connecting the lower base film 5 to the plating power source via the connector 9. In the example shown in FIG. 2, a window is opened in the protective film 4 on the wiring film 3 in the peripheral area PZ in the process shown in FIG. Make conductive contact. By pressing the connector 9 through the photoresist film 7 and the lower base film 5 until the tip thereof bites into the wiring film 3, the connection resistance with the lower base film 5 can be reduced. Note that if the upper base film 6 is also partially left on the lower base film 5 of this connection part, the connection between the connector 9 and the lower base film 5 can be made even more complete. can.

The present invention is not limited to the embodiments described above, and the present invention can be implemented in various embodiments. For example, in the embodiment, the wiring film 3 is covered with the protective film 4 in the peripheral region PZ, but side etching of the wiring film 3 can also be prevented by covering it with another insulating film instead of the protective film 4. other than this,
The descriptions in the examples are merely illustrative, and the present invention can be implemented in various ways within the scope of the invention as necessary.

[0027]

[Effects of the Invention] As described above, in the present invention, the peripheral area of the wafer excluding the chip area for the integrated circuit device is covered with a protective film so that the end face of the wiring film is not exposed.
A lower base film for the plating electrode that makes conductive contact with the wiring film within each window and an upper base film that connects this to the metal for the bump electrode are deposited on the entire surface of the wafer, and the upper base film is applied to the protective film in the chip area. By removing the upper portion of each window by etching, it is possible to eliminate the risk that the etching solution will come into contact with the end surface of the wiring film during patterning of the upper base film and the aluminum will be side-etched due to the battery effect.

By implementing the present invention, peeled pieces of the underlying film fall off from the peripheral area of the wafer due to side etching of the wiring film as in the conventional method, and become a source of contamination during the photoprocessing process, resulting in defects as described above. Problems such as the occurrence of bump electrodes are almost eliminated, and the manufacturing yield of flip chips is improved. Note that, in carrying out the present invention, no inconvenience such as an increase in the number of steps occurs.

[Brief explanation of the drawing]

FIG. 1 is a partially enlarged cross-sectional view of a wafer for an integrated circuit device showing an example of the method for forming a base film for bump electrodes according to the present invention in each main step in FIGS. .

FIG. 2 is an enlarged sectional view of a main part of a wafer showing a different embodiment of the method of the present invention.

FIG. 3 is an enlarged sectional view of a main part of a wafer showing a state during electrolytic plating of metal for bump electrodes in connection with the present invention.

FIG. 4 is a cross-sectional view showing a state during electrolytic plating in the peripheral region of a wafer in a conventional method.

FIG. 5 is a cross-sectional view showing a state of side etching of a wiring film at the periphery of a wafer, showing a problem with the conventional method.

[Explanation of symbols]

1 Wafer for integrated circuit devices 3 Wiring film 4 Protective film 5 Lower base film 6 Upper base film 8 Metal for bump electrodes 10 Bump electrode CZ Wafer chip area PZ Wafer peripheral area SZ Scribe Zone

Claims (3)

[Claims] [Claim 1] Wiring film and bump electrodes for growing the metal of the bump electrodes, which are respectively connected to the wiring film of the integrated circuit, by electrolytic plating within a window opened in a protective film covering the surface of a wafer for an integrated circuit device. A method of forming a metal underlayer film with a composite structure interposed between the wiring layer and the wiring layer, in which the end face of the wiring layer is prevented from being exposed by a protective film in the peripheral area of the wafer excluding the chip area for the integrated circuit device. Covering the wafer, a lower base film for the plating electrode that makes conductive contact with the wiring film within each window and an upper base film that connects this to the metal for the bump electrode are coated on the entire surface of the wafer, and the upper base film is A method for forming a base film for bump electrodes of an integrated circuit device, characterized in that the upper portion of each window of a protective film in a chip area is removed by etching. 2. A method for forming a base film for bump electrodes of an integrated circuit device according to claim 1, wherein the upper base film is removed by a wet etching method using an etching solution. 3. The method according to claim 1, wherein the lower base film is deposited with the protective film removed within the scribe zone set at the boundary between the chip area and the peripheral area. A method for forming a base film for bump electrodes of an integrated circuit device.