JPH0345934B2 - - Google Patents

Info

Publication number
JPH0345934B2
JPH0345934B2 JP58250938A JP25093883A JPH0345934B2 JP H0345934 B2 JPH0345934 B2 JP H0345934B2 JP 58250938 A JP58250938 A JP 58250938A JP 25093883 A JP25093883 A JP 25093883A JP H0345934 B2 JPH0345934 B2 JP H0345934B2
Authority
JP
Japan
Prior art keywords
phase
clock
output
flip
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58250938A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60142622A (ja
Inventor
Nobuo Kamanaka
Kotaro Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Original Assignee
Matsushita Graphic Communication Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP58250938A priority Critical patent/JPS60142622A/ja
Publication of JPS60142622A publication Critical patent/JPS60142622A/ja
Publication of JPH0345934B2 publication Critical patent/JPH0345934B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP58250938A 1983-12-28 1983-12-28 デイジタルpll回路 Granted JPS60142622A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58250938A JPS60142622A (ja) 1983-12-28 1983-12-28 デイジタルpll回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58250938A JPS60142622A (ja) 1983-12-28 1983-12-28 デイジタルpll回路

Publications (2)

Publication Number Publication Date
JPS60142622A JPS60142622A (ja) 1985-07-27
JPH0345934B2 true JPH0345934B2 (enrdf_load_html_response) 1991-07-12

Family

ID=17215242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58250938A Granted JPS60142622A (ja) 1983-12-28 1983-12-28 デイジタルpll回路

Country Status (1)

Country Link
JP (1) JPS60142622A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0799446A (ja) * 1993-03-02 1995-04-11 Mitsubishi Electric Corp Pll回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5431260A (en) * 1977-08-15 1979-03-08 Nec Corp Digital control phase synchronizing device
JPS5469372A (en) * 1977-11-15 1979-06-04 Nec Corp Phase synchronizing circuit

Also Published As

Publication number Publication date
JPS60142622A (ja) 1985-07-27

Similar Documents

Publication Publication Date Title
JP3169794B2 (ja) 遅延クロック生成回路
US5490182A (en) Phase-locked loop circuit having ring oscillator
JPH0744448B2 (ja) デジタル位相同期ル−プ回路
US4741004A (en) High-speed programmable divide-by-N counter
US7088158B2 (en) Digital multi-phase clock generator
US4468797A (en) Swallow counters
US6756832B2 (en) Digitally-programmable delay line for multi-phase clock generator
JPH0292021A (ja) ディジタルpll回路
US5214682A (en) High resolution digitally controlled oscillator
JPH07101847B2 (ja) デジタルフェイズロックドループ装置
US6147532A (en) PLL circuit capable of preventing malfunction of FF circuits connected thereto and semiconductor integrated circuit including the PLL circuit
JPS5957530A (ja) 位相同期回路
JPH0345934B2 (enrdf_load_html_response)
JP2637738B2 (ja) クロック補正方式
US5448192A (en) Data processing circuit including a plurality of serially clocked sub-circuits
JPH0345935B2 (enrdf_load_html_response)
RU2259630C1 (ru) Устройство фазовой автоподстройки генератора импульсов
JP2891814B2 (ja) ディジタルpll回路
EP0546618A1 (en) Circuit arrangement comprising a plurality of sub-circuits and clock signal regeneration circuits
JPS61208923A (ja) デイジタルpll回路
JPH04196919A (ja) 位相比較器
JPH0473890B2 (enrdf_load_html_response)
JPH0529924A (ja) 9分周回路
JPS63122066A (ja) クロツク同期回路
JPH0320180B2 (enrdf_load_html_response)