JPH034032Y2 - - Google Patents
Info
- Publication number
- JPH034032Y2 JPH034032Y2 JP14406485U JP14406485U JPH034032Y2 JP H034032 Y2 JPH034032 Y2 JP H034032Y2 JP 14406485 U JP14406485 U JP 14406485U JP 14406485 U JP14406485 U JP 14406485U JP H034032 Y2 JPH034032 Y2 JP H034032Y2
- Authority
- JP
- Japan
- Prior art keywords
- carrier tape
- electrical components
- burn
- wiring pattern
- electrical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14406485U JPH034032Y2 (en, 2012) | 1985-09-19 | 1985-09-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14406485U JPH034032Y2 (en, 2012) | 1985-09-19 | 1985-09-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6251745U JPS6251745U (en, 2012) | 1987-03-31 |
JPH034032Y2 true JPH034032Y2 (en, 2012) | 1991-02-01 |
Family
ID=31054328
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14406485U Expired JPH034032Y2 (en, 2012) | 1985-09-19 | 1985-09-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH034032Y2 (en, 2012) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4855672A (en) * | 1987-05-18 | 1989-08-08 | Shreeve Robert W | Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same |
-
1985
- 1985-09-19 JP JP14406485U patent/JPH034032Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6251745U (en, 2012) | 1987-03-31 |
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