JPH0336756A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0336756A
JPH0336756A JP17215189A JP17215189A JPH0336756A JP H0336756 A JPH0336756 A JP H0336756A JP 17215189 A JP17215189 A JP 17215189A JP 17215189 A JP17215189 A JP 17215189A JP H0336756 A JPH0336756 A JP H0336756A
Authority
JP
Japan
Prior art keywords
electrode
casing
electrode terminal
external connection
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17215189A
Other languages
Japanese (ja)
Inventor
Moichi Yoshida
吉田 茂一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17215189A priority Critical patent/JPH0336756A/en
Publication of JPH0336756A publication Critical patent/JPH0336756A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent an electrode terminal from being deformed upon screwing an electrode to be connected to the electrode terminal, and hence secure the screwing by providing a fixed piece facing to the inside of an outer casing and fixed by sealing resin, to the tip end of an external connection electrode. CONSTITUTION:Fixed pieces 11, 12, 13 are integrally formed and protruded on the tip ends of external connection parts 5a, 6a, 7a in electrode terminals 5, 6, 7, and folded by 90 deg. inwardly of a casing 3. First, the electrode terminals 5, 6, 7 are connected onto an insulating circuit board 1 joined with a substrate 2, and then the casing 3 is bonded onto the substrate 2. Further, the external connection parts 5a, 6a, 7a of the respective electrode terminals 5, 6, 7 are folded by 90 deg. at the electrode terminal support part 3b of the casing 3, the the respective fixed pieces 11, 12, 13 are folded by 90 deg. inwardly of the casing 3. After the folding of the electrode terminals 5, 6, 7 has been completed, a chip coating material 8 and a resin molding material 9 are injected from an opening 3c in the casing 3 into the casing in order, and the resin molding material 9 is heated and cured to complete the assembling of the semiconductor device.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はパワーモジュール等の半導体装置に関し、特に
パッケージの電極端子構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device such as a power module, and particularly to an electrode terminal structure of a package.

〔従来の技術〕[Conventional technology]

従来、パワーモジュール等の半導体装置には、外部装置
の端子等がねじ締めによって接続される外部接続用電極
端子を備えたものがある。従来のこの種の半導体装置を
第4図ないし第6図(a)〜(c)によって説明する。
Conventionally, some semiconductor devices such as power modules are equipped with external connection electrode terminals to which terminals of external devices are connected by screwing. A conventional semiconductor device of this type will be explained with reference to FIGS. 4 to 6 (a) to (c).

第4図は従来のこの種の半導体装置を示す正面図、第5
図は第4図中V−V線断面図、第6図(a)〜(c)は
従来の半導体装置における電極端子部分を示す図で、同
図(a>は正面図、同図(b)は(a)図中Vl−VI
線断面図、同図(c)は(a)図中■−■線断面図であ
る。これらの図において、Iは半導体チソプ(図示せず
)を搭載するための絶縁回路基板で、この絶縁回路基板
1上には配線パターンによって所与の電気回路が形成さ
れており、基板2上に半田あるいはろう材等によって接
合されている。この際、電気回路は基板2に対しては絶
縁回路基板1によって電気的に絶縁されることになる。
FIG. 4 is a front view showing a conventional semiconductor device of this type, and FIG.
The figure is a sectional view taken along the line V-V in Figure 4, and Figures 6(a) to 6(c) are views showing the electrode terminal portion of a conventional semiconductor device. ) is (a) Vl-VI in the figure
A cross-sectional view taken along a line ``---'' in the figure (a). In these figures, I is an insulated circuit board on which a semiconductor chip (not shown) is mounted, a given electric circuit is formed on this insulated circuit board 1 by a wiring pattern, and a given electric circuit is formed on the board 2 by a wiring pattern. They are joined by solder or brazing metal. At this time, the electric circuit is electrically insulated from the substrate 2 by the insulated circuit board 1.

3は前記絶縁回路基板1を囲み後述する電極端子を支持
するためのケースで、このケース3はエポキシ樹脂等に
よって一体に形成され、前記基板2の側縁部に全周にわ
たって接着される枠部3aと、この枠部3aの上側に一
体に設けられた電極端子支持部3bとから構成され、前
記枠部3aの上側には後述する樹脂成形材料を注入する
ための開口部3cが形成されている。また、前記電極端
子支持部3bには外部装置(図示せず)の電極端子接続
用ねしが挿入される孔3dが設けられており、この孔3
dの開口部分には前記電極端子接続用ねじが締付けられ
るナンド4が嵌挿されている。5,6.7は外部装置(
図示せず)に接続される電極端子で、この電極端子5,
6.7はそれぞれ基部が前記絶縁回路基板lの配線パタ
ーンに半田、ろう材等によって接続され、その先端に形
成された外部接続部5a、6a7aが、ケース3の電極
端子支持部3bに設けられた取り出し孔3e内を通され
てケース3外に突出されている。また、前記外部接続部
5a、6a、7aは電極端子接続用ねじ挿通孔5b、 
6b、7bが穿設されており、この挿通孔5b、6b、
7bが前記ナツト4上に配置されるように電極端子支持
部3b上で90″折曲げ加工されている。8はシリコン
ゲル等からなるチップコーテイング材、9は樹脂成形材
で、これらによって半導体チップが樹脂封止されている
Reference numeral 3 denotes a case that surrounds the insulated circuit board 1 and supports electrode terminals, which will be described later. This case 3 is integrally formed of epoxy resin or the like, and has a frame portion that is adhered to the side edge of the board 2 over its entire circumference. 3a, and an electrode terminal support portion 3b integrally provided on the upper side of the frame portion 3a, and an opening portion 3c for injecting a resin molding material to be described later is formed on the upper side of the frame portion 3a. There is. Further, the electrode terminal support portion 3b is provided with a hole 3d into which an electrode terminal connection screw of an external device (not shown) is inserted.
A Nand 4 to which the electrode terminal connecting screw is tightened is inserted into the opening d. 5, 6.7 is an external device (
(not shown) is an electrode terminal connected to the electrode terminal 5,
6.7 has its base connected to the wiring pattern of the insulated circuit board l by solder, brazing material, etc., and the external connection parts 5a, 6a7a formed at the tips thereof are provided on the electrode terminal support part 3b of the case 3. It passes through the takeout hole 3e and projects out of the case 3. Further, the external connection parts 5a, 6a, 7a have electrode terminal connection screw insertion holes 5b,
6b, 7b are bored, and these insertion holes 5b, 6b,
7b is bent 90'' on the electrode terminal supporting part 3b so that it is placed on the nut 4. 8 is a chip coating material made of silicone gel, etc., and 9 is a resin molding material, and these are used to form a semiconductor chip. is sealed with resin.

次に、上述したように構成された従来の半導体装置の組
立て手順を説明する。先ず、所与の電気回路が形成され
た絶縁回路基板1上に半導体チップをグイボンドし、半
導体チソブの電極と絶縁回路基板lの配線パターンとを
ワイヤボンドによって接続して回路を形成する。そして
、基板2に半田、ろう材等によって接合された状態の絶
縁回路基板l上に電極端子5.6.7を半田、ろう材等
で接続した後、基板2にケース3を接着する。この際、
各電極端子5,6.7の外部接続部5a、6a、7aは
、第6図(b) 、 (c)中二点鎖線で示すように、
ケース3の取り出し孔3e内を通されてケース3外に突
出される。次いで、チップコーテイング材8および樹脂
成形材9をケース3の開口部3cから順次ケース3内に
注入し、樹脂成形材9を加熱硬化させる。しかる後、前
記電極端子5,6.7の外部接続部5a、6a+7aを
ケース3上で90°折曲げ加工してこの半導体装置の組
立てが終了する。
Next, a procedure for assembling a conventional semiconductor device configured as described above will be explained. First, a semiconductor chip is bonded onto an insulated circuit board 1 on which a given electric circuit is formed, and a circuit is formed by connecting the electrodes of the semiconductor chip and the wiring pattern of the insulated circuit board 1 by wire bonding. Then, after connecting the electrode terminals 5, 6, 7 with solder, brazing material, etc. on the insulated circuit board l which is bonded to the substrate 2 with solder, brazing material, etc., the case 3 is bonded to the substrate 2. On this occasion,
The external connection portions 5a, 6a, 7a of each electrode terminal 5, 6.7 are as shown by the two-dot chain lines in FIGS. 6(b) and 6(c),
It passes through the takeout hole 3e of the case 3 and is projected out of the case 3. Next, the chip coating material 8 and the resin molding material 9 are sequentially injected into the case 3 from the opening 3c of the case 3, and the resin molding material 9 is heated and hardened. Thereafter, the external connection parts 5a, 6a+7a of the electrode terminals 5, 6.7 are bent at 90 degrees on the case 3, and the assembly of this semiconductor device is completed.

このように組立てられた従来の半導体装置をインバータ
等のスイッチング回路部品として電源等に接続する際に
は、外部装置の電極端子たる電源側ブスバー(図示せず
)を、電極端子接続用ねじをナンド4に螺着させて外部
接続部5a、 6a、 7aにねじ締めすることによっ
て行われる。
When connecting a conventional semiconductor device assembled in this way to a power source as a switching circuit component such as an inverter, connect the power supply side bus bar (not shown), which is the electrode terminal of the external device, to the electrode terminal connection screw. 4 and then screwed to the external connection parts 5a, 6a, and 7a.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかるに、上述したように構成された従来の半導体装置
においては、電源側ブスバーを電極端子5.6.7にね
し締めする際に電極端子接続用ねじを強く締めすぎると
、各電極端子5,6.7の外部接続部5a、6a、7a
が捩じられ、これによって変形されたりして位置ずれを
起こすことがある。このため、ねし締めを確実に行なう
ことができないという問題があった。
However, in the conventional semiconductor device configured as described above, if the electrode terminal connection screws are tightened too strongly when screwing the power supply side bus bar to the electrode terminals 5, 6, 7, each electrode terminal 5, 6.7 external connection parts 5a, 6a, 7a
may be twisted and deformed, causing misalignment. For this reason, there was a problem in that screw tightening could not be performed reliably.

〔課題を解決するための手段〕[Means to solve the problem]

本発明に係る半導体装置は、外部接続用電極の先端に、
外囲ケース内に臨み封止樹脂によって固定される固定片
を設けたものである。
In the semiconductor device according to the present invention, at the tip of the external connection electrode,
A fixing piece is provided that faces inside the outer case and is fixed with a sealing resin.

〔作 用〕[For production]

固定片が封止樹脂によって固定されることによって、外
部接続用電極のねじ締め部分が2箇所で支持されること
になる。
By fixing the fixing piece with the sealing resin, the screwed portion of the external connection electrode is supported at two locations.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図ないし第3図によって
詳細に説明する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to FIGS. 1 to 3.

第1図は本発明に係る半導体装置を示す正面図、第2図
は第1図中n−n線断面図、第3図(a)〜(c)は本
発明に係る半導体装置の電極端子部分を示す図で、同図
(a)は正面図、同図(b)は(a)図中m−m線断面
図、同図(c)は(a)図中IV−IV線断面図である
。これらの図において前記第4図ないし第6図で説明し
たものと同一もしくは同等部材については同一符号を付
し、ここにおいて詳細な説明は省略する。第1図ないし
第3図において、lL12.13は各電極端子5,6.
7の先端をケース3に対して固定するための固定片で、
この固定片11,12.13は各電極端子5,6.7に
おける外部接続部5a、6a、7aの先端にそれぞれ一
体に突設されており、ケース3の電極端子支持部3bに
おいてケース3の内側に、換言すれば半導体チップ側に
90″折曲げ成形されている二また、前記固定片11.
12.13の幅寸法は外部接続部5a、6a、?aのそ
れより小さく設定され、かつその長さ寸法はケース3の
電極端子支持部3bで折曲げ加工された際にその先端が
ケース3の開口部3c内に臨む寸法に設定されている。
FIG. 1 is a front view showing a semiconductor device according to the present invention, FIG. 2 is a sectional view taken along line nn in FIG. 1, and FIGS. 3(a) to (c) are electrode terminals of the semiconductor device according to the present invention. The figure (a) is a front view, the figure (b) is a cross-sectional view taken along the line mm in the figure (a), and the figure (c) is a cross-sectional view taken along the line IV-IV in the figure (a). It is. In these figures, the same or equivalent members as those explained in FIGS. 4 to 6 are given the same reference numerals, and detailed explanations will be omitted here. In FIGS. 1 to 3, 1L12.13 indicates each electrode terminal 5, 6.
A fixing piece for fixing the tip of 7 to case 3,
The fixing pieces 11, 12.13 are integrally provided at the tips of the external connection parts 5a, 6a, 7a of each electrode terminal 5, 6.7, respectively, and are provided at the electrode terminal support part 3b of the case 3. The fixing piece 11. is bent 90'' on the inside, in other words, on the semiconductor chip side.
12. The width dimension of 13 is the external connection part 5a, 6a, ? The length is set to be smaller than that of the case 3, and its length is set such that when it is bent by the electrode terminal support portion 3b of the case 3, its tip faces into the opening 3c of the case 3.

このように固定片11.12.13が設けられた電極端
子5,6.7を使用して半導体装置を組立てるには、先
ず、従来と同様にして基板2に接合された状態の絶縁回
路基板l上に電極端子5,6.7を接続し、次いで、こ
の基!2上にケース3を接着する。この際、各電極端子
5,6.7の外部接続部5a、6a、7aおよび固定片
11.12.13は、第3図(b) 、 (c)中に二
点鎖線で示すように、ケース3の取り出し孔3e内を通
されてケース3外に突出される0次に、各電極端子5,
6.7の外部接続部5a、6a、?aをケース3の電極
端子支持部3bで90°折曲げ加工し、引き続いて各固
定片11.12.13をケース3の内側へ向けて90″
折曲げ加工する。この際、各固定片11,12.13の
先端はケース3の開口部3c内に挿入されることになる
。電極端子5,6.7の折曲げ加工が終了された後、チ
ップコーテイング材8および樹脂成形材9をケース3の
開口部3cから順次ケース3内に注入し、樹脂成形材9
を加熱硬化させてこの半導体装置の組立てが終了される
In order to assemble a semiconductor device using the electrode terminals 5, 6.7 provided with the fixing pieces 11, 12, 13 in this way, first, the insulated circuit board is bonded to the substrate 2 in the same manner as before. Connect the electrode terminals 5, 6.7 on this group! Glue case 3 onto 2. At this time, the external connection portions 5a, 6a, 7a of each electrode terminal 5, 6.7 and the fixing pieces 11, 12, 13 are as shown by two-dot chain lines in FIGS. 3(b) and 3(c). Each electrode terminal 5,
6.7 external connection parts 5a, 6a, ? a by 90° with the electrode terminal support part 3b of the case 3, and then each fixing piece 11, 12, 13 is bent 90 degrees toward the inside of the case 3.
Process by bending. At this time, the tips of the fixing pieces 11, 12, and 13 are inserted into the opening 3c of the case 3. After the bending process of the electrode terminals 5, 6.7 is completed, the chip coating material 8 and the resin molding material 9 are sequentially injected into the case 3 from the opening 3c of the case 3.
The semiconductor device is assembled by heating and curing.

したがって、各固定片11.12.13はその先端が樹
脂成形材9内に埋設されることになり、これによってケ
ース3に対して固定されることになるから、電極端子5
.6.7においてはその外部接続部5a+6a。
Therefore, the tip of each fixing piece 11, 12, 13 is buried in the resin molded material 9, and is thereby fixed to the case 3, so that the electrode terminal 5
.. 6.7, its external connection portion 5a+6a.

7aが基部側と先端側との2箇所で支持されることにな
る。
7a is supported at two locations: the base side and the distal end side.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明に係る半導体装置は、外部接
続用電極の先端に、外囲ケース内に臨み封止樹脂によっ
て固定される固定片を設けたため、固定片が封止樹脂に
よって固定されることによって、外部接続用電極のねし
締め部分が2箇所で支持されることになる。したがって
、電極端子に被接続側電極をねじ締めする際に電極端子
が変形されにくくなり、確実にねじ締めすることができ
るから、接続部分の信頼性を高めることができる。
As explained above, in the semiconductor device according to the present invention, the fixing piece facing inside the outer case and being fixed by the sealing resin is provided at the tip of the external connection electrode, so that the fixing piece is fixed by the sealing resin. As a result, the screw-fastened portion of the external connection electrode is supported at two locations. Therefore, when screwing the connected side electrode to the electrode terminal, the electrode terminal is less likely to be deformed, and the screw can be reliably tightened, so that the reliability of the connecting portion can be improved.

また、本発明を実施するにあたっては固定片を電極端子
に一体に設けるだけでよいため、安価に実施することが
できるという効果もある。
Further, in carrying out the present invention, it is sufficient to simply provide the fixing piece integrally with the electrode terminal, so there is also the effect that the present invention can be carried out at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る半導体装置を示す正面図、第2図
は第1図中n−n線断面図、第3図(a)〜(c)は本
発明に係る半導体装置の電極端子部分を示す図で、同図
(a)は正面図、同図(b)は(a)図中m−m線断面
図、同図(c)は(a)図中■−IV線断面図、第4図
は従来の半導体装置を示す正面図、第5図は第1図中n
−n線断面図、第6図(a)〜(c)は従来の半導体装
置における電極端子部分を示す図で、同図(a)は正面
図、同図(b)は(a)図中VI−Vl線断面図、同図
(c)は(a)図中■−■線断面図である。 1・・・・絶縁回路基板、2・・・・基板、3・・・・
ケース、4・・・・ナツト、5,6.7・・・・電極端
子、8・・・・チップコーテイング材、9・・・・樹脂
成形材、11゜12、13・・・・固定片。
FIG. 1 is a front view showing a semiconductor device according to the present invention, FIG. 2 is a sectional view taken along line nn in FIG. 1, and FIGS. 3(a) to (c) are electrode terminals of the semiconductor device according to the present invention. The figure (a) is a front view, the figure (b) is a cross-sectional view taken along line mm in figure (a), and the figure (c) is a cross-sectional view taken along line ■-IV in figure (a). , FIG. 4 is a front view showing a conventional semiconductor device, and FIG. 5 is a front view of a conventional semiconductor device.
6(a) to 6(c) are diagrams showing the electrode terminal portion of a conventional semiconductor device, and FIG. 6(a) is a front view, and FIG. 6(b) is a front view of FIG. A sectional view taken along the line VI-Vl, and FIG. 1... Insulated circuit board, 2... Board, 3...
Case, 4...Nut, 5, 6.7...Electrode terminal, 8...Chip coating material, 9...Resin molding material, 11゜12, 13...Fixing piece .

Claims (1)

【特許請求の範囲】[Claims] 基板に搭載された半導体チップが外囲ケース内に封止樹
脂によって封止され、前記半導体チップに前記外囲ケー
ス内で接続されかつねじ締めによって被接続側電極に接
続される外部接続用電極が前記外囲ケースの表面上に配
設されてなる半導体装置において、前記外部接続用電極
の先端に、外囲ケース内に臨み封止樹脂によって固定さ
れる固定片を設けたことを特徴とする半導体装置。
A semiconductor chip mounted on a substrate is sealed in an outer case with a sealing resin, and an external connection electrode is connected to the semiconductor chip within the outer case and connected to a connected electrode by tightening a screw. A semiconductor device disposed on the surface of the outer case, characterized in that a fixing piece facing inside the outer case and fixed by a sealing resin is provided at the tip of the external connection electrode. Device.
JP17215189A 1989-07-03 1989-07-03 Semiconductor device Pending JPH0336756A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17215189A JPH0336756A (en) 1989-07-03 1989-07-03 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17215189A JPH0336756A (en) 1989-07-03 1989-07-03 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0336756A true JPH0336756A (en) 1991-02-18

Family

ID=15936513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17215189A Pending JPH0336756A (en) 1989-07-03 1989-07-03 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0336756A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012104688A (en) * 2010-11-11 2012-05-31 Mitsubishi Electric Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012104688A (en) * 2010-11-11 2012-05-31 Mitsubishi Electric Corp Semiconductor device
DE102011085313B4 (en) * 2010-11-11 2020-12-24 Mitsubishi Electric Corporation Semiconductor device

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