JPH0336223U - - Google Patents

Info

Publication number
JPH0336223U
JPH0336223U JP9596389U JP9596389U JPH0336223U JP H0336223 U JPH0336223 U JP H0336223U JP 9596389 U JP9596389 U JP 9596389U JP 9596389 U JP9596389 U JP 9596389U JP H0336223 U JPH0336223 U JP H0336223U
Authority
JP
Japan
Prior art keywords
frequency discriminator
output signal
local oscillator
supplied
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9596389U
Other languages
Japanese (ja)
Other versions
JP2507166Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989095963U priority Critical patent/JP2507166Y2/en
Publication of JPH0336223U publication Critical patent/JPH0336223U/ja
Application granted granted Critical
Publication of JP2507166Y2 publication Critical patent/JP2507166Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案の一実施例を示す系統図、第
２図はその動作説明に供する図、第３図は従来の
ＡＦＴ回路の系統図、第４図は周波数弁別器の弁
別出力の特性図である。 １２，２２……端子、１４……混合回路、１６
……局部発振器、１８……中間周波増幅回路、２
０……映像検波回路、２４……周波数弁別器、２
６……加算器、３０……Ａ／Ｄ変換器、３１……
プロセツサ、３２，３３……切換スイツチ。 Fig. 1 is a system diagram showing an embodiment of this invention, Fig. 2 is a diagram for explaining its operation, Fig. 3 is a system diagram of a conventional AFT circuit, and Fig. 4 is the characteristic of the discrimination output of the frequency discriminator. It is a diagram. 12, 22... terminal, 14... mixed circuit, 16
...Local oscillator, 18...Intermediate frequency amplification circuit, 2
0...Video detection circuit, 24...Frequency discriminator, 2
6... Adder, 30... A/D converter, 31...
Processor, 32, 33...switch switch.

Claims (1)

【実用新案登録請求の範囲】 高周波信号および局部発振器からの局部発振信
号が供給される混合回路と、 この混合回路の出力信号が供給される周波数弁
別器と、 この周波数弁別器の出力信号が供給されると共
に上記局部発振器を制御するプロセツサとを備え
、 上記プロセツサは、上記局部発振器からの局部
発振信号を順次変化させると共に、このときの周
波数弁別器の出力信号に微分処理を施し、この微
分処理結果に基づいて上記局部発振器のバイアス
電圧を設定することを特徴とするＡＦＴ回路。[Claims for Utility Model Registration] A mixing circuit to which a high frequency signal and a local oscillation signal from a local oscillator are supplied; a frequency discriminator to which an output signal of this mixing circuit is supplied; and a frequency discriminator to which an output signal of this frequency discriminator is supplied. and a processor that controls the local oscillator, and the processor sequentially changes the local oscillation signal from the local oscillator, performs differentiation processing on the output signal of the frequency discriminator at this time, and performs differentiation processing on the output signal of the frequency discriminator. An AFT circuit characterized in that a bias voltage of the local oscillator is set based on the result.
JP1989095963U 1989-08-16 1989-08-16 AFT circuit Expired - Fee Related JP2507166Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989095963U JP2507166Y2 (en) 1989-08-16 1989-08-16 AFT circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989095963U JP2507166Y2 (en) 1989-08-16 1989-08-16 AFT circuit

Publications (2)

Publication Number Publication Date
JPH0336223U true JPH0336223U (en) 1991-04-09
JP2507166Y2 JP2507166Y2 (en) 1996-08-14

Family

ID=31645194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989095963U Expired - Fee Related JP2507166Y2 (en) 1989-08-16 1989-08-16 AFT circuit

Country Status (1)

Country Link
JP (1) JP2507166Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5417611A (en) * 1977-07-08 1979-02-09 Matsushita Electric Ind Co Ltd Sweep-synchronous receiver
JPS5652495A (en) * 1979-10-05 1981-05-11 Matsushita Electric Works Ltd Operation confirmation device for fire receiver system
JPS639218A (en) * 1986-06-30 1988-01-14 Nec Home Electronics Ltd Channel selection device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5417611A (en) * 1977-07-08 1979-02-09 Matsushita Electric Ind Co Ltd Sweep-synchronous receiver
JPS5652495A (en) * 1979-10-05 1981-05-11 Matsushita Electric Works Ltd Operation confirmation device for fire receiver system
JPS639218A (en) * 1986-06-30 1988-01-14 Nec Home Electronics Ltd Channel selection device

Also Published As

Publication number Publication date
JP2507166Y2 (en) 1996-08-14

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees