JPH0336061Y2 - - Google Patents

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Publication number
JPH0336061Y2
JPH0336061Y2 JP787785U JP787785U JPH0336061Y2 JP H0336061 Y2 JPH0336061 Y2 JP H0336061Y2 JP 787785 U JP787785 U JP 787785U JP 787785 U JP787785 U JP 787785U JP H0336061 Y2 JPH0336061 Y2 JP H0336061Y2
Authority
JP
Japan
Prior art keywords
socket
pin
conductive material
power supply
socket body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP787785U
Other languages
Japanese (ja)
Other versions
JPS61123489U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP787785U priority Critical patent/JPH0336061Y2/ja
Publication of JPS61123489U publication Critical patent/JPS61123489U/ja
Application granted granted Critical
Publication of JPH0336061Y2 publication Critical patent/JPH0336061Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、LSI等の半導体装置の試験等に使用
されるソケツトに関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a socket used for testing semiconductor devices such as LSIs.

〔従来例と考案が解決しようとする問題点〕[Conventional examples and problems that the invention attempts to solve]

LSI等の半導体装置の試験等では試験装置のプ
リント板等にソケツトをあらかじめハンダ付け
し、そのソケツトに試験をしようとする半導体装
置の外部端子を差し込んで行なう。
When testing semiconductor devices such as LSIs, a socket is soldered in advance to the printed circuit board of the test equipment, and the external terminal of the semiconductor device to be tested is inserted into the socket.

その場合、例えばTTLの場合では高電位の第
1の電源、低電位(接地電位)の第2の電源及び
複数の信号を外部端子を介してパツケージ内の半
導体素子に供給しているが、ソケツトを介して実
装する場合、上記の端子の内特に安定しているこ
とが望まれる接地電位の端子にノイズがのり、
LSI本来の特性評価ができなかつたり、又LSI自
身の誤動作の原因にもなるいう問題があつた。
In that case, for example, in the case of TTL, a first power supply with a high potential, a second power supply with a low potential (ground potential), and a plurality of signals are supplied to the semiconductor element in the package via external terminals, but the socket When mounting via
There were problems in that it was not possible to evaluate the original characteristics of the LSI, and it also caused malfunctions of the LSI itself.

これは、ソケツトのピンを介して接地電位が供
給されるため、そのピンの寄生的なインダクタン
ス等が原因であると考えられる。
This is thought to be caused by the parasitic inductance of the pin, since the ground potential is supplied through the pin of the socket.

〔問題点を解決するための手段〕[Means for solving problems]

本考案は上記問題を解決することを目的とし、
その特徴は、導電性材料よりなり、複数のピン挿
入用穴を有するソケツト本体と、導電性材料より
なり半導体装置の信号用及び第一の電源用外部端
子が挿入される受け穴を有し、周囲を絶縁層で被
覆されてなる複数の第1のソケツト用ピンと、導
電性材料よりなり半導体装置の第二の電源用外部
端子が挿入される受け穴を有し該導電性材料を露
出してなる第二電源用の第二ソケツト用ピンとを
有し、該第1のソケツト用ピンが該ソケツト本体
とは絶縁されて、該ピン挿入用穴に挿入され、該
第2のソケツト用ピンが該ソケツト本体とは導通
して該ピン挿入用穴に挿入されてなることを特徴
とする半導体装置用ソケツトにある。
This invention aims to solve the above problems,
The socket body is made of a conductive material and has a plurality of pin insertion holes, and the socket body is made of a conductive material and has a receiving hole into which the signal and first power supply external terminals of the semiconductor device are inserted. It has a plurality of first socket pins whose periphery is covered with an insulating layer, and a socket made of a conductive material into which a second power supply external terminal of the semiconductor device is inserted, and the conductive material is exposed. and a second socket pin for a second power supply, the first socket pin is insulated from the socket body and inserted into the pin insertion hole, and the second socket pin is inserted into the pin insertion hole. A socket for a semiconductor device is characterized in that the socket is electrically connected to the socket body and inserted into the pin insertion hole.

〔実施例〕 第1図は本考案の一実施例を示す要部断面図
で、第2図は同ソケツト本体の斜視図、第3図は
同第1、第2のソケツト用ピンの斜視図である。
[Embodiment] Fig. 1 is a sectional view of a main part showing an embodiment of the present invention, Fig. 2 is a perspective view of the socket body, and Fig. 3 is a perspective view of the first and second socket pins. It is.

本実施例では、ソケツト本体1が、従来は絶縁
性物質であつたのに対し、金属よりなる導電性材
料で形成している。ソケツト本体1には複数のピ
ン挿入用穴2が設けられている。そして、この穴
2に挿入されるソケツト用ピンは、第3図イに示
されるように、金属よりなる導電性材料で形成さ
れその導電性材料は露出された接地電位用の第2
のピン7と、同図ロに示されるように金属より形
成され側面が絶縁層4で被覆されてなる第1のピ
ン5とがある。この第1のピン5はLSIの一般の
信号や高電位(第1の電源)用の外部端子を受け
る受け穴3を有し、第2のピン7は接地電位(第
2の電源)用の外部端子を受ける穴6を有する。
In this embodiment, the socket body 1 is made of a conductive material made of metal, whereas it is conventionally made of an insulating material. The socket body 1 is provided with a plurality of pin insertion holes 2. The socket pin inserted into this hole 2 is made of a conductive material made of metal, as shown in FIG.
There is a pin 7, and a first pin 5, which is made of metal and whose side surface is covered with an insulating layer 4, as shown in FIG. The first pin 5 has a receiving hole 3 for receiving general LSI signals and external terminals for high potential (first power supply), and the second pin 7 has a receiving hole 3 for receiving external terminals for general signals of the LSI and high potential (first power supply). It has a hole 6 for receiving an external terminal.

これら第1、第2のピン5,7が試験される
LSIの外部端子配列に応じて、ソケツト本件1の
穴2に挿入されてソケツトとして、試験装置等の
プリント板に実装される。そしてLSIの外部端子
がソケツトの各ピンの受け穴3,6に差し込まれ
て、試験装置に実装される。
These first and second pins 5, 7 are tested
According to the external terminal arrangement of the LSI, the socket is inserted into the hole 2 of the present case 1 and mounted as a socket on a printed circuit board of a test device or the like. Then, the external terminals of the LSI are inserted into the receiving holes 3 and 6 of each pin of the socket, and the LSI is mounted on the test equipment.

この結果試験されるLSIへの接地電位は、従来
の接地用ピンに加えて、ソケツト本体1の金属の
かたまりにより供給されるのでノイズがのりにく
く、安定する。また各ピンがシールドされている
のでクロス・トーク防止効果もある。
As a result, the ground potential to the LSI to be tested is supplied by the metal mass of the socket body 1 in addition to the conventional grounding pin, making it less susceptible to noise and more stable. Also, since each pin is shielded, crosstalk can be prevented.

ソケツト用のピン5,7はネジみぞ又はくさび
等の形状にすることで、ソケツト本体1の穴2に
固定される。
The pins 5 and 7 for the socket are fixed in the hole 2 of the socket body 1 by having a shape such as a screw groove or a wedge.

またプリント板等の制限によりLSIの接地用外
部端子の配置との別の場所で接地をとりたい場合
や、プリント板上での接地用ピンを増やしたい場
合、ソケツト本体1の未使用の穴に他の接地用ピ
ンをたてることにより容易に実現できる。
In addition, if you want to ground at a different location from the external grounding terminal of the LSI due to restrictions on the printed board, or if you want to increase the number of grounding pins on the printed board, use the unused holes in the socket body 1. This can be easily achieved by setting up another grounding pin.

さらに、第1の電源と接地電位との間に容量を
入れる場合、第1の電源用ピンの近くに追加の接
地用ピンをたててその間に容量を設けたり、ソケ
ツト本体に容量を直付けしたりすることで、電源
ノイズ吸収効果も向上させることができる。
Furthermore, if you want to insert a capacitor between the first power supply and the ground potential, you can install an additional grounding pin near the first power supply pin and provide a capacitor between them, or you can connect the capacitor directly to the socket body. By doing so, the power supply noise absorption effect can also be improved.

〔従来の効果〕[Conventional effect]

以上詳述した様に、本考案によれば、接地電位
を安定に供給きるのである。
As detailed above, according to the present invention, the ground potential can be stably supplied.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す要部断面図
で、第2図は同ソケツト本体の斜視図、第3図は
同第1、第2のソケツト用ピンの斜視図である。 図中、1はソケツト本体、2は穴、3,6は受
け穴、4は絶縁層、5,7は第1、第2のソケツ
ト用ピン、8は半導体装置、9,10は外部端子
である。
FIG. 1 is a sectional view of a main part showing an embodiment of the present invention, FIG. 2 is a perspective view of the socket body, and FIG. 3 is a perspective view of the first and second socket pins. In the figure, 1 is the socket body, 2 is a hole, 3 and 6 are receiving holes, 4 is an insulating layer, 5 and 7 are first and second socket pins, 8 is a semiconductor device, and 9 and 10 are external terminals. be.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 導電性材料よりなり、複数のピン挿入用穴を有
するソケツト本体と、導電性材料よりなり半導体
装置の信号用及び第一の電源用外部端子が挿入さ
れる受け穴を有し、周囲を絶縁層で被覆されてな
る複数の第1のソケツト用ピンと、導電性材料よ
りなり半導体装置の第二の電源用外部端子が挿入
される受け穴を有し該導電性材料を露出してなる
第二電源用の第二のソケツト用ピンとを有し、該
第1のソケツト用ピンが該ソケツト本体とは絶縁
されて該ピン挿入用穴に挿入され、該第2のソケ
ツト用ピンが該ソケツト本体とは導通して該ピン
挿入用穴に挿入されてなることを特徴とする半導
体装置用ソケツト。
The socket body is made of a conductive material and has a plurality of pin insertion holes, and the socket body is made of a conductive material and has a receiving hole into which the signal and first power supply external terminals of the semiconductor device are inserted, and is surrounded by an insulating layer. a second power supply having a plurality of first socket pins covered with a conductive material and a receiving hole into which a second power supply external terminal of a semiconductor device is inserted made of a conductive material and exposing the conductive material; The first socket pin is insulated from the socket body and inserted into the pin insertion hole, and the second socket pin is insulated from the socket body. A socket for a semiconductor device, characterized in that the socket is electrically conductive and inserted into the pin insertion hole.
JP787785U 1985-01-22 1985-01-22 Expired JPH0336061Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP787785U JPH0336061Y2 (en) 1985-01-22 1985-01-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP787785U JPH0336061Y2 (en) 1985-01-22 1985-01-22

Publications (2)

Publication Number Publication Date
JPS61123489U JPS61123489U (en) 1986-08-04
JPH0336061Y2 true JPH0336061Y2 (en) 1991-07-31

Family

ID=30486636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP787785U Expired JPH0336061Y2 (en) 1985-01-22 1985-01-22

Country Status (1)

Country Link
JP (1) JPH0336061Y2 (en)

Also Published As

Publication number Publication date
JPS61123489U (en) 1986-08-04

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