JPH033254B2 - - Google Patents

Info

Publication number
JPH033254B2
JPH033254B2 JP55087394A JP8739480A JPH033254B2 JP H033254 B2 JPH033254 B2 JP H033254B2 JP 55087394 A JP55087394 A JP 55087394A JP 8739480 A JP8739480 A JP 8739480A JP H033254 B2 JPH033254 B2 JP H033254B2
Authority
JP
Japan
Prior art keywords
bits
address
memory
bit
selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55087394A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5713561A (en
Inventor
Seiji Izumi
Shigeru Kaneko
Shiro Hoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8739480A priority Critical patent/JPS5713561A/ja
Publication of JPS5713561A publication Critical patent/JPS5713561A/ja
Publication of JPH033254B2 publication Critical patent/JPH033254B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP8739480A 1980-06-27 1980-06-27 Memory device Granted JPS5713561A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8739480A JPS5713561A (en) 1980-06-27 1980-06-27 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8739480A JPS5713561A (en) 1980-06-27 1980-06-27 Memory device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP30872491A Division JPH0719219B2 (ja) 1991-11-25 1991-11-25 記憶装置

Publications (2)

Publication Number Publication Date
JPS5713561A JPS5713561A (en) 1982-01-23
JPH033254B2 true JPH033254B2 (de) 1991-01-18

Family

ID=13913658

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8739480A Granted JPS5713561A (en) 1980-06-27 1980-06-27 Memory device

Country Status (1)

Country Link
JP (1) JPS5713561A (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4545010A (en) * 1983-03-31 1985-10-01 Honeywell Information Systems Inc. Memory identification apparatus and method
SE458525B (sv) * 1985-05-23 1989-04-10 Pharmacia Ab Foerfarande foer tvaerbindning av en poroes agar- eller agarosgel
JPS61273656A (ja) * 1985-05-30 1986-12-03 Fujitsu Ltd デ−タ転送制御方式
JPS62168248A (ja) * 1986-01-20 1987-07-24 Nec Corp メモリ装置
JP2587415B2 (ja) * 1986-01-22 1997-03-05 テキサス インスツルメンツ インコーポレイテッド メモリバンクの選択が可変なデ−タ処理システム
JPS63186345A (ja) * 1987-01-29 1988-08-01 Toshiba Corp アドレス多重化制御回路
JPH05346886A (ja) * 1991-03-19 1993-12-27 Oki Data Syst:Kk ダイナミックｒａｍのアドレス指定方式
EP1377453B2 (de) 2001-04-09 2009-09-16 Koenig & Bauer Aktiengesellschaft Druckwerk einer druckmaschine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4866745A (de) * 1971-12-16 1973-09-12

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4866745A (de) * 1971-12-16 1973-09-12

Also Published As

Publication number Publication date
JPS5713561A (en) 1982-01-23

Similar Documents

Publication Publication Date Title
US5912854A (en) Data processing system arranged for operating synchronously with a high speed memory
US5386385A (en) Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices
AU640813B2 (en) A data processing system including a memory controller for direct or interleave memory accessing
US5596540A (en) Serial to parallel and parallel to serial architecture for a RAM based FIFO memory
US5394541A (en) Programmable memory timing method and apparatus for programmably generating generic and then type specific memory timing signals
EP0245882A2 (de) Datenprozessoreinrichtung mit einem Steuergerät mit mehrfachen unabhängigen Steuerkanälen für einen dynamischen RAM-Speicher
EP0389203A2 (de) Halbleiterspeichergerät beinhaltend Information, die die Anwesenheit mangelhafter Speicherzellen anzeigt
US6912615B2 (en) Control means for burst access control
US4763302A (en) Alternatively addressed semiconductor memory array
US6128244A (en) Method and apparatus for accessing one of a plurality of memory units within an electronic memory device
EP0307945A2 (de) Speichersteueranordnung für ein Daten verarbeitendes System
US4954994A (en) FIFO memory capable of simultaneously selecting a plurality of word lines
JPS63163937A (ja) メモリ制御装置
US4639894A (en) Data transferring method
JPH033254B2 (de)
EP1026600A2 (de) Verfahren und Vorrichtung zur Schnittstellenbildung mit RAM-Speicher
US5089987A (en) Refresh control circuit
JPH11250660A (ja) メモリデバイスおよび該メモリデバイスのアドレッシング方法
JPH052528A (ja) 記憶装置
US5890194A (en) Method for efficient use of DRAM data and parity areas
JPH0370052A (ja) アドレス変換回路、メモリコントロール装置、情報処理装置、および、記録装置
KR900002496Y1 (ko) 메모리 영역 확장 회로
JPS59156097A (ja) 時分割スイツチの出力制御方式
JPS6054055A (ja) 記憶装置
JPH05134926A (ja) メモリ・バンクの切替回路