JPH0332212B2 - - Google Patents
Info
- Publication number
- JPH0332212B2 JPH0332212B2 JP56159812A JP15981281A JPH0332212B2 JP H0332212 B2 JPH0332212 B2 JP H0332212B2 JP 56159812 A JP56159812 A JP 56159812A JP 15981281 A JP15981281 A JP 15981281A JP H0332212 B2 JPH0332212 B2 JP H0332212B2
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- disk
- wax
- mirror
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 7
- 235000012431 wafers Nutrition 0.000 description 51
- 238000003672 processing method Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
本発明はウエハの加工方法に関する。
半導体ウエハは反り及び変形があると製造され
る半導体素子に悪影響を及ぼすため、非常に平坦
であることが要求され、鏡面加工又はラツピング
加工が行なわれる。
ところで、従来、ウエハの片面に鏡面加工又は
ラツピング加工を行なう場合、第1図aに示す如
く、平坦な円盤1にパラフイン等を主成分とする
ワツクス2を塗布し、その上にウエハ3を載置
し、ウエハ押え棒4でウエハ3を押えて円盤1に
貼り付けた後、鏡面加工又はラツピング加工が行
なわれている。
しかしながら、上記従来方法においては、ウエ
ハ3に反り及び変形がある場合、ウエハ押え棒4
ではウエハ3を平坦に矯正することができないた
め、第1図bに示す如く、平坦な円盤1上にワツ
クス2を介して貼り付けられたウエハ3はその加
工面が円盤1上面に対して平行にならない。こう
した状態では例えばウエハを鏡面加工すると、第
1図cに示す如く加工後のウエハ3′表面のみが
円盤1上面に対して平行になるため、ウエハ3′
内の厚さにバラツキを生じるという欠点があつ
た。
本発明は上記欠点を解消するためになされたも
のであり、ウエハを均一厚さで鏡面加工又はラツ
ピング加工しうるウエハの加工方法を提供しよう
とするものである。
すなわち、本発明は平坦な円盤にワツクスを使
用してウエハを貼り付け、片面を鏡面加工又はラ
ツピング加工する方法において、ウエハの加工面
を真空チヤツクによりチヤツキングし、ウエハを
回転させながら、円盤上面に塗布されたワツクス
上で該円盤に対して平行に移動させて貼り付ける
ことを特徴とするものである。
本発明において、真空チヤツクによりチヤツキ
ングしたウエハを回転させながら、円盤上面に塗
布されたワツクス上で該円盤に対して平行に移動
させるのは、ウエハと円盤間のワツクスを薄く均
一に延ばし、かつウエハとワツクス間の気泡を除
去することにより、ウエハの密着性をよくするた
めである。上記の平行移動は円運動あるいは直線
運動等によつて行なわれるが、ウエハの密着性を
よくするためには円運動が望ましい。この際、ウ
エハの移動距離が10mm未満であるとワツクスの延
び及び気泡の除去効果が少ないため、ウエハの移
動距離は10mm以上必要である。
以下、本発明の一実施例を第2図a〜eを参照
して説明する。
実施例
まず、反りがJISH0611の規格で15及び30で4
インチ径、厚さ約650μmのウエハ11(第2図
a図示)を、ウエハ11より小径の真空チヤツク
12によりチヤツキングし、ウエハ11を平坦に
矯正した(第2図b図示)。次に上面にワツクス
13を塗布した円盤14上面に真空チヤツク12
よりチヤツキングされたウエハ11を、円盤14
上面に対して平行になるように押しつけた。つづ
いて、真空チヤツク12上に連結した偏心軸15
によりウエハ11を回転させ、かつ円盤14に対
して平行に円運動で約20mm移動させた(第2図c
図示)。上記の操作により、ウエハ11と円盤1
4間のワツクス13が薄く均一に延ばされ、かつ
ウエハ11とワツクス13間の気泡が除去される
ため、ウエハ11の密着性がよくなる。このた
め、真空チヤツク12を取り除いても、ウエハ1
1は円盤14上面に平行に保たれたまま貼り付け
られた(第2図d図示)。つづいて、貼り付けら
れたウエハの表面に常法に従つて鏡面加工を行な
い、集積回路用半導体ウエハ11′を得た(第2
図e図示)。
鏡面加工後、得られたウエハ100枚について貼
付精度及び加工精度を測定したところ下記表のよ
うになつた。なお、表中の比較例は従来のウエハ
押え棒による方法で円盤に貼り付けて鏡面加工を
行なつたウエハ100枚について貼付精度及び加工
精度を測定したものである。
ここで、貼付精度はウエハを円盤に貼り付けた
際の第3図に示すウエハ外周から5mmの4個所で
のウエハと円盤間のワツクス厚を電気マイクロメ
ータで測定したもので、下記表中ワツクス厚の最
大値と最小値の差の平均値及びその標準偏差
σxを示している。
また加工精度は鏡面加工後のウエハ厚を
JISH0611の規格に従い測定したもので、下記表
中ウエハ厚の最大値と最小値との差の平均値及
びその標準偏差σyを示している。
The present invention relates to a wafer processing method. Semiconductor wafers are required to be extremely flat because warping and deformation have a negative effect on the semiconductor devices manufactured, and are subjected to mirror finishing or wrapping. By the way, conventionally, when mirror polishing or wrapping is performed on one side of a wafer, as shown in FIG. After the wafer 3 is placed on the disk 1 and held down by the wafer presser rod 4 and pasted onto the disk 1, a mirror finishing or wrapping process is performed. However, in the above conventional method, if the wafer 3 is warped or deformed, the wafer presser rod 4
Since the wafer 3 cannot be straightened flat, the processed surface of the wafer 3 attached to the flat disk 1 via the wax 2 is parallel to the top surface of the disk 1, as shown in FIG. 1b. do not become. In such a state, for example, when mirror-finishing a wafer, only the surface of the wafer 3' after processing becomes parallel to the upper surface of the disk 1, as shown in FIG.
The disadvantage was that the inner thickness varied. The present invention has been made in order to eliminate the above-mentioned drawbacks, and it is an object of the present invention to provide a wafer processing method that can mirror-finish or wrap a wafer to a uniform thickness. That is, the present invention is a method in which a wafer is attached to a flat disk using wax, and one side is subjected to mirror polishing or wrapping. It is characterized in that it is pasted by moving it parallel to the disk on the applied wax. In the present invention, the wafer chucked by a vacuum chuck is rotated and moved parallel to the disk over the wax coated on the upper surface of the disk. This is to improve the adhesion of the wafer by removing air bubbles between the wax and the wax. The above-mentioned parallel movement is performed by circular movement or linear movement, but circular movement is preferable in order to improve the adhesion of the wafer. At this time, if the wafer movement distance is less than 10 mm, the effect of wax elongation and bubble removal will be low, so the wafer movement distance must be 10 mm or more. Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 2a to 2e. Example First, the warpage is 15 and 30 according to JISH0611 standard.
A wafer 11 (shown in FIG. 2a) having a diameter of 1 inch and a thickness of about 650 μm was chucked by a vacuum chuck 12 having a diameter smaller than that of the wafer 11 to flatten the wafer 11 (shown in FIG. 2b). Next, a vacuum chuck 12 is applied to the top surface of the disk 14 whose top surface is coated with wax 13.
The more chucked wafer 11 is transferred to the disk 14.
It was pressed parallel to the top surface. Next, the eccentric shaft 15 connected on the vacuum chuck 12
The wafer 11 was rotated and moved approximately 20 mm in a circular motion parallel to the disk 14 (Fig. 2c).
(Illustrated). By the above operation, wafer 11 and disk 1
Since the wax 13 between the wafers 11 and 4 is spread thinly and uniformly, and air bubbles between the wafer 11 and the wax 13 are removed, the adhesion of the wafer 11 is improved. Therefore, even if the vacuum chuck 12 is removed, the wafer 1
1 was attached to the upper surface of the disk 14 while being kept parallel to it (as shown in FIG. 2d). Next, mirror finishing was performed on the surface of the pasted wafer according to a conventional method to obtain a semiconductor wafer 11' for integrated circuits (second
(illustrated in Figure e). After mirror polishing, the adhesion accuracy and processing accuracy of the 100 wafers obtained were measured and the results are shown in the table below. In the comparative example in the table, the adhesion accuracy and processing accuracy were measured for 100 wafers that were adhered to a disk and mirror-finished using a conventional method using a wafer presser bar. Here, the attachment accuracy is determined by measuring the wax thickness between the wafer and the disk using an electric micrometer at four points 5 mm from the wafer's outer circumference as shown in Figure 3 when the wafer is attached to the disk. The average value of the difference between the maximum value and the minimum value of thickness and its standard deviation σx are shown. In addition, processing accuracy depends on the wafer thickness after mirror finishing.
It was measured according to the JISH0611 standard, and the table below shows the average value of the difference between the maximum value and the minimum value of wafer thickness and its standard deviation σy.
【表】
上記表から明らかなように、反りが15及び3
0のウエハのいずれについても、その貼付精度は
平均値、標準偏差ともに実施例の方が比較例より
も小さい値を示している。このことは本発明方法
によつてウエハを円盤に貼り付ける方法がワツク
スが均一に延ばされていることを示し、ひいては
ウエハが平坦であることを示している。この結果
として、反りが15及び30のウエハのいずれに
ついても、その加工精度は平均値、標準偏差とも
に実施例の方が比較例よりも小さい値を示す。す
なわち、本発明方法によつて円盤に貼り付けられ
たウエハに鏡面加工を施すと、厚さが均一でバラ
ツキのないウエハが得られることを示している。
以上詳述した如く本発明によれば、ウエハを均
一厚さで鏡面加工又はラツピング加工でき、ひい
てはこのウエハから品質のバラツキのない半導体
装置を得ることができる等顕著な効果を有する。[Table] As is clear from the table above, the warpage is 15 and 3.
For all of the wafers with 0.0 wafers, both the average value and the standard deviation of the pasting accuracy are smaller in the example than in the comparative example. This shows that the method of attaching the wafer to the disk by the method of the present invention spreads the wax uniformly, and thus shows that the wafer is flat. As a result, for both wafers with warpage of 15 and 30, both the average value and the standard deviation of the processing accuracy in the example are smaller than in the comparative example. That is, it is shown that when a wafer attached to a disk is mirror-finished by the method of the present invention, a wafer with a uniform thickness and no variation can be obtained. As detailed above, according to the present invention, a wafer can be mirror-finished or wrapped to have a uniform thickness, and semiconductor devices with consistent quality can be obtained from this wafer.
第1図a〜cは従来のウエハの加工方法を示す
断面図、第2図a〜eは本発明の実施例における
ウエハの加工方法を示す断面図、第3図はワツク
ス厚の測定個所を示す平面図である。
11……ウエハ、12……真空チヤツク、13
……ワツクス、14……円盤、15……偏心軸。
Figures 1 a to c are cross-sectional views showing a conventional wafer processing method, Figures 2 a to e are cross-sectional views showing a wafer processing method in an embodiment of the present invention, and Figure 3 shows points where wax thickness is measured. FIG. 11...Wafer, 12...Vacuum chuck, 13
...Wax, 14...Disc, 15...Eccentric shaft.
Claims (1)
り付け、片面を鏡面加工又はラツピング加工する
方法において、ウエハの加工面を真空チヤツクに
よりチヤツキングし、ウエハを回転させながら、
円盤上面に塗布されたワツクス上で該円盤に対し
て平行に移動させて貼り付けることを特徴とする
ウエハの加工方法。1. In a method in which a wafer is attached to a flat disk using wax and one side is mirror-finished or wrapped, the processed surface of the wafer is chucked with a vacuum chuck, and while the wafer is rotated,
A method for processing a wafer, characterized in that the wafer is pasted by moving it parallel to the disk on wax applied to the upper surface of the disk.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15981281A JPS5860541A (en) | 1981-10-07 | 1981-10-07 | Processing method for wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15981281A JPS5860541A (en) | 1981-10-07 | 1981-10-07 | Processing method for wafer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5860541A JPS5860541A (en) | 1983-04-11 |
JPH0332212B2 true JPH0332212B2 (en) | 1991-05-10 |
Family
ID=15701785
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15981281A Granted JPS5860541A (en) | 1981-10-07 | 1981-10-07 | Processing method for wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5860541A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2534210B2 (en) * | 1989-04-03 | 1996-09-11 | 三菱電機株式会社 | Wafer stripping device |
JP2011025338A (en) * | 2009-07-23 | 2011-02-10 | Disco Abrasive Syst Ltd | Plate-like object fixing method |
JP2012049448A (en) * | 2010-08-30 | 2012-03-08 | Mitsubishi Chemicals Corp | Method of manufacturing nitride semiconductor substrate |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56164535A (en) * | 1980-05-23 | 1981-12-17 | Toshiba Corp | Manufacture of semicondutor element |
JPS57147241A (en) * | 1981-03-05 | 1982-09-11 | Nec Corp | Bonding method for crystal wafer |
-
1981
- 1981-10-07 JP JP15981281A patent/JPS5860541A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56164535A (en) * | 1980-05-23 | 1981-12-17 | Toshiba Corp | Manufacture of semicondutor element |
JPS57147241A (en) * | 1981-03-05 | 1982-09-11 | Nec Corp | Bonding method for crystal wafer |
Also Published As
Publication number | Publication date |
---|---|
JPS5860541A (en) | 1983-04-11 |
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