JPH0330518A - Phase synchronizing oscillator - Google Patents

Abstract

PURPOSE:To stabilize the control voltage of a voltage controlled oscillator(VCO) by providing the interruption detecting means of an input signal, timing generating means and control voltage holding means, stopping a timing signal when an input is interrupted and applying the output voltage of a low-pass filter to a D/A converter just before the input is interrupted. CONSTITUTION:When an input signal 100 is interrupted, a control circuit 9 stops a control signal 600 by an input interrupting signal 300. Thus, since an A/D converter 7 and a D/A converter B stop operation, the value of a control voltage 500 for a VCO 3 is held at a value just before the input is interrupted. Namely, even when the input signal 100 is interrupted and the value of an output 400 from a low-pass filter 2 is fluctuated, the VCO controlled voltage 500 to be applied to the VCO 3 is fixed and an output frequency is not changed from time just before the input is interrupted. Accordingly, even when the input is interrupted, the accuracy of the output frequency can be maintained samely as a case that the output frequency is synchronized to the input.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a phase synchronized oscillator used in a communication device,
In particular, the present invention relates to a phase-locked oscillator that can maintain the frequency before the failure even after its reference input signal becomes a failure.

[Conventional technology]

62-286319, a phase comparator.

It consists of a low pass filter, voltage controlled oscillator and frequency divider.

An example of a conventional phase-locked oscillator is shown in FIG. 4 and will be described. In FIG. 4, 3 is a magnetic pressure controlled oscillator (hereinafter referred to as "VCOJ") that extracts a frequency according to the control voltage, and 4 is a component that divides the output of the voltage controlled oscillator 3 and outputs it as a phase comparison signal 200. 1 is a phase comparator that compares the phases of the input signal lOO and the phase comparison signal 200 and outputs a voltage corresponding to the phase difference; 2 is a phase comparator that converts the output of the phase comparator 1 into the control voltage of the CO; It is a low pass filter that converts.

If there is an input signal 100, the phase comparator l
00 and the phase comparison signal 200 is detected.

The low-pass filter 2 controls the VCO 3 according to the phase difference.
- Output pressure. Since the output frequency of VCO3 changes according to the control pressure, the input signal 100 and the phase comparison signal 2
The frequencies of 00· match. However, when the input signal 100 is disconnected, the output phase of the phase comparator l is not guaranteed, and the output phase changes from when the input signal 100 was input. As a result, the output 'magnetic pressure of the low-pass filter 2 changes from the voltage '4 before the input signal 100 is cut off with the time constant of the low-pass filter 2, so the excavation frequency of the magnetic pressure controlled oscillator changes when the input signal 100 is cut off. The frequency changes from the previous frequency.

[Problem to be solved by the invention]

In the above conventional technology, no consideration is given to keeping the control voltage of the VCO 3 constant and fixing the oscillation frequency when the input signal 100 is cut off, and when the input signal 100 is cut off, the phase The output voltage of the comparator 1 is fixed at a specific voltage, and the output voltage of the low-pass filter 2 changes from the voltage before the human input signal 100 is disconnected.
There was a problem that the frequency was different from the frequency before the disconnection.

SUMMARY OF THE INVENTION An object of the present invention is to provide a phase-locked oscillator that can maintain the same frequency accuracy as when synchronized to the input even when the input signal to the phase-locked oscillator is disconnected.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides a conventional phase synchronized oscillator with means for detecting disconnection of an input signal, timing generation means for generating a timing signal at a certain period, and An analog/digital converter (hereinafter referred to as "A/D converter") that converts the low-pass filter output voltage into a digital value using the timing signal, and an analog/digital converter (hereinafter referred to as "A/D converter") that converts the output of the A/D converter into an analog voltage to control the VCO. A control means consisting of a digital/analog converter (hereinafter referred to as a "D/A converter") that outputs a voltage is provided,
When the input is interrupted, the timing signal is stopped, and the A/D converted value of the low-pass filter output/magnetic pressure just before the input is interrupted is maintained and applied to the D/A) R converter to reduce the vCO to 1.
fflJ #4 This is to keep the pressure constant.

[Effect]

In a phase synchronized oscillator consisting of a phase comparator, a low-pass filter, and an oscillator 1 frequency divider, by adding input signal disconnection detection means, disconnection of the input signal can be detected.

The timing generating means outputs the timing signal at a constant cycle when the input signal is normal, and stops the timing signal when the input signal is disconnected.

In the 1fiII# voltage holding means, an A/D converter and a D/A converter in the control voltage holding means sequentially A/D convert and further D/A convert the low-pass filter output 'tonne pressure according to the timing signal, Supply the oscillator's control pressure to the oscillator.

Therefore, when the input signal is normal, the control@l signal holding means can sequentially supply the control voltage of the oscillator to the cough oscillator in order to make the output frequency of the oscillator match the frequency of the input color power. , a phase-locked oscillator can remain synchronized.

On the other hand, when the input signal is cut off, the timing signal stops, so the A/D converter and D/A converter in the control voltage holding means are activated after the human input signal becomes abnormal. Stop the conversion operation. Therefore, the control voltage immediately before the input cutoff is held and supplied to the oscillator.

As a result, the oscillation frequency of the oscillator is kept constant, so that the accuracy of the oscillation frequency of the oscillator does not change due to disconnection of the input signal.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 is a block diagram of a phase synchronized oscillator which is an embodiment of the present invention. In FIG. 1, l is a phase comparator, 2
3 is a low-pass filter, and 3 is a sleep pressure control generator (VCO), which is equivalent to the existing PLL shown in FIG. 4 is a frequency divider which outputs a phase comparison signal 20 from the output of the VCO.
0 and a timing periodic signal 700 for sampling the output voltage of the low-pass filter 2. Reference numeral 5 denotes an input signal disconnection detector for the input signal 100, which outputs an input disconnection signal sequence. 6 is a control voltage holding circuit, of which 7
An A/D converter 1.8 converts the low-pass filter output into digital data. An A/D converter 1.8 is a D/A converter that converts the low-pass filter output converted into digital data into V, CO control voltage 500. Reference numeral 9 indicates that the A/Di converter 7 and the D/A converter are connected at a cycle shorter than the phase comparison cycle by the timing periodic signal 700 outputted from the frequency divider 4 and the input disconnection signal 300 outputted from the input signal disconnection detector 5. This is a control circuit (timing generation means) that outputs a control signal 600 for controlling the input signal 8, and when the input signal 100 is disconnected, the control signal 600 is output.
The output of A/D converter 7 and D/A converter 8 is stopped.
stop working.

FIG. 2 is a diagram showing the operation of the phase-locked oscillator shown in FIG. 1, and one embodiment will be described below with reference to FIGS. 1 and 2.

When the input signal 100 is normal (section A in FIG. 2), the phase difference between the input signal 100 and the phase comparison signal 200 is passed through the low-pass filter 2, resulting in a low-pass filter output 400.

The A/D converter 7 and the D/A converter 8 perform digital data conversion and analog data conversion of the low-pass filter output 400 using the control signal 600, and output a control voltage 500 for the VCO 3. This vCO control voltage 500 is
Since the period of the control signal 600 is sufficiently shorter than the phase comparison period of the phase comparator 2, it can be approximated to the low-pass filter output 400. That is, characteristics equivalent to those of the conventional phase-locked oscillator shown in FIG. 4 can be maintained.

When the input signal 100 is disconnected [section B in FIG. 2], the control circuit 9 stops the control signal 600 due to the input disconnection signal 300. Therefore, the A/D converter 7 and the D/A converter 8 stop operating, so the value of the VCO control voltage 500 is held at the value immediately before the input was cut off. In other words, even if the input signal lOO is disconnected and the value of the low-pass filter output 400 changes, the vCO control voltage 500 applied to the VCO3 remains constant.
Since the output frequency does not change from immediately before the input is interrupted, the output frequency accuracy can be maintained the same as when synchronized with the input even in the event of an input interruption.

FIG. 3 is a diagram showing the operation of an embodiment of the phase synchronized oscillator shown in claim 2 of the present patent. The configuration of the phase-locked oscillator is the same as that shown in FIG. 1, and is designed to output the control signal 600 at a timing that corresponds to the average value of the low-pass filter 400.

When the input signal 100 is normal (section A in Figure 3), the average value of the output 400 of the low-pass filter 2 is set to V as in Figure 2.
Since the output signal can be added to CO3, the output signal can remain synchronized with the input signal 100.

Even when the input signal 100 is disconnected (section B in Figure 3), the control signal 600 is stopped as in Figure 2, so the control voltage 500 of the VCO 3 is held at the value immediately before the input was disconnected, so the input is disconnected and low-pass Even if the value of the filter output 400 changes, the output frequency does not change from the value immediately before the input is cut off. in this case,
Since the voltage applied to VCO3 is the average value of the low-pass filter output 400 immediately before the cutoff, the control voltage of VCO3 is maintained at a voltage that generates the same frequency as the input signal 100, regardless of the timing of the input cutoff. Even if the input is cut off, the frequency accuracy immediately before the cutoff can be maintained at a high level of accuracy.

As described above, according to this embodiment, a conventional phase-locked oscillator can achieve a high f# degree output frequency without being affected by the presence or absence of an input signal by adding only a small amount of circuitry. The effect is that it can be provided.

〔Effect of the invention〕

As described above, according to the present invention, even if the input is cut off, the previous control voltage can be applied to the VCO, so a clock with high frequency accuracy can be provided.

[Brief explanation of drawings]

Figure 1 is a block diagram of a phase-locked generator according to an embodiment of the present invention, Figures 2 and 3 are timing diagrams showing details of the operation of the present invention, and Figure 4 is a conventional phase-locked generator. It is a block diagram showing an example. 1... Phase comparator 2... Low pass filter 3... Voltage control generator 4... Frequency divider 5... Input signal disconnection detector 6... Control voltage holding circuit 7...・A
/D converter 8...D/A converter 9...Control circuit 100...Input signal 200...Phase comparison signal 300...Input disconnection signal 400...Low pass filter output 500... vCO control voltage 600...control signal 7
00...timing periodic signal

Claims (1)

[Claims] 1. An oscillator whose oscillation frequency is changed by a control voltage;
A frequency divider that divides the output signal of the oscillator, a phase comparator that compares the phase difference between the output signal of the frequency divider and the input signal, and converts the output signal of the phase comparator into a control voltage for the oscillator. A phase-locked oscillator comprising: a low-pass filter that detects a loss of the input signal; a timing generator that outputs a timing signal at a certain period; control voltage holding means for storing and holding the control voltage at the time when the signal is output is provided, and when the input signal disconnection detection means detects the input signal disconnection, the output of the timing generation means is stopped, and the input signal is stopped. A phase synchronized oscillator characterized in that a control voltage stored and held by the control voltage holding means immediately before detecting a signal disconnection is outputted as a control voltage of the oscillator, thereby suppressing a frequency change after detecting an input signal disconnection. . 2. The phase-locked oscillator according to claim 1, wherein the timing generating means outputs a timing signal at a timing when the output voltage of the low-pass filter becomes a value near the average value of the output voltage. oscillator. 3. The phase synchronized oscillator according to claim 1, wherein the control voltage holding means uses an A/D converter and a D/A converter to store and hold the digital value when the timing signal is generated. phase-locked oscillator.