JPH03296295A - Manufacture of multilayer printed circuit board - Google Patents

Manufacture of multilayer printed circuit board

Info

Publication number
JPH03296295A
JPH03296295A JP9877990A JP9877990A JPH03296295A JP H03296295 A JPH03296295 A JP H03296295A JP 9877990 A JP9877990 A JP 9877990A JP 9877990 A JP9877990 A JP 9877990A JP H03296295 A JPH03296295 A JP H03296295A
Authority
JP
Japan
Prior art keywords
copper
hole
copper oxide
inner layer
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9877990A
Other languages
Japanese (ja)
Inventor
Shuichi Hatakeyama
修一 畠山
Akishi Nakaso
昭士 中祖
Naoyuki Urasaki
直之 浦崎
Akinari Kida
木田 明成
Kazuyasu Minagawa
一泰 皆川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP9877990A priority Critical patent/JPH03296295A/en
Publication of JPH03296295A publication Critical patent/JPH03296295A/en
Pending legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To prevent and suppress generation of negative etchback by covering a conductor circuit in a through hole or a nonthrough hole with etching resist when metal copper and copper oxide or only metal copper is melted to be removed from an insulation organic board. CONSTITUTION:Copper foils are formed as outermost layers, and so laminated together with an inner layer circuit that the forming surface of a copper oxide 1 is brought into contact with a base material 2 of insulating organic material. A through hole or nonthrough hole is formed, and smeared as required. An inner layer conductor 3 in the through or nonthrough hole is covered with insoluble or hard soluble substance to copper etchant. The surface of a board is polished to expose the foil. Metal copper and copper oxide or only the metal copper is removed from the organic base material. As required, the conductor covering substance in the through or nonthrough hole is removed, and wired including electroless plating to form a wiring.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多層プリント配線板の製造法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a multilayer printed wiring board.

〔従来の技術〕[Conventional technology]

近年、電子機器は、小型・軽量化、多機能、低価格化な
どの要求が一段と活発化し、それに伴いプリント配線板
においても低価格化、高密度・高信頼性化の要求が高ま
っている。
In recent years, demands for electronic devices such as smaller size, lighter weight, multi-functionality, and lower prices have become more active, and accordingly, demands for lower prices, higher density, and higher reliability for printed wiring boards have also increased.

このようなニーズに対して、現在プリント配線板の製法
の主流となっているのはザブ1ラクテイブ法であるが、
これは製造工程が複雑で長いためコストダウンが難しい
。また、細線化や小径スルーホール化が困難で、高密度
化への対応には限界があるといわれており、アディティ
ブ法が注目を集めている。
In response to these needs, the current mainstream manufacturing method for printed wiring boards is the Zab1 Ractical method.
The manufacturing process is complex and long, making it difficult to reduce costs. Additionally, it is said that there is a limit to how high density can be achieved because it is difficult to make wires thinner and through holes smaller, so additive methods are attracting attention.

アディティブ法は、絶縁基板に無電解めっきによって導
電性金属を所望の厚さまでめっきし、配線パターンを形
成する方法であり、このようなアディティブ法によるプ
リント配線板の製造においては、絶縁基板と無電解めっ
きによって形成された導電性金属との密着力が、プリン
ト配線板にとっても極めて重要である。
The additive method is a method in which a conductive metal is plated to a desired thickness on an insulating substrate by electroless plating to form a wiring pattern. Adhesion with conductive metal formed by plating is extremely important for printed wiring boards.

プリント配′gA板用有機質基板(絶縁基板)と、めっ
き金属の接着力をイ」与する王な方法は、有機質基板表
面を物理的又は化学的な方法で処理して、その基板表面
を親水化と粗面化する方法である。
The best way to improve adhesion between an organic substrate (insulating substrate) for a printed wiring board and plated metal is to treat the surface of the organic substrate physically or chemically to make it hydrophilic. This is a method to roughen and roughen the surface.

これらの方法の中で実用化されている代表的な方法は、
化学粗化液で処理すると親水化でき、微細な凹凸形状を
もつ粗面が得られる樹脂層を基板表面に設け、化学粗化
液で処理する方法である。
Among these methods, the most commonly used methods are:
In this method, a resin layer that can be made hydrophilic by treatment with a chemical roughening liquid and a rough surface with fine irregularities is provided on the substrate surface, and then treated with a chemical roughening liquid.

しかし、この方法では、接着剤層付基板表面を粗化する
ため粗化液を用いなければならない。
However, in this method, a roughening liquid must be used to roughen the surface of the adhesive layer-coated substrate.

使用できる粗化面のほとんどは酸化剤を含むものであり
、毒性が強い。そのために作業環境が悪いこと、特別な
廃液処理が必要である。
Most of the roughened surfaces available contain oxidizing agents and are highly toxic. This requires a poor working environment and special waste liquid treatment.

又、粗化液に可溶な成分は一般に電気絶縁特性が悪い。Additionally, components soluble in the roughening solution generally have poor electrical insulation properties.

例えば耐湿絶縁特性、高温絶縁特性の劣化がある。また
接着剤層の耐熱性が低く、寸法変化率も高いので、高度
な寸法精度やスルーホール接続信頼性が要求される多層
プリント配線板への適用には限界がある。
For example, there is deterioration in moisture-resistant insulation properties and high-temperature insulation properties. Furthermore, since the adhesive layer has low heat resistance and a high rate of dimensional change, there are limits to its application to multilayer printed wiring boards that require high dimensional accuracy and through-hole connection reliability.

これを改良する方法として、特開昭63−168077
号公報に示されているように、基板表面に接着剤層を設
けず、絶縁基板、それ自体を粗面化する方法がある。こ
の方法は、銅箔を酸化剤含有の処理液と接触させて、銅
箔粗面に酸化銅を形成し、酸化銅が形成された面に絶縁
性有機材料の基材を積層し、基材から銅箔および酸化銅
を除去することによって、絶縁性有機基材を粗面化し、
無電解めっきと良好な接着力を得るものである。
As a method to improve this, Japanese Patent Application Laid-Open No. 63-168077
As shown in the above publication, there is a method of roughening the insulating substrate itself without providing an adhesive layer on the surface of the substrate. In this method, copper foil is brought into contact with a treatment solution containing an oxidizing agent to form copper oxide on the rough surface of the copper foil, and a base material of an insulating organic material is laminated on the surface on which copper oxide has been formed. roughen the insulating organic substrate by removing copper foil and copper oxide from
It provides good adhesion to electroless plating.

現在までのところ、上記のような基板は、フルアデイテ
ィブ法、セミアデイティブ法等の配線形成法により両面
板に適用されている。
Up to now, the above-mentioned substrates have been applied to double-sided boards by wiring forming methods such as full additive methods and semi-additive methods.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

特開昭63−168077号公報に示される方法は、絶
縁基板表面に接着剤層が存在せず、かつ粗面化された基
板と無電解めっきの密着性が良好であるため、パターン
間の電気絶縁特性、高温時の導体密着強度或いは寸法安
定性が向上するものの、現在までのところ、その適用は
両面板に限られ、多層板には用いられていない。
The method disclosed in JP-A-63-168077 does not have an adhesive layer on the surface of the insulating substrate and has good adhesion between the roughened substrate and the electroless plating, so there is no electricity between the patterns. Although it improves insulation properties, conductor adhesion strength at high temperatures, and dimensional stability, to date its application has been limited to double-sided boards and has not been used for multilayer boards.

上記の基板を最外層に有する多層板の製造方法としては
、銅箔を酸化剤含有の処理液と接触させて、銅箔粗面に
酸化114を形成し、酸化処理を行った銅箔を各々最外
層として、酸化銅の形成面と絶縁性有機材料の基材が接
するように内層回路と共に積層し、貫通穴を形成し、絶
縁性有機基材から、金属銅及び酸化を除去し7、無電解
めっきを含む配線加工を斤い、配線を形成する手法がベ
ーシックなものとして挙げられる。
A method for manufacturing a multilayer board having the above-mentioned substrate as the outermost layer involves contacting a copper foil with a treatment solution containing an oxidizing agent to form oxidation 114 on the rough surface of the copper foil. As the outermost layer, the copper oxide formation surface and the insulating organic material base material are laminated together with the inner layer circuit, a through hole is formed, and metallic copper and oxide are removed from the insulating organic base material. A basic method is to form wiring through wiring processing including electrolytic plating.

しかし、この方法の場合、貫通穴の形成直後に酸化処理
銅箔除去の工程を行うため、溶解除去の対象となる外層
の酸化処理銅箔と同時に、穴内に面する内層導体もエツ
チングされ、いわゆるネガティブエソチハソクが発生し
、このネガティフエノヂハソク量が大きいと、熱衝撃に
脆くなる、めっきポイ1〜が発生するなどスルーボール
接続信頼性の低下を招く要因となる。
However, in this method, the step of removing the oxidized copper foil is performed immediately after forming the through hole, so the inner layer conductor facing inside the hole is also etched at the same time as the outer layer of the oxidized copper foil that is to be dissolved and removed. Negative stress occurs, and if the amount of negative stress is large, it becomes a factor that causes a decrease in through-ball connection reliability, such as embrittlement against thermal shock and the occurrence of plating defects.

本発明は、貫通穴または非貫通穴の内層導体のネガティ
ブエソチハソクを防止・抑制し、接続信頼性に優れた多
層プリン1〜配線板の製造法を提供するものである。
The present invention provides a method for manufacturing a multilayer printed circuit board 1 to a wiring board that prevents and suppresses negative leakage of inner layer conductors in through holes or non-through holes and has excellent connection reliability.

〔課題を解決するだめの手段〕[Failure to solve the problem]

本発明は、以下の各工程を順に含む製造工程によって、
導体回路と絶縁層とが交互に積層された構造の多層プリ
ント配線板を製造する方法である。
The present invention has a manufacturing process including the following steps in order:
This is a method for manufacturing a multilayer printed wiring board having a structure in which conductor circuits and insulating layers are alternately laminated.

(a)銅箔を酸化剤含有の処理液と接触、あるいは電気
化学的手法を用いて、銅箔粗面に酸化銅を形成する工程
(a) A step of forming copper oxide on the rough surface of the copper foil by contacting the copper foil with a treatment liquid containing an oxidizing agent or using an electrochemical method.

(b)前記銅箔をそれぞれ最外層として、酸化銅の形成
面と絶縁性有機材料の基材が接するように、内層回路と
共に積層する工程。
(b) A step of laminating the copper foils as the outermost layer together with the inner layer circuit so that the surface on which the copper oxide is formed is in contact with the base material of the insulating organic material.

(c)貫通穴または非貫通穴を形成し、必要に応してス
ミア処理を行う工程。
(c) A step of forming through holes or non-through holes and performing smear treatment if necessary.

(d)前記、貫通穴または非貫通穴内の内層導体をエツ
チングレジストとなる銅エツチング液に不溶または難溶
性物質で被覆する工程。
(d) A step of coating the inner layer conductor in the through hole or the non-through hole with a substance that is insoluble or poorly soluble in a copper etching solution that serves as an etching resist.

(e)基板表面を研磨し、銅箔を露出させる工程。(e) A step of polishing the substrate surface to expose the copper foil.

(f)絶縁性有機基材から金属銅及び酸化銅または金属
銅のみを除去する工程。
(f) A step of removing metallic copper and copper oxide or only metallic copper from the insulating organic substrate.

(g)必要に応じ、貫通穴または非貫通穴内の導体被覆
物質を除去し、無電解めっきを含む配線加工を行い、配
線を形成する工程。
(g) If necessary, the step of removing the conductor coating material in the through hole or non-through hole and performing wiring processing including electroless plating to form wiring.

本発明で用いる銅箔表面に酸化銅を形成する方法には種
々の方法がある。例えば、亜塩素酸ナトリうム、次亜塩
素酸ナトリウム、過硫酸カリウム、塩素酸カリウム、過
塩素酸カリウムなどの酸化剤を含む処理液に銅箔を浸漬
して処理する方法である。この場合、浸漬でなく、処理
液の噴霧でもよい。また、アノード酸化でも酸化銅の形
成は可能である。
There are various methods for forming copper oxide on the surface of the copper foil used in the present invention. For example, the copper foil is treated by immersing it in a treatment solution containing an oxidizing agent such as sodium chlorite, sodium hypochlorite, potassium persulfate, potassium chlorate, or potassium perchlorate. In this case, spraying of the treatment liquid may be used instead of immersion. Copper oxide can also be formed by anodic oxidation.

使用する銅箔としては、他の金属箔や有機質フィルムな
どの支持体の上に銅箔が形成されたものでも良い。支持
体を使用しない場合は、銅箔の厚さに特に制限はないか
、取り扱い上および価格の点から18〜70μmのもの
が良好である。
The copper foil used may be one in which the copper foil is formed on a support such as another metal foil or an organic film. When a support is not used, there is no particular restriction on the thickness of the copper foil, and from the viewpoint of handling and cost, a thickness of 18 to 70 μm is preferable.

また、本発明の方法で作成したプリント配線板とめっき
金属の接着力を高めるためには、銅箔表面を予め粗面化
しておくのが好ましい。その粗面化の方法としては、研
磨、ホーニング、エツチング、電気めっき、無電解銅め
っき等がある。例えば銅箔張り積層板用の銅箔は良好に
使用できる。
Further, in order to increase the adhesive strength between the printed wiring board produced by the method of the present invention and the plated metal, it is preferable to roughen the surface of the copper foil in advance. Methods for roughening the surface include polishing, honing, etching, electroplating, and electroless copper plating. For example, copper foil for copper foil-clad laminates can be used satisfactorily.

酸化銅処理前には、酸化銅が均一に形成されるようにす
るために、銅箔は脱脂洗浄や塩酸水溶液または硫酸水溶
液で処理して使用することが望まし酸化銅を形成した銅
箔と積層する絶縁性有機材料は、エポキシ、変性ポリイ
ミド、ポリイミド、フェノール等一般の銅箔張り積層板
に用いられる熱硬化性樹脂を用いることができる。これ
らは、紙基材やガラス繊維布材に」二記の樹脂を塗布し
たプリプレグが用いられる。
Before copper oxide treatment, in order to ensure that copper oxide is formed uniformly, it is recommended that the copper foil be degreased and treated with an aqueous solution of hydrochloric acid or an aqueous sulfuric acid solution. As the insulating organic material to be laminated, thermosetting resins used in common copper foil-clad laminates, such as epoxy, modified polyimide, polyimide, and phenol, can be used. For these, prepreg is used, which is a paper base material or glass fiber cloth material coated with the resin described in "2".

又、ポリエチレン、テフロン、ポリエーテルザルフォン
、ポリエーテルイミドなどの熱可塑性材料も用いられる
Thermoplastic materials such as polyethylene, Teflon, polyethersulfone, and polyetherimide may also be used.

酸化銅を形成した銅箔と絶縁性有機基材及び内層回路を
積層し、貫通穴または非貫通穴をドリリングによってあ
げた後、必要に応してスミア処理を行う。スミア処理に
は濃硫酸処理、アルカリ過マンガン酸処理、プラズマ処
理等一般の方法を用いることができる。ざらにホーニン
グを行う場合もある。
After laminating the copper foil on which copper oxide has been formed, the insulating organic base material, and the inner layer circuit, and drilling through holes or non-through holes, smear treatment is performed as necessary. For the smear treatment, general methods such as concentrated sulfuric acid treatment, alkaline permanganate treatment, and plasma treatment can be used. Rough honing may also be performed.

穴内内層回路のレジストには、銅エソチンク′?夜に不
溶性または難溶性の以下のものが適用可能である。
Copper ethotinc' for the resist of the inner layer circuit inside the hole? The following which are insoluble or poorly soluble are applicable at night.

(1)耐酸または耐アルカリ性の高分子材料。(1) Acid- or alkali-resistant polymeric material.

(2)無電解あるいは置換めっきによるニッケル、半田
、スズ、金 (3)酸化゛処理による酸化銅 (4)アルキルイミダゾール、ベンゾトリアゾール、ス
テアリン酸の処理による皮膜 耐酸、耐アルカリ性が良好な高分子としては、ポリエチ
レン、ポリスチレン、ポリエステル、メタアクリル樹脂
などがある。これらを可溶な溶媒に溶解し、塗布後、溶
剤分を揮発させればよく、例えば、ポリエチレンの場合
にはトルエンを使うことができる。これらは酸・アルカ
リどちらのエソヂング液にも使用可能である。また、通
常銅スルーホール基板の製造にお4Jる穴埋め法で、ス
ルーホール内の銅をエツチングから保護するのに用いら
れている穴埋めインクもを効である。熱乾燥型・紫外線
硬化型の両タイプとも使用でき、山栄化学株式会社等か
ら販売されている。酸性エノチングン夜のレジストとな
るものが多い力く、アルカリ性で用いることが可能なも
のもある。
(2) Nickel, solder, tin, and gold by electroless or displacement plating (3) Copper oxide by oxidation treatment (4) Films by treatment with alkylimidazole, benzotriazole, and stearic acid As a polymer with good acid and alkali resistance Examples include polyethylene, polystyrene, polyester, and methacrylic resin. These can be dissolved in a soluble solvent, and after coating, the solvent can be evaporated. For example, in the case of polyethylene, toluene can be used. These can be used with both acidic and alkaline etchants. Also effective is the hole-filling ink that is commonly used in the 4J hole-filling method for manufacturing copper through-hole boards to protect the copper in the through-holes from etching. Both heat drying type and ultraviolet curing type can be used, and are sold by Sanei Chemical Co., Ltd., etc. Many of them act as a strong resist against acidic enthesis, and some can be used in alkaline conditions.

ニッケル及び半田は無電解めっきによるものである。−
船釣にはめっき工程に先立ち、めっき触媒の付与が必要
である。めっき触媒としては、塩化第一スズと塩化パラ
ジウムの2液タイプ、パラジウムコロイド等のほか、貴
金属イオンの酸性水溶液も使用可能である。ニッケルめ
っきでほう素糸の還元剤を含有しているものは、銅表面
に触媒活性があり、めっき触媒を付与しなくとも析出可
能である。スズ、金は置換めっきによるものである。こ
れらは酸性工・7チンダ液でも使用は可能であるが、ア
ルカリ性エツチング液での使用が望ましい。これらのめ
っき液は、奥野製薬工業株式会社、日本カニゼン株式会
社等で販売されている。
Nickel and solder are electroless plated. −
For boat fishing, it is necessary to apply a plating catalyst prior to the plating process. As the plating catalyst, in addition to a two-liquid type of stannous chloride and palladium chloride, palladium colloid, etc., an acidic aqueous solution of noble metal ions can also be used. Nickel plating containing a boron thread reducing agent has catalytic activity on the copper surface and can be deposited without the addition of a plating catalyst. Tin and gold are produced by displacement plating. Although it is possible to use these with an acidic etching solution, it is preferable to use an alkaline etching solution. These plating solutions are sold by Okuno Pharmaceutical Co., Ltd., Nippon Kanigen Co., Ltd., etc.

酸化銅は前記の銅箔に酸化銅を形成する場合と同様の酸
化剤含有処理液と接触させることで得られ、アルカリ1
生エソチングン夜のレジストとなる。
Copper oxide can be obtained by contacting the copper foil with an oxidizing agent-containing treatment solution similar to that used for forming copper oxide on copper foil.
It becomes a resist of raw esochingun night.

アルキルイミダゾールは、銅と化合物、アルキルイミダ
ゾール銅を形成し、ベンゾトリアゾール及びステアリン
酸は銅表面に吸着あるいは難溶性膜を作り、アルカリ性
エツチング液のレジストと1 なる。
Alkylimidazole forms a compound with copper, alkylimidazole copper, and benzotriazole and stearic acid are adsorbed on the copper surface or form a poorly soluble film, which serves as a resist for alkaline etching solution.

穴内内層回路にエツチングレジストを形成する際には、
穴あげまたばスミア処理後、必要に応じて形成面の洗浄
を行うことが好ましい。穴内内層回路にエツチングレジ
ストを形成後、金属銅と酸化銅または金属銅のみを除去
するためにエツチング液が用いられる。このエツチング
液は、先のエソチンブレジス(・に対応している必要が
あるが、プリント配線板のエツチング液として一般に使
用されている過硫酸アンモニウム水溶液、塩化鉄と塩酸
の水溶液、塩化銅と塩酸の水溶液、銅アンモニウム、錯
イオンを含むアルカリ性水溶液などが使用できる。
When forming an etching resist on the inner layer circuit inside the hole,
After drilling or smearing, it is preferable to clean the forming surface as necessary. After forming an etching resist on the inner layer circuit in the hole, an etching solution is used to remove metallic copper and copper oxide or only metallic copper. This etching solution must be compatible with the aforementioned etching solution, such as ammonium persulfate aqueous solution, which is commonly used as an etching solution for printed wiring boards, an aqueous solution of iron chloride and hydrochloric acid, an aqueous solution of copper chloride and hydrochloric acid, An alkaline aqueous solution containing copper ammonium and complex ions can be used.

なお、金属銅と酸化銅または金属銅のみを上記エツチン
グ液で溶解除去する際には、被エツチング面を露出させ
るため、研磨等を行う。ザンダヘルトによる研磨、パフ
研磨等が使用できる。
Note that when metallic copper and copper oxide or only metallic copper are dissolved and removed using the etching solution, polishing or the like is performed to expose the surface to be etched. Sanderherd polishing, puff polishing, etc. can be used.

絶縁性有機基材から金属銅と酸化銅または金属銅を除去
後、必要に応して、穴内エソチンブレジスI−の剥離を
行う。ポリエチレン、ポリスチレン、2 ポリエステル、メタアクリル樹脂等は、塗布する際に溶
解した溶剤で剥離する。
After removing metallic copper, copper oxide, or metallic copper from the insulating organic substrate, the in-hole ethosin brace I- is peeled off, if necessary. Polyethylene, polystyrene, 2-polyester, methacrylic resin, etc. are peeled off using a dissolved solvent during application.

例えば、ポリエチレンの場合にはトルエンで行う。穴埋
めインクは、アルカリ性水溶液で、酸化銅やアルキルイ
ミダゾール銅は塩酸水溶液で除去できる。ごれらの剥離
はスプレーや超音波洗浄機で行うことが好ましい。
For example, in the case of polyethylene, toluene is used. Filling ink can be removed with an alkaline aqueous solution, and copper oxide and alkylimidazole copper can be removed with an aqueous hydrochloric acid solution. It is preferable to remove the dirt using a spray or an ultrasonic cleaner.

無電解銅めっきに先立つ触媒処理は、プリント配線板の
触媒処理に使用されている一般の方法が用いられる。触
媒処理の代わりに触媒入り材料を用いることも出来る。
For the catalyst treatment prior to electroless copper plating, a general method used for catalyst treatment of printed wiring boards is used. Instead of catalytic treatment, catalyzed materials can also be used.

無電解めっきは、無電解ニッケルめっき、無電解銅めっ
きなどが用いられる。一般にはプリント配線板の導体に
は無電解銅めっきが用いられる。
As the electroless plating, electroless nickel plating, electroless copper plating, etc. are used. Generally, electroless copper plating is used for the conductors of printed wiring boards.

〔作用〕[Effect]

本発明の多層プリント配線板製造法では、絶縁性有機基
板から金属銅および酸化銅または金属銅のみ溶解除去す
る際、貫通穴または非貫通穴内の導体回路がエツチング
レジストで覆われている。
In the multilayer printed wiring board manufacturing method of the present invention, when metal copper and copper oxide or only metal copper are dissolved and removed from an insulating organic substrate, conductor circuits in through holes or non-through holes are covered with etching resist.

したがって、金属銅および酸化銅または金属銅のみエツ
チングする際、接続信頼性の低丁を招く内層導体がネガ
ティブエソチハソクが防止・抑制され、導体回路にエツ
チングレジストを形成しない場合と比較して、接続信頼
性が向上し、アディティブ法により高信頼性の多層プリ
ン1〜配線板の製造が可能となる。
Therefore, when etching only metallic copper, copper oxide, or metallic copper, negative etching of the inner layer conductor, which causes poor connection reliability, is prevented and suppressed, compared to the case where no etching resist is formed on the conductor circuit. Connection reliability is improved, and it becomes possible to manufacture highly reliable multilayer printed circuit boards 1 to wiring boards by the additive method.

〔実施例〕〔Example〕

日木電解株式会社製の銅箔張り積層板用351Jm銅箔
を用意し、前処理として銅箔をシソプレイ社製の脱脂液
であるニュートラルクリーンに5分間浸漬し、流水洗し
、更に10%硫酸水に2分間浸漬し、流水洗した。この
銅箔に次の条件で酸化銅形成処理を行った。
Prepare 351Jm copper foil for copper foil-clad laminates made by Hiki Denki Co., Ltd. As a pretreatment, soak the copper foil in Neutral Clean, a degreasing solution made by Shisoplay Co., Ltd. for 5 minutes, rinse with running water, and then 10% sulfuric acid. It was immersed in water for 2 minutes and washed under running water. This copper foil was subjected to copper oxide formation treatment under the following conditions.

NaOH=15g/A Na3PO4−12H20=30g//NaCl20z
       =80g/l純水          
−14になる量液温度         −85℃ 銅箔浸清時間      −120秒 酸化銅形成後、流水で洗浄し、80℃で30分間乾燥し
た。
NaOH=15g/A Na3PO4-12H20=30g//NaCl20z
=80g/l pure water
-14 volume Liquid temperature -85°C Copper foil immersion time -120 seconds After forming copper oxide, it was washed with running water and dried at 80°C for 30 minutes.

次に、フォトエツチングで配線パターンを形成した銅張
り積層板MCL−E−67(日立化成工業株式会社、商
品名)を内層回路とし、ガラス売人エポキシプリプレグ
GE−67(日立化成工業株式会社、商品名)を介して
、レイキャ・ノブが上記銅張りとなる構成で積層プレス
を行った。積層条件ば成形圧力35kgf/cれ温度1
70°Cで90分間である。
Next, a copper-clad laminate MCL-E-67 (Hitachi Chemical Co., Ltd., trade name) on which a wiring pattern was formed by photoetching was used as the inner layer circuit, and Glass Seller Epoxy Prepreg GE-67 (Hitachi Chemical Co., Ltd., trade name) was used as the inner layer circuit. Laminate pressing was performed with the above-mentioned copper-clad configuration using the Reykja knob. Lamination conditions are molding pressure 35kgf/c and temperature 1
90 minutes at 70°C.

次に、ドリリングにより穴あけを行った。上あて十反ア
ルミ+反(100μmt) 、下あて(反フェノール+
ff11.5mmt)となる構成で、ト′リル条件は下
記の通りである。
Next, holes were made by drilling. Top plate ten-tan aluminum + anti-(100μmt), bottom plate (anti-phenol +
ff11.5mmt), and the trill conditions are as follows.

(mm)    (krpm)   (mm/m1n)
0.9     60     3600次に、穴埋め
インク5EP−490W (山栄化学株式会社、商品名
)を穴内に充填し、100°Cで60分間乾燥後、ハフ
研磨により基板表面のインクを除去した。
(mm) (krpm) (mm/m1n)
0.9 60 3600 Next, hole filling ink 5EP-490W (trade name, Sanei Chemical Co., Ltd.) was filled into the holes, and after drying at 100° C. for 60 minutes, the ink on the substrate surface was removed by Hough polishing.

5 次に、酸化銅と塩酸の水溶液を用いて、金属銅と酸化銅
をスプレーエツチングした。
5 Next, the metallic copper and copper oxide were spray etched using an aqueous solution of copper oxide and hydrochloric acid.

水洗後、40°Cの3%N a OH水溶液シャワーで
穴うめインクを除去し、流水で洗浄した。
After washing with water, the hole-filling ink was removed with a 3% NaOH aqueous solution shower at 40°C, and the plate was washed with running water.

次に、塩化パラジウムを含む活性化処理液に浸漬して無
電解銅めっき反応を開始さセるためのパラジウム触媒を
付与した。
Next, a palladium catalyst was applied to start the electroless copper plating reaction by immersing it in an activation treatment solution containing palladium chloride.

次に下記組成及び条件の無電解銅めっきを行った。Next, electroless copper plating was performed with the following composition and conditions.

CuS○a・5HzO=1 g/12 EDTA・4Na  −40g/42 p)T        =12.3 37%CH40= 3 m 7!/ Rめっき液添加剤
  −少量 めっき液温度   −70℃ めっき膜厚    −35μl 〔比較例〕 実施例で用いた銅箔を実施例と同じ酸化処理、水洗、乾
燥を行い、実施例と同し構成、条件で積層し、穴あけを
行い、実施例と同じ方法、条件で銅箔と酸化銅をエツチ
ングした。その後、実施例6 と同じ方法、条件でめっき触媒の付与と無電解めっきを
行った。
CuS○a・5HzO=1 g/12 EDTA・4Na -40g/42 p)T=12.3 37%CH40=3 m 7! / R plating solution additive - Small amount Plating solution temperature -70℃ Plating film thickness -35 μl [Comparative example] The copper foil used in the example was subjected to the same oxidation treatment, water washing, and drying as in the example, and the same configuration as in the example was prepared. The copper foil and copper oxide were etched using the same method and conditions as in the example. Thereafter, application of a plating catalyst and electroless plating were performed using the same method and conditions as in Example 6.

以上の実施例及び比較例について、スルーホール接続借
り・M性をホントオイル試験で評価した。260°C±
5°C・10秒のオイル浸漬、室温・10秒の水浸漬、
室温・10秒のマジックドライ (トリクロルエタン)
浸漬を1サイクルとして、所定回数後スルーボール断面
を観察し、クラックの発生をチエツクした。
Regarding the above Examples and Comparative Examples, through-hole connection borrowing and M properties were evaluated using a true oil test. 260°C±
Immersion in oil at 5°C for 10 seconds, immersion in water at room temperature for 10 seconds,
Magic dry for 10 seconds at room temperature (trichloroethane)
After a predetermined number of immersion cycles, the cross section of the through ball was observed to check for cracks.

また、実施例及び比較例について、無電解銅めっき液浸
漬前にもスルーボール断面の観察を行い、ネガティブエ
ノチハソク量を測定した。それら結果を表に示した。
In addition, for the Examples and Comparative Examples, the cross-sections of the through balls were also observed before being immersed in the electroless copper plating solution, and the amount of negative etch was measured. The results are shown in the table.

生を防止・抑制することが可能であり、接続信頼性に優
れた多層プリント配線板を製造できる。
It is possible to prevent and suppress the occurrence of cracking, and it is possible to manufacture a multilayer printed wiring board with excellent connection reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例による多層プリント配線板の工
程図である。 ■ 酸化処理銅箔   2 有機基材 3 内層導体     4 孔 5 穴埋めインク   6 銅めっき 〔発明の効果〕 本発明によれば、ネガティブエノチハソクの発へ C4
FIG. 1 is a process diagram of a multilayer printed wiring board according to an embodiment of the present invention. ■ Oxidation-treated copper foil 2 Organic base material 3 Inner layer conductor 4 Hole 5 Hole-filling ink 6 Copper plating [Effects of the invention] According to the present invention, C4 to the origin of negative enochihasoku

Claims (2)

【特許請求の範囲】[Claims] 1.以下の各工程を順に含む製造工程によって、導体回
路と絶縁層とが交互に積層された構造の多層プリント配
線板を製造する方法。 (a)銅箔を酸化剤含有の処理液と接触、あるいは電気
化学的手法を用いて、銅箔粗面に酸化銅を形成する工程
。 (b)前記銅箔をそれぞれ最外層として、酸化銅の形成
面と絶縁性有機材料の基材が接するように、内層回路と
共に積層する工程。 (c)貫通穴または非貫通穴を形成し、必要に応じてス
ミア処理を行う工程。 (d)前記、貫通穴または非貫通穴内の内層導体をエッ
チングレジストとなる銅エッチング液に不溶または難溶
性物質で被覆する工程。 (e)基板表面を研磨し、銅箔を露出させる工程。 (f)絶縁性有機基材から金属銅及び酸化銅または金属
銅のみを除去する工程。 (g)必要に応じ、貫通穴または非貫通穴内の導体被覆
物質を除去し、無電解めっきを含む配線加工を行い、配
線を形成する工程。
1. A method for manufacturing a multilayer printed wiring board having a structure in which conductor circuits and insulating layers are alternately laminated, using a manufacturing process including the following steps in order. (a) A step of forming copper oxide on the rough surface of the copper foil by contacting the copper foil with a treatment liquid containing an oxidizing agent or using an electrochemical method. (b) A step of laminating the copper foils as the outermost layer together with the inner layer circuit so that the surface on which the copper oxide is formed is in contact with the base material of the insulating organic material. (c) A step of forming through holes or non-through holes and performing smear treatment if necessary. (d) A step of coating the inner layer conductor in the through hole or non-through hole with a substance that is insoluble or poorly soluble in a copper etching solution that serves as an etching resist. (e) A step of polishing the substrate surface to expose the copper foil. (f) A step of removing metallic copper and copper oxide or only metallic copper from the insulating organic substrate. (g) If necessary, the step of removing the conductor coating material in the through hole or non-through hole and performing wiring processing including electroless plating to form wiring.
2.特許請求の範囲第1項において、貫通穴または非貫
通穴内にエッチングレジストとして設けた銅エッチャン
トに不溶または難溶性皮膜が、以下に示す少なくとも1
つである内層導体の被覆方法。 (a)耐酸または耐アルカリ性の高分子材料。 (b)無電解あるいは置換めっきによるニッケル、半田
、またはスズ、金 (c)酸化処理による酸化銅 (d)アルキルイミダゾール、ベンゾトリアゾール、ス
テアリン酸の処理による皮膜
2. In claim 1, the copper etchant-insoluble or poorly soluble film provided as an etching resist in the through hole or the non-through hole comprises at least one of the following:
A method of coating inner layer conductors. (a) Acid- or alkali-resistant polymeric material. (b) Nickel, solder, or tin, gold by electroless or displacement plating (c) Copper oxide by oxidation treatment (d) Coating by alkylimidazole, benzotriazole, stearic acid treatment
JP9877990A 1990-04-13 1990-04-13 Manufacture of multilayer printed circuit board Pending JPH03296295A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9877990A JPH03296295A (en) 1990-04-13 1990-04-13 Manufacture of multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9877990A JPH03296295A (en) 1990-04-13 1990-04-13 Manufacture of multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH03296295A true JPH03296295A (en) 1991-12-26

Family

ID=14228859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9877990A Pending JPH03296295A (en) 1990-04-13 1990-04-13 Manufacture of multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH03296295A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100682578B1 (en) * 2005-09-05 2007-02-15 (주)디오 Manufacturing method of printed circuit board for probe card

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260396A (en) * 1986-05-07 1987-11-12 大日本インキ化学工業株式会社 Manufacture of double-sided through-hole printed circuit board
JPS63168077A (en) * 1986-12-29 1988-07-12 日立化成工業株式会社 Manufacture of printed wiring board
JPH01140698A (en) * 1987-11-26 1989-06-01 Nec Corp Manufacture of multi-layered printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260396A (en) * 1986-05-07 1987-11-12 大日本インキ化学工業株式会社 Manufacture of double-sided through-hole printed circuit board
JPS63168077A (en) * 1986-12-29 1988-07-12 日立化成工業株式会社 Manufacture of printed wiring board
JPH01140698A (en) * 1987-11-26 1989-06-01 Nec Corp Manufacture of multi-layered printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100682578B1 (en) * 2005-09-05 2007-02-15 (주)디오 Manufacturing method of printed circuit board for probe card

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