JPH03296224A - Bipolar transistor - Google Patents
Bipolar transistorInfo
- Publication number
- JPH03296224A JPH03296224A JP9916890A JP9916890A JPH03296224A JP H03296224 A JPH03296224 A JP H03296224A JP 9916890 A JP9916890 A JP 9916890A JP 9916890 A JP9916890 A JP 9916890A JP H03296224 A JPH03296224 A JP H03296224A
- Authority
- JP
- Japan
- Prior art keywords
- collector
- layer
- electrode
- buried layer
- collector electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 9
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 7
- 229910052782 aluminium Inorganic materials 0.000 abstract description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 5
- 238000005530 etching Methods 0.000 abstract description 5
- 230000003071 parasitic effect Effects 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052721 tungsten Inorganic materials 0.000 abstract description 3
- 239000010937 tungsten Substances 0.000 abstract description 3
- 239000007769 metal material Substances 0.000 abstract description 2
- 230000035515 penetration Effects 0.000 abstract 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 abstract 1
- 238000000034 method Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、コレクタ埋込み層を有する縦型バイポーラト
ランジスタに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a vertical bipolar transistor having a buried collector layer.
[従来の技術]
エミッタ、ベース、コレクタを基板の深さ方向に配置し
た縦型バイポーラトランジスタでは、コレクタ下部にコ
レクタ埋込み層を形成したものが従来より知られている
。この種のバイポーラトランジスタでは、コレクタ電極
下部からコレクタ埋込み層まで不純物を拡散して、コレ
クタ電極とコレクタ埋込み層との間に生じる寄生抵抗を
低減させている。[Prior Art] Among vertical bipolar transistors in which an emitter, base, and collector are arranged in the depth direction of a substrate, a type in which a collector buried layer is formed under the collector is conventionally known. In this type of bipolar transistor, impurities are diffused from the lower part of the collector electrode to the collector buried layer to reduce parasitic resistance generated between the collector electrode and the collector buried layer.
[解決しようとする課題]
コレクタ電極からコレクタ埋込み層までの距離は通常数
マイクロメータ程度あるため、不純物は基板の深さ方向
のみならず横方向にも大きく拡散してしまう。従って、
横方向にその分の寸法余裕を持たせなければならず、広
い素子面積を必要としていた。また、不純物が横方向に
大きく拡がるため、寄生抵抗を十分に低減することかで
きなかった。[Problem to be Solved] Since the distance from the collector electrode to the collector buried layer is usually about several micrometers, impurities are diffused not only in the depth direction of the substrate but also in the lateral direction. Therefore,
A corresponding dimensional margin must be provided in the lateral direction, and a large element area is required. Furthermore, since the impurities spread widely in the lateral direction, parasitic resistance could not be sufficiently reduced.
本発明の第1の目的は、コレクタ埋込み層を有する縦型
バイポーラトランジスタにおいて、その素子領域を減少
させることである。A first object of the present invention is to reduce the device area of a vertical bipolar transistor having a buried collector layer.
本発明の第2の目的は、コレクタ電極とコレク夕埋込み
層との間に生じる寄生抵抗を減少することである。A second object of the present invention is to reduce parasitic resistance occurring between the collector electrode and the collector buried layer.
[課題を解決するための手段]
本発明は、コレクタ電極とコレクタ埋込み層との間に貫
通口を設け、この貫通口の内側に導電部を形成して、コ
レクタ電極とコレクタ埋込み層とを電気的に接続したも
のである。[Means for Solving the Problems] The present invention provides a through hole between the collector electrode and the collector buried layer, and forms a conductive portion inside the through hole to connect the collector electrode and the collector buried layer with electricity. It is connected to
[実施例]
以下、添付図面に基いて本発明の実施例について説明す
る。[Example] Hereinafter, an example of the present invention will be described based on the accompanying drawings.
第1図〜第6図は、実施例における製造工程を示した断
面図である。FIG. 1 to FIG. 6 are cross-sectional views showing manufacturing steps in an example.
11はシリコン基板、12はコレクタ埋込み層、13は
エピタキシャル層、14は素子分離拡散、15はコレク
タ、16はベース、17はエミッタ、18は酸化シリコ
ン層、19はフォトレジスト、20は貫通口である。2
1は導電部であり、アルミニウムやタングステンを用い
て、貫通口20内に埋込まれている。22はコレクタ電
極、23はベース電極、24はエミッタ電極である。11 is a silicon substrate, 12 is a collector buried layer, 13 is an epitaxial layer, 14 is an element isolation diffusion, 15 is a collector, 16 is a base, 17 is an emitter, 18 is a silicon oxide layer, 19 is a photoresist, and 20 is a through hole. be. 2
Reference numeral 1 denotes a conductive portion, which is embedded in the through hole 20 using aluminum or tungsten. 22 is a collector electrode, 23 is a base electrode, and 24 is an emitter electrode.
つぎに、第1図〜第6図に従って、製造工程の説明をす
る。Next, the manufacturing process will be explained according to FIGS. 1 to 6.
工程(1):P型のシリコン基板11にN型のコレクタ
埋込み層12を形成した後、シリコンをエピタキシャル
層長させ、エピタキシャル層13を形成する。つぎに、
ボロンをエピタキシャル層13に拡散して素子分離拡散
14を形成する。つぎに、エピタキシャル層13にボロ
ンおよびヒ素を順次拡散して、ベース16およびエミッ
タ17を順次形成する。つぎに、熱酸化法、CVD法、
あるいはこれらを併用した方法により、酸化シリコン層
18を形成する。以上の工程は、コレクタ埋込み層を有
する縦型バイポーラトランジスタにおいて、−射的に用
いられている工程である。Step (1): After forming an N-type collector buried layer 12 on a P-type silicon substrate 11, an epitaxial layer of silicon is grown to form an epitaxial layer 13. next,
Boron is diffused into the epitaxial layer 13 to form element isolation diffusions 14. Next, boron and arsenic are sequentially diffused into the epitaxial layer 13 to sequentially form a base 16 and an emitter 17. Next, thermal oxidation method, CVD method,
Alternatively, the silicon oxide layer 18 is formed by a method using a combination of these methods. The above steps are steps that are used projectively in a vertical bipolar transistor having a buried collector layer.
工程(2)二酸化シリコン層18上に開口バタンを有し
たフォトレジスト19を形成する。このフォトレジスト
19をマスクに用い、フッ素系ガスを用いた異方性エツ
チングにより、酸化シリコン層18をエピタキシャル層
13に達するまでエツチングして、開口部20aを形成
する。Step (2) A photoresist 19 having an opening tab is formed on the silicon dioxide layer 18. Using this photoresist 19 as a mask, the silicon oxide layer 18 is etched by anisotropic etching using fluorine gas until it reaches the epitaxial layer 13, thereby forming an opening 20a.
工程(3):引き続き、塩素系ガスを用いた異方性エツ
チングにより、エピタキシャル層13をコレクタ埋込み
層12に達するまでエツチングして、貫通口20を形成
する。Step (3): Subsequently, the epitaxial layer 13 is etched by anisotropic etching using chlorine gas until it reaches the collector buried layer 12, thereby forming the through hole 20.
工程(4):エッチング終了後、フォトレジスト19を
除去する。Step (4): After the etching is completed, the photoresist 19 is removed.
工程(5):バイアススパッタ法とエッチバック法とを
組合わせた方法、または選択CVD法を用いて、アルミ
ニウムやタングステン等の金属材料を貫通口20に埋込
み、導電部21を形成する。Step (5): A metal material such as aluminum or tungsten is filled into the through hole 20 to form a conductive portion 21 using a method combining a bias sputtering method and an etchback method or a selective CVD method.
なお図面では、導電部21の表面がエピタキシャル層1
3と酸化シリコン層18との境界に位置しているが、こ
の位置は後述のコレクタ電極が無理なく接続できる位置
であればよい。Note that in the drawing, the surface of the conductive part 21 is the same as the epitaxial layer 1.
3 and the silicon oxide layer 18, this position may be any position as long as it can be easily connected to a collector electrode, which will be described later.
工程(6)二ベース16上部およびエミツタ17上部の
酸化シリコン層18にコンタクトホールを形成した後、
アルミニウム被膜を形成してこれをパターニングし、導
電部21、ベース16およびエミッタ17にそれぞれ接
続されるコレクタ電極22、ベース電極23およびエミ
ッタ電極24を形成する。引き続き、アルミニウムのシ
ンタリング、オーバーコート形成、パッド部の窓開けを
行い、工程が完了する。Step (6) After forming contact holes in the silicon oxide layer 18 above the second base 16 and the emitter 17,
An aluminum film is formed and patterned to form a collector electrode 22, a base electrode 23, and an emitter electrode 24 connected to the conductive portion 21, base 16, and emitter 17, respectively. Subsequently, the process is completed by sintering the aluminum, forming an overcoat, and opening a window in the pad area.
[効果]
本発明ては、コレクタ電極とコレクタ埋込み層との間に
貫通口を設け、この貫通口の内側に形成された導電部を
介して、コレクタ電極とコレクタ埋込み層とを電気的に
接続したため、全体の素子面積が減少するとともに、コ
レクタ電極とコレクタ埋込み層との間に生じる寄生抵抗
が著しく低減する。[Effects] In the present invention, a through hole is provided between the collector electrode and the collector buried layer, and the collector electrode and the collector buried layer are electrically connected via a conductive portion formed inside the through hole. Therefore, the overall device area is reduced, and the parasitic resistance generated between the collector electrode and the collector buried layer is significantly reduced.
第1図〜第6図は本発明の実施例における製造工程を示
した断面図である。
12・・・・・・コレクタ埋込み層
20・・・・・・貫通口
21・・・・・導電部
22・・・・・コレクタ電極1 to 6 are cross-sectional views showing manufacturing steps in an embodiment of the present invention. 12...Collector buried layer 20...Through hole 21...Conductive part 22...Collector electrode
Claims (1)
タにおいて、 コレクタ電極下にコレクタ埋込み層に達する貫通口を設
け、この貫通口の内側に形成された導電部を介してコレ
クタ電極とコレクタ埋込み層とを電気的に接続したバイ
ポーラトランジスタ。[Claims] In a vertical bipolar transistor having a buried collector layer, a through hole reaching the buried collector layer is provided under the collector electrode, and the collector electrode and the buried collector are connected through a conductive part formed inside the through hole. A bipolar transistor that is electrically connected to the layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9916890A JPH03296224A (en) | 1990-04-13 | 1990-04-13 | Bipolar transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9916890A JPH03296224A (en) | 1990-04-13 | 1990-04-13 | Bipolar transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03296224A true JPH03296224A (en) | 1991-12-26 |
Family
ID=14240122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9916890A Pending JPH03296224A (en) | 1990-04-13 | 1990-04-13 | Bipolar transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03296224A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100832716B1 (en) * | 2006-12-27 | 2008-05-28 | 동부일렉트로닉스 주식회사 | Bipolar junction transistor and method for fabricating the same |
KR101004801B1 (en) * | 2002-12-26 | 2011-01-04 | 매그나칩 반도체 유한회사 | Method for manufacturing semiconductor bipolar |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55108766A (en) * | 1979-02-15 | 1980-08-21 | Pioneer Electronic Corp | Semiconductor device and manufacture of the same |
JPS5658258A (en) * | 1979-10-16 | 1981-05-21 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
-
1990
- 1990-04-13 JP JP9916890A patent/JPH03296224A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55108766A (en) * | 1979-02-15 | 1980-08-21 | Pioneer Electronic Corp | Semiconductor device and manufacture of the same |
JPS5658258A (en) * | 1979-10-16 | 1981-05-21 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101004801B1 (en) * | 2002-12-26 | 2011-01-04 | 매그나칩 반도체 유한회사 | Method for manufacturing semiconductor bipolar |
KR100832716B1 (en) * | 2006-12-27 | 2008-05-28 | 동부일렉트로닉스 주식회사 | Bipolar junction transistor and method for fabricating the same |
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